Abstract: An amplifier arrangement for amplifying an alternating signal, comprising an amplifier and an adaptive biasing circuit, the amplifier configured to receive an alternating signal for amplification and a bias signal for biasing the amplifier from the adaptive biasing circuit, the adaptive biasing circuit comprising a PTAT circuit wherein the PTAT circuit is configured to receive the alternating signal and modulate the bias signal based on the alternating signal.

Abstract: A frequency selective circuit includes a first transistor, an impedance element, a first capacitive element, a second capacitive element, a second capacitive and a second transistor. The first transistor includes a first terminal, a second terminal and a control terminal. The impedance element is coupled between the first terminal and the control terminal of the first transistor. The first capacitive element is coupled to the first terminal of the first transistor. The second capacitive element is coupled to the control terminal of the first transistor. The second transistor includes a first terminal, a second terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the control terminal of the first transistor.

Abstract: A system for monitoring and controlling the power of a Radio Frequency (RF) signal in a short-range RF transmitter. An RF signal-generation unit generates the RF signal. A power amplifier amplifies the RF signal. An impedance-matching network matches the output impedance of the power amplifier to input impedance of an antenna. One or more RF power monitors monitor the voltage amplitude of the RF signal at the output of at least one of the RF signal-generation unit, the power amplifier and the impedance-matching network. The one or more RF power monitors further generate at least one alarm signal, based on the voltage amplitude of the RF signal. A control unit modifies at least one operating parameter of at least one of the RF signal-generation unit and the power amplifier, based on the at least one alarm signal generated by the one or more RF power monitors.

Abstract: There is provided a power amplifier capable of readily reducing odd-order harmonic waves even in high frequencies. This power amplifier includes n current sources (where “n” is a natural number equal to or greater than 3) that cause predetermined currents to flow; n switches that open and close current paths of the n current sources, respectively; and a signal generating section that generates n timing signals for turning on/off the n switches, respectively. In the power amplifier, the n timing signals are signals that have an identical duty ratio and that are different in phase; and the power amplifier outputs a signal amplified in power based on the currents flowing through the n current sources.

Abstract: Improved linearity performance for multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Abstract: An operational amplifier circuit configured to drive a load is provided. The operational amplifier circuit includes an output stage module. The output stage module includes a detection circuit and an output stage circuit. The detection circuit is configured to detect a current output voltage and a previous output voltage based on a comparison result of a current input voltage and the current output voltage. The detection circuit enhances a charge capacity or a discharge capacity of the output stage circuit for the load based on a detection result. Furthermore, a method for enhancing the driving capacity of the operational amplifier circuit is also provided.

Abstract: Multi-mode power amplifiers (PAs) having improved linearity. A PA can include an amplifying bipolar junction transistor (BJT) configured to receive and amplify a radio-frequency (RF) signal. The PA can further include a biasing circuit configured to provide a first bias signal or a second bias signal to the BJT for operation in a first mode or a second mode. Each of the first bias signal and the second bias signal can be routed to the BJT through a path that includes a common node and a ballast. The PA can further include a linearizing circuit implemented between the common node and a node along an input path for the BJT. The linearizing circuit can be configured as a coupling path to improve linearity of the PA operating in the first mode while allowing the ballast to be sufficiently robust for the PA operating in the second mode.

Abstract: The invention provides a power amplifier circuit capable of adjusting gain dynamically. The power amplifier circuit comprises a power supply unit configured to provide a power supply signal; an input power detection unit for receiving at least one input signal and the power supply signal, detecting the power of the input signal to generate a detection signal, and pulling up or down a bias signal by the detection signal; a power amplifier unit for receiving the input signal and the bias signal, adjusting the gain by the controlling of the bias signal, and amplifying the input signal by the adjusted gain to output at least one output signal. Therefore, the gain of power amplifier circuit will be adjusted dynamically by detecting the power of the input signal, so that the output signal conforming to the actual power may be outputted.

Abstract: An radio frequency amplifying circuit includes an amplifying transistor configured to amplify a radio frequency signal input to a base of the amplifying transistor via a matching network to output the amplified radio frequency signal, a first bias transistor connected to the amplifying transistor based on a current-mirror connection to supply a bias to the amplifying transistor, and a second bias transistor connected to the base of the amplifying transistor based on an emitter-follower connection to supply a bias to the amplifying transistor.

Abstract: A power switch 307a is provided between a bias generation circuit 301 and a high potential power source, or a power switch 307b is provided between the bias generation circuit 301 and a low potential power source. A bias potential Vb output from the bias generation circuit 301 is held by a potential holding circuit 300. The bias potential Vb held by the potential holding circuit 300 is input to a bias generation circuit 301a, and a bias potential Vb2 output from the bias generation circuit 301a on which an input signal IN is superimposed is input to an amplifier circuit 302. The potential holding circuit 300 is constituted of a capacitor 306 and a switch 305 formed of, for example, a transistor with a low off-state current that is formed using a wide band gap oxide semiconductor. Structures other than the above structure are claimed.

Abstract: A power amplifier (PA) system with PA gain correction is disclosed. The PA system includes a PA having a bias voltage input; and electrothermal feedback circuitry coupled to the bias voltage input. The electrothermal feedback circuitry is configured to receive thermal feedback generated by the PA and maintain a substantially constant PA gain by automatically changing a bias voltage level at the bias voltage input based upon the thermal feedback.

Abstract: Apparatus and methods for biasing power amplifiers are disclosed herein. In certain implementations, a power amplifier system includes a power amplifier and a bias circuit that generates a bias voltage for biasing the power amplifier. The bias circuit includes an amplifier, a current source for generating a reference current, and a reference transistor having a current therethrough that changes in relation to the bias voltage. The amplifier can control the bias voltage based on an error current corresponding to a difference between the reference current and the current through the reference transistor. The amplifier can be used to control the bias voltage such that the reference current and the current through the reference transistor are substantially equal.

Abstract: The present invention provides a power amplifier that can reduce irregularities in characteristics such as gains. A high-frequency power amplifier that is used for a mobile communication terminal includes: an amplifier element that includes a composite semiconductor bipolar transistor and that amplifies high-frequency power of a predetermined frequency band with a bias voltage and a bias current supplied thereto; a bias circuit that supplies the bias voltage and the bias current to the amplifier element on the basis of a bias reference voltage; a bias reference voltage supply circuit that generates and supplies the bias reference voltage to the bias circuit; and a bias reference voltage control unit that controls the bias reference voltage supply circuit so as to generate the bias reference voltage of a voltage corresponding to a given signal.

Abstract: Disclosed is a Doherty power amplifier apparatus, including: a drive amplifier circuit, a power splitter circuit and a power combiner circuit, wherein the power splittercircuit is connected to the drive amplifier circuit, the apparatus further comprising: a carrier amplifier circuit and a peak amplifier circuit connected in parallel between the power splitter circuit and the power combiner circuit, wherein the carrier amplifier circuit comprises one or more parallel carrier amplification branches, wherein each carrier amplification branch comprises a multi-stage carrier amplifier apparatus, the multi-stage carrier amplifier apparatus is used for achieving multi-stage carrier amplification; and the peak amplifier circuit comprises one or more parallel peak amplification branches, wherein each peak amplification branch comprises a multi-stage peak amplifier apparatus, the multi-stage peak amplifier apparatus is used for achieving multi-stage peak amplification.

Abstract: A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

Abstract: A Power amplifier circuit based on a cascode structure and to be powered by a power source voltage, e.g. a battery, said circuit comprising -a first transistor having a grid, source and drain terminal; said first transistor being connected in a common source mode; -a second grid source transistor having grid, source and drain terminal, said second transistor being connected in common grid mode; -a biasing circuit for biasing said first transistor and said second transistor.

Abstract: A voltage adjusting circuit includes a reference voltage generating circuit, a subtractor circuit, a threshold generating circuit and a comparator circuit. The voltage adjusting circuit may provide power supply signals to an amplifier circuit so that the amplifier circuit may provide an output signal to a load according to an input signal. The subtractor circuit generates a difference signal according to the output signal and the power supply signal. The comparator circuit compares the difference signal and a threshold signal generated by the threshold generating circuit for configuring the reference voltage generating circuit to adjust the signal value of the power supply signal.

Abstract: A circuit comprising a peak detector configured to receive a positive voltage input, a negative voltage input and a reference current source input and to output a peak signal data value. A fast attack current source control coupled to the peak detector and configured to generate a current source control signal as a function of the peak signal data value. A slow decay control coupled to the fast attack current source control and configured to reduce the current source control signal based on a predetermined or user-selected decay rate. A variable current source coupled to the fast attack current source control and configured to generate a variable current as a function of the current source control signal. Amplifier circuitry coupled to the variable current source, the amplifier circuitry configured to receive the variable current.

Abstract: Provided are a digital condenser microphone having a preamplifier with variable input impedance and a method of controlling the variable input impedance of the preamplifier. The preamplifier includes a bias terminal for applying a bias voltage to an input signal when the input signal is output from a microphone condenser. An impedance unit includes at least one variable input impedance element which is connected to the bias terminal and to which the bias voltage is applied via the bias terminal. An operational amplifier receives the input signal, converts the input signal into an output signal, and outputs the output signal. A control block determines whether a DC voltage level of the output signal output from the operational amplifier has reached a reference value, and controls a total impedance of the impedance unit based on a result of the determination.

Abstract: Amplifier for an ultra-wideband (UWB) signal receiver having a signal input (15) for receiving an ultra-wideband signal which is sent by a transmitter (1) and which is transmitted in a sequence of transmission channels (K.sub.i) (which each have a particular frequency bandwidth) which has been agreed between the transmitter (1) and the receiver (4); a transistor (18) whose control connection is connected to the signal input (15); a resonant circuit (26, 30, 31) which is connected to the transistor (18) and whose resonant frequency can be set for the purpose of selecting the transmission channel (K.sub.i) in line with the agreed sequence of transmission channels; and having a signal output (29) for outputting the amplified ultra-wideband signal, the signal output being tapped off between the transistor (18) and the resonant circuit.

Abstract: A power amplifier module that includes a power amplifier and a controller is presented herein. The power amplifier module may include a set of transistor stages and a plurality of bias circuits. At least one transistor stage from the set of transistor stages may be in electrical communication with a first bias circuit and a second bias circuit from the plurality of bias circuits. The first bias circuit can be configured to apply a first bias voltage to the at least one transistor stage and the second bias circuit can be configured to apply a second bias voltage to the at least one transistor stage. The controller may be configured to activate one of the first bias circuit and the second bias circuit.

Abstract: In one embodiment, an amplification device has a temperature differential sensing circuit that reduces a local thermal memory effect. The amplification device may include an amplification circuit and biasing circuitry. The amplification device is operable to receive an input signal and generate and amplified output signal. The biasing circuitry generates a biasing signal that sets the quiescent operating level of the amplified output signal. The temperature differential sensing circuit provides a bias level adjustment signal that adjusts the biasing signal to maintain the quiescent operating level of the amplified output signal at a desired level.

Abstract: A method and network equipment for controlling power amplification are disclosed. The method for controlling power amplification includes outputting a voltage signal according to the state of an NE. The voltage signal is applied to a grid electrode or a base electrode of at least one power amplifier transistor in a power amplifier.

Abstract: A wireless communication device configured for providing carrier aggregation is described. The wireless communication device includes at least one antenna configured to receive a plurality of wireless signals. The wireless communication device also includes a first transceiver. The first transceiver includes a first downconverting circuitry. The wireless communication device further includes a second transceiver. The second transceiver includes a second downconverting circuitry. The wireless communication device also includes an inter-transceiver connection that routes a first signal from a low noise amplifier on the first transceiver to the second downconverting circuitry of the second transceiver.

Abstract: When the frequency bandwidth of a high frequency signal to be amplified is changed, the linearity of a high frequency module deteriorates. A high frequency module has an amplifier circuit including an amplification transistor and a variable impedance circuit, and an output matching network. Based on an amplifying operation, the amplified high frequency signal will contain unwanted signals of secondary distortion components. In a frequency band that generates such unwanted signals of secondary distortion components, the output impedance of the amplifier circuit is changed so that the impedance will not match between the amplifier circuit and the output matching network. The output impedance of the amplifier circuit is changed by controlling the variable impedance circuit.

Abstract: Multiple-input multiple-output (MIMO) low noise amplifiers (LNAs) supporting carrier aggregation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a MIMO LNA having a plurality of gain circuits, a drive circuit, and a plurality of load circuits. The gain circuits receive at least one input radio frequency (RF) signal and provide at least one amplified RF signal. Each gain circuit receives and amplifies one input RF signal and provides one amplified RF signal when the gain circuit is enabled. The at least one input RF signal include transmissions sent on multiple carriers at different frequencies to the wireless device. The drive circuit receives the at least one amplified RF signal and provides at least one drive RF signal. The load circuits receive the at least one drive RF signal and provide at least one output RF signal.

Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.

Abstract: Systems and methods for maintaining power amplifier performance are provided. A system includes a bias supply that generates a bias voltage, and at least one primary power amplifier (PA) that receives the bias voltage and a primary radio frequency (RF) input. The at least one primary PA amplifies the primary RF input based on the bias voltage. The system includes an auxiliary PA that is connected in parallel with the at least one primary PA and receives the bias voltage and an auxiliary RF input, which is a scaled version of the primary RF input. The auxiliary PA amplifies the auxiliary RF input based on the bias voltage. The system includes a detector that measures an output voltage associated with the amplified auxiliary RF input, and a comparator that compares the measured output voltage to a reference voltage. The bias supply adjusts the bias voltage based on the comparison.

Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes a bias circuit, an output stage circuit and dynamic bias controlling circuit. The bias circuit receives a system voltage and the bias circuit provides a working voltage according to the system voltage. The output stage circuit receives the working voltage so as to work at an operation bias point. The dynamic bias controlling circuit receives the working voltage and outputs a compensation voltage to the bias circuit according to a variation of the working voltage. When the input power increases and makes the working voltage decreases so as to shift the operation bias point, the bias circuit adjusts the working voltage upward so as to recover the operation bias point according to the compensation voltage received.

Abstract: Embodiments and methods herein operate as two-stage voltage controlled current sources (i.e., dynamic current sources) operating in class AB mode. Phase-delayed current injection circuits are associated with first-stage bias, second-stage bias, or both. The current injection circuits operate to quickly re-charge inter-stage parasitic capacitance associated with the active side of the class AB dynamic current source shortly after that side becomes inactive. Doing so quickly dissipates an otherwise slowly-decaying residual drive signal to prevent the output stage from continuing to conduct after the associated side of the current source becomes inactive. Excessive current consumption and possible destructive operation of the output stage are mitigated as a result.

Abstract: A power amplifier (PA) system with PA gain correction is disclosed. The PA system includes a PA having a bias voltage input; and electrothermal feedback circuitry coupled to the bias voltage input. The electrothermal feedback circuitry is configured to receive thermal feedback generated by the PA and maintain a substantially constant PA gain by automatically changing a bias voltage level at the bias voltage input based upon the thermal feedback.

Abstract: There are provided a bias circuit and a power amplifier with a dual-power mode. The bias circuit includes a regulated voltage generation unit generating a regulated voltage by using a reference voltage, a bias voltage generation unit generating a bias voltage according to the regulated voltage, and a power mode control unit operating in any one of a high power mode and a low power mode according to a power mode voltage and dropping the regulated voltage in the low power mode.

Abstract: The present invention improves the transmission power characteristics of a wireless communication device or reduces the resources required for improving the transmission power characteristics. The wireless communication device includes, for example, a bias detection circuit, an error amplifier, and a correction circuit. The bias detection circuit detects a bias that is supplied to a high-frequency power amplifier. The error amplifier amplifies the error between the detected bias and a predetermined reference voltage. The correction circuit searches for a bit correction value that minimizes the error detected in the error amplifier. During a normal operation, a digital-to-analog conversion circuit receives a bias instruction code from a baseband unit and outputs a bias setup voltage, which is obtained when the bit correction value is reflected in the bias instruction code. A bias corresponding to the bias setup voltage is then supplied to the high-frequency power amplifier.

Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.

Abstract: A power amplifier includes: a first transistor having a gate, a drain, and a source that is grounded; a second transistor having a gate, a drain, and a source that is connected to the drain of the first transistor; a capacitor connected between the gate of the second transistor and a grounding point; an idling current control circuit having a positive temperatures coefficient and making an idling current flowing through the first transistor proportional to an ambient temperature; and a drain voltage control circuit having a positive temperature gradient coefficient and making a drain voltage on the first transistor proportional to the ambient temperature.

Abstract: A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.

Abstract: An apparatus, comprises three driver FETs coupled at their sources; note-driver circuit; a first sense FET coupled to the sources of the three driver FETs; a current mirror having the first sense FET and a mirror FET; wherein the first sense FET is coupled to the mirror FET; a first transconductance amplifier coupled to the first sense FET; a second amplifier coupled to the current mirror, and an output of the first transconductance amplifier is an input to the second amplifier.

Abstract: A radio frequency generator includes a power control module, a frequency control module and a pulse generating module. The power control module is configured to generate a power signal indicating power levels for target states of a power amplifier. The frequency control module is configured to generate a frequency signal indicating frequencies for the target states of the power amplifier. The pulse generating module is configured to (i) supply an output signal to the power amplifier, (ii) recall at least one of a latest power level or a latest frequency for one of the target states of the power amplifier, and (iii) adjust a current power level and a current frequency of the output signal from a first state to a second state based on the power signal, the frequency signal, and at least one of the latest power level and the latest frequency of the power amplifier.

Abstract: The object of the present invention is a low noise figure amplifier with a variable gain which comprises a cascode amplification stage comprising, serially mounted, a low-voltage MOSFET transistor installed as a common source followed by a bipolar transistor with high breakdown voltage installed as a common base. A resistor is placed between the bipolar transistor's collector and the grid of the cascode stage's MOSFET transistor, and the cascode stage is electrically powered through a choke.

Abstract: A current source circuit includes a first transistor Q1, a second transistor Q2, a first resistor R1, and a second resistor R2. The first transistor Q1 has a first terminal (collector) coupled with the supply voltage (VCC), a second terminal (base) coupled with the first resistor R1, and a third terminal (emitter) coupled with the second resistor R2. The second transistor Q2 has a first terminal coupled with the second terminal of the first transistor Q1, a second terminal coupled with the third terminal of the first transistor Q1, and a third terminal coupled with the filtering circuit 39. The first resistor R1 is coupled between the supply voltage and a second terminal of the first transistor Q1. The second resistor R2 is coupled between a third terminal of the first transistor Q1 and the filtering circuit 39.

Abstract: A power amplifier includes: an amplification element amplifying an input signal; and a bias circuit supplying a bias current to an input of the amplification element. The bias circuit includes a reference voltage terminal to which a battery voltage is applied from a battery, a first resistor having a first end connected to the reference voltage terminal, a second resistor connected between a second end of the first resistor and ground, and a first transistor. The first transistor has a control terminal connected to a connection point between the first resistor and the second resistor, a first terminal connected to a power supply, and a second terminal connected to the input of the amplification element. The first and second resistors are the same material.

Abstract: An apparatus for providing a linearity information associated with an amplifier includes an operating state determinator and an evaluator. The operating state determinator is configured to obtain information describing a gain of the amplifier for at least one bias condition of the amplifier. The evaluator is configured to obtain the linearity information based on both the information describing the gain of the amplifier and information about the at least one bias condition of the amplifier using a gain-bias characteristic of the amplifier. A bias circuit including the apparatus for providing the linearity information is also disclosed.

Abstract: A sense amplifier system and sensing method thereof are provided. The proposed sense amplifier system includes plural sense amplifiers, each of which includes a first switch having a first terminal, a second terminal, and a bulk terminal electrically connected to the first terminal, a second switch having a first terminal electrically connected to the second terminal of the first switch, a second terminal, and a bulk terminal, a third switch having a first terminal electrically connected to the first terminal of the second switch, a second terminal, and a bulk terminal electrically connected to the bulk terminal of the second switch, and a fourth switch having a first terminal electrically connected to the bulk terminal of the first switch and a second terminal electrically connected to the bulk terminal of the third switch.

Abstract: In one embodiment, saturation of the control system of a power amplifier is limited by comparing a control voltage at a first control node against a scaled battery voltage, and then drawing an error current away from the first control node when the control voltage exceeds the scaled battery voltage. The first control node may be located after a trans-conductance amplifier in a feedback control system.

Abstract: In an amplification device, an amplification unit has a transistor and amplifies a signal that is input. A control unit applies, when a power source is turned on, a pinch-off voltage to a gate of the transistor before applying a drain bias voltage to a drain of the transistor and then applies a gate bias voltage to the gate of the transistor.

Abstract: Power detectors with temperature compensation and having improved accuracy over temperature are disclosed. In an aspect of the disclosure, variations of a power detector gain over temperature is reduced by varying both the gate and drain voltages of MOS transistors within a power detector. In an exemplary design, an apparatus includes at least one MOS transistor, which receives an input signal, detects the power of the input signal based on a power detection gain, and provides an output signal indicative of the power of the input signal. The at least one MOS transistor is applied a variable gate bias voltage and a variable drain bias voltage in order to reduce variations of the power detection gain over temperature. At least one additional MOS transistor may receive a second variable gate bias voltage and provide the variable drain bias voltage for the at least one MOS transistor.

Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.

Abstract: Power amplifier (PA) systems are typically comprised of a signal path integrated circuit (IC) and a power control IC. Advanced CMOS technologies may allow smart integration of such ICs into a single IC and provide an opportunity to improve performance and cost. Specifically, the radio frequency (RF) signal path is designed to enable local biasing of the gain stages that comprise the RF signal path. By using current-mode biasing instead of the prior art voltage-mode biasing significant area reduction is achieved as well as better isolation between the stages which reduces noise, and improves stability.

Abstract: A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.

Abstract: Provided is a time amplifier. The time amplifier includes: an SR latch providing an output at a timing determined according to a time difference between two inputs; and an operation determination unit connected to a power terminal of the SR latch and configured to determine an operation of the SR latch.