Having Particular Biasing Means Patents (Class 330/285)
  • Patent number: 8890616
    Abstract: Power amplifier (PA) systems are typically comprised of a signal path integrated circuit (IC) and a power control IC. Advanced CMOS technologies may allow smart integration of such ICs into a single IC and provide an opportunity to improve performance and cost. Specifically, the radio frequency (RF) signal path is designed to enable local biasing of the gain stages that comprise the RF signal path. By using current-mode biasing instead of the prior art voltage-mode biasing significant area reduction is achieved as well as better isolation between the stages which reduces noise, and improves stability.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: November 18, 2014
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Baker Scott, George Maxim
  • Publication number: 20140333382
    Abstract: A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.
    Type: Application
    Filed: January 7, 2014
    Publication date: November 13, 2014
    Inventor: Llyod L. Lautzenhiser
  • Publication number: 20140320209
    Abstract: Provided is a time amplifier. The time amplifier includes: an SR latch providing an output at a timing determined according to a time difference between two inputs; and an operation determination unit connected to a power terminal of the SR latch and configured to determine an operation of the SR latch.
    Type: Application
    Filed: April 21, 2014
    Publication date: October 30, 2014
    Inventors: Doohyun Shon, Yeomyung Kim, Tae Wook Kim
  • Patent number: 8867761
    Abstract: Techniques for providing multiple power supplies in electronic devices are disclosed. According to one aspect of the present invention, an appropriate power supply is provided only to accommodate a volume setting. In other words, there are at least two power supplies, one with a low voltage and the other with a high voltage. The high voltage power supply is only applied when there is a need to accommodate a volume setting. Thus the power consumption of the amplifiers is well controlled. As a result, the designs of the device and heat dissipation therein can be simplified and lowered in cost.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: October 21, 2014
    Assignee: Sonos, Inc.
    Inventors: James F. Lazar, Mark Polomski
  • Publication number: 20140300419
    Abstract: A bias circuit according to an embodiment is a bias circuit that supplies a bias voltage to an amplifying element. The bias circuit of the embodiment includes a first current source that has a characteristic of varying an output current with the surrounding temperature variations, and a second current source that has a different output characteristic from the first current source and that can control the output current. The bias circuit of the embodiment also includes a comparator for comparing the output current of the first current source with the output current of the second current source, and a bias supply part that controls the output current of the second current source on the basis of the comparison result of the comparator and supplies a bias voltage to the amplifying element in accordance with the comparison result.
    Type: Application
    Filed: March 14, 2014
    Publication date: October 9, 2014
    Inventors: Shusuke KAWAI, Masahiro HOSOYA, Tong WANG, Toshiya MITOMO, Shigehito SAIGUSA, Tetsuro ITAKURA
  • Patent number: 8854141
    Abstract: A radio frequency (RF) amplifier module has a digitally controllable amplifier to receive a first biased signal, a further biased signal, and a digital control signal including a less significant bit (LSB) component and a more significant bit (MSB) component. The digitally controllable amplifier has an LSB module operating according to the first biased signal and the LSB component, and an MSB module operating according to the further biased signal and the MSB component. The RF amplifier module further has a biasing component to apply a first, operating DC bias voltage to the further biased signal when the digitally controllable amplifier operates in a higher gain mode and the MSB module outputs a load current component, and apply a second, higher DC bias voltage to the further biasing signal when the digitally controllable amplifier operates in a lower gain mode and the MSB module outputs the load current component.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: October 7, 2014
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Hongli Zhang, Bernard Mark Tenbroek
  • Patent number: 8854142
    Abstract: There are provided a bias circuit supplying different levels of bias power according to respective power modes through a simple circuit configuration, and a power amplifier having the same. The bias circuit includes: a bias setting unit setting a bias power voltage level by switching reference power having a pre-set voltage level determined according to a pre-set power mode; and a bias supply unit including a switching element performing switching according to the setting of the bias setting unit and supplying bias power having a voltage level determined according to a switching operation of the switching element.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Shinichi Iizuka, Youn Suk Kim, Jun Goo Won, Myeong Woo Han, Young Jean Song, Ju Young Park, Ki Joong Kim
  • Patent number: 8854143
    Abstract: Proposed is a bias circuit for a transistor in a C class amplifier. The bias circuit comprises: a class AB amplifier bias voltage generating means adapted to generate a bias voltage at an output terminal; and a transistor connected between the output terminal and a first reference voltage, the control terminal of the transistor being connected to a second reference voltage via a switch. Closure of the switch connects the second reference voltage to the control terminal of the transistor to cause a shift in the bias voltage generated by the class AB amplifier bias voltage generating means to achieve a predetermined class C bias voltage at the output terminal.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: October 7, 2014
    Assignee: NXP, B.V.
    Inventor: Jean-Jacques Bouny
  • Patent number: 8856857
    Abstract: This technique relates to a receiving device, a receiving method, and a program that can demodulate transmitted signals with high accuracy. A receiving device of this disclosure includes: an amplifying unit that amplifies a received signal; an adjusting unit that adjusts gain of the amplifying unit in accordance with power of the signal; a demodulating unit that demodulates the amplified signal; and a detecting unit that detects an interval from the signal, information having the same content continuously appearing in the interval. The adjusting unit restricts the process of adjusting the gain of the amplifying unit in accordance with a result of the detection of the interval. This disclosure can be applied to receiving devices that receive broadcast signals compliant with DVB-C2 via a CATV network.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventors: Kenichi Kobayashi, Naoki Yoshimochi
  • Patent number: 8855336
    Abstract: An apparatus for generating a bias voltage for an active device is disclosed, comprising a first voltage source, a capacitive element adapted to generate a charge in response to the first voltage source, and a first switching element adapted to deliver the charge to generate the bias voltage for the active device. The apparatus may comprise a controller adapted to control a capacitive element based on one or more characteristics of the active device. Alternatively, the controller may also control the capacitance of the capacitive element based on a reference voltage that is, in turn, based on one or more characteristics of the active device. The apparatus may also comprise a second voltage source adapted to generate a second voltage from which the bias voltage may be generated. The second voltage may be based on one or more characteristics of the active device. The apparatus may comprise a second switching element adapted to selectively enable and disable the active device.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: October 7, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Bo Sun
  • Patent number: 8847689
    Abstract: Techniques for improving linearity of amplifiers are described. In an exemplary design, an amplifier (e.g., a power amplifier) may include a plurality of transistors coupled in a stack and at least one diode. The plurality of transistors may receive and amplify an input signal and provide an output signal. The at least one diode may be operatively coupled to at least one transistor in the stack. Each diode may provide a variable bias voltage to an associated transistor in the stack. Each diode may have a lower voltage drop across the diode at high input power and may provide a higher bias voltage to the associated transistor at high input power. The at least one transistor may have higher gain at high input power due to the higher bias voltage from the at least one diode. The higher gain may improve the linearity of the amplifier.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: September 30, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Yu Zhao, Nathan M. Pletcher
  • Patent number: 8829997
    Abstract: An apparatus comprising a power amplifier and a control circuit. The power amplifier may be configured to generate an output signal in response to an input signal and a control signal. The control circuit may be configured to present (i) a bias signal as the control signal during un-regulated conditions and (ii) a power down voltage as the control signal when one or more predetermined design parameters are exceeded. The magnitude of the control signal may be configured to dynamically adjust a power level of the output signal. The power down voltage may be generated by sampling the input signal.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: September 9, 2014
    Assignee: M/A-COM Technology Solutions Holdings, Inc.
    Inventor: Henrik Morkner
  • Patent number: 8816774
    Abstract: Disclosed herein is a power amplifier system including: a power amplifier; a power controlling unit providing driving voltage and driving current corresponding to a preset reference voltage to the power amplifier; a current controlling unit performing a control so that control current corresponding to applied control voltage flows; a bias controlling unit detecting current and voltage corresponding to the driving current of the power controlling unit and controlling bias current of the power amplifier according to the detected voltage; and a current adjusting unit detecting bias voltage corresponding to the bias current of the power amplifier and adjusting the driving current of the power controlling unit according to the detected bias voltage. Even though applied control voltage increases, current applied to the power amplifier is appropriately adjusted, thereby making it possible to improve characteristics of the power amplifier.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: August 26, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Iizuka Shinichi, Sang Hoon Ha, Jun Kyung Na
  • Patent number: 8816775
    Abstract: Apparatus, systems, and fabrication methods are provided for biasing amplifier arrangements inside device packages to a target quiescent current. In one embodiment, an amplifier device has an output interface and includes an amplifier arrangement having an amplifier output and impedance matching circuitry coupled between the amplifier output and the output interface. A method for biasing the amplifier arrangement involves measuring or otherwise obtaining a voltage between the amplifier output and the output interface, determining an estimated quiescent current through the amplifier arrangement based on that voltage, and adjusting a bias voltage provided to the input of the amplifier arrangement based on a difference between the estimated quiescent current. In exemplary embodiments, the bias voltage is adjusted until the estimated quiescent current is substantially equal to a target quiescent current.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: August 26, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Justin N Annes, Mario M Bokatius, Paul R Hart, Joseph Staudinger
  • Patent number: 8810317
    Abstract: A high frequency circuit and a high frequency module are provided, in which the accuracy of compensation operation is improved in compensating by digital control. The amplification gain of an amplification element of an amplifier unit is controlled by a bias current of a bias control unit. A process monitoring circuit of a calibration circuit includes a first and a second element characteristic detector and a voltage comparator. The detectors convert the current of replica elements into a first and a second detection voltage. The voltage comparator compares a first and a second detection voltage and supplies a comparison output signal to a search control unit. Responding to the comparison output signal of the comparator and a clock signal of a clock generating unit, the controller generates a multi-bit digital compensation value according to a predetermined search algorithm, and the bias control unit of the second detector is feedback-controlled.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: August 19, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Ryo Kadoi, Norio Hayashi, Satoshi Shimizu, Akio Yamamoto
  • Patent number: 8810285
    Abstract: In a semiconductor integrated circuit apparatus and a radio-frequency power amplifier module, a log detection portion including multiple-stage amplifier circuits, multiple level detection circuits, adder circuits, and a linear detection portion including a level detection circuit are provided. Output current from the log detection portion and output current from the linear detection portion are multiplied by different coefficients and the results of the multiplication are added to each other to realize the multiple detection methods. For example, current resulting from multiplication of the output current from the log detection portion by ×6/5 is added to the output current from the linear detection portion to realize a log detection method and, current resulting from multiplication of the output current from the log detection portion by ×? is added to current resulting from multiplication of the output current from the linear detection portion by ×3 to realize a log-linear detection method.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke Shimamune, Yasunobu Yoshizaki, Norio Hayashi, Takayuki Tsutsui
  • Patent number: 8811921
    Abstract: A radio frequency (RF) communications system, which includes power amplifier (PA) control circuitry and PA bias circuitry, is disclosed. The PA control circuitry identifies a selected communications mode of the RF communications system and a target output power from RF PA circuitry. The PA control circuitry selects a PA bias level of a driver stage of the RF PA circuitry and a PA bias level of a final stage of the RF PA circuitry based on the selected communications mode and the target output power. The PA bias circuitry establishes a PA bias level for the driver stage and a PA bias level for the final stage based on the selected PA bias levels of the driver stage and the final stage, respectively.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: August 19, 2014
    Assignee: RF Micro Devices, Inc.
    Inventors: David E. Jones, William David Southcombe, Brian Baxter, Roman Zbigniew Arkiszewski, Chris Levesque, Scott Yoder, Terry J. Stockert
  • Patent number: 8810318
    Abstract: There is provided a power amplifier. The power amplifier includes an amplification unit including at least one amplification device; a power generation unit generating an input signal supplied to the amplification unit; and a bias circuit unit controlling bias of the at least one amplification device according to the input signal, wherein the bias circuit unit supplies a predetermined bias voltage to the amplification unit before the input signal is applied to the amplification unit. According to the embodiments of the present invention, a delay phenomenon occurring at an initial driving time or a low power mode may be significantly reduced by supplying a predetermined bias signal to an amplification unit in a standby circuit before the bias circuit unit of the power amplifier normally outputs the bias signal to the amplification unit.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: August 19, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Jun Kyung Na
  • Patent number: 8791760
    Abstract: This disclosure relates to radio frequency (RF) amplification devices and methods for amplifying an RF input signal. To set the quiescent operating level of the RF output signal, a bias signal to be applied to the RF input signal is received prior to amplifying the RF input signal. The bias signal is amplified to generate the RF output signal at the quiescent operating level and a feedback signal is received that is indicative of the quiescent operating level of the RF output signal. Prior to amplifying the RF input signal, the bias signal level of the bias signal is adjusted such that the quiescent operating level is set to a reference signal level based on the feedback signal level. This allows for adjustments to be made to the quiescent operating level and maintain the quiescent operating level at a desired value.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: July 29, 2014
    Assignee: RF Micro Devices, Inc.
    Inventors: Praveen Varma Nadimpalli, Mike Landherr, Michael B. Thomas, Wonseok Oh
  • Publication number: 20140197890
    Abstract: A current source circuit includes a first transistor Q1, a second transistor Q2, a first resistor R1, and a second resistor R2. The first transistor Q1 has a first terminal (collector) coupled with the supply voltage (VCC), a second terminal (base) coupled with the first resistor R1, and a third terminal (emitter) coupled with the second resistor R2. The second transistor Q2 has a first terminal coupled with the second terminal of the first transistor Q1, a second terminal coupled with the third terminal of the first transistor Q1, and a third terminal coupled with the filtering circuit 39. The first resistor R1 is coupled between the supply voltage and a second terminal of the first transistor Q1. The second resistor R2 is coupled between a third terminal of the first transistor Q1 and the filtering circuit 39.
    Type: Application
    Filed: March 18, 2013
    Publication date: July 17, 2014
    Applicant: MICROELECTRONICS TECHNOLOGY, INC.
    Inventor: Ming Che LIOU
  • Patent number: 8766724
    Abstract: The apparatus and method thereof accurately sense and convert a radio frequency (RF) current signal to direct current (DC) independent of process variation and temperature, and without requiring high speed, high voltage amplifiers for its operation. The apparatus comprises an AC coupled circuit that couples the RF signal from the main device to a sense device with an N:M ratio, a low pass filter system that extracts the DC content of the RF current signal, and a negative feedback loop that forces the DC content of the main device and the sensed device to be equal. Exemplary embodiments include a current sensor that provides feedback to protect an RF power amplifier from over-current condition, and a RF power detection and control in a RF power amplifier (PA) that multiplies the sensed output current by the sensed output voltage to be used as a feedback to control the PA's bias.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: July 1, 2014
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Daniel Ho, Malcolm Smith
  • Publication number: 20140167854
    Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes a bias circuit, an output stage circuit and dynamic bias controlling circuit. The bias circuit receives a system voltage and the bias circuit provides a working voltage according to the system voltage. The output stage circuit receives the working voltage so as to work at an operation bias point. The dynamic bias controlling circuit receives the working voltage and outputs a compensation voltage to the bias circuit according to a variation of the working voltage. When the input power increases and makes the working voltage decreases so as to shift the operation bias point, the bias circuit adjusts the working voltage upward so as to recover the operation bias point according to the compensation voltage received.
    Type: Application
    Filed: November 19, 2013
    Publication date: June 19, 2014
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventors: JAW-MING DING, CHIEN-YEH LIU
  • Publication number: 20140159817
    Abstract: Devices and methods for correcting for start-up transients in integrated power amplifier are disclosed. A power amplifier is responsive to a bias control output and is arranged to provide an amplified power output. In some examples, the boost current is adjusted based on a supply voltage and an input power of the power amplifier. The power amplifier can operate in a low power and a high power mode and the adjustments can be made to the supply voltage and/or the input power vary depending on whether the power amplifier is operating in the high or low power mode. The adjustments for the high power mode operation are different than and correspond to the high power mode input power and voltage and the adjustments for the low power mode operation are different than and correspond to the low power mode input power and voltage.
    Type: Application
    Filed: November 26, 2013
    Publication date: June 12, 2014
    Applicant: MICROSEMI CORPORATION
    Inventors: Darcy Poulin, Kyle Hershberger, Brian Eplett, Mark Santini
  • Patent number: 8749309
    Abstract: A gate power control technique for a power amplifier (PA) provides practical improved efficiency at backed-off power levels. It can be applied to the main gate of the output stage of the PA, the cascode gate, or any combination thereof. Both voltage mode and current mode signal processing may be used. The gate power control can be implemented in both open-loop and closed-loop using AC and DC coupled drivers and output stages. It may further use one or more control ports in the radio frequency (RF) signal path.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: June 10, 2014
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Daniel Ho, Stephen Franck, Ying Shi, Baker Scott
  • Patent number: 8749310
    Abstract: An improved method for maintaining optimal amplifier bias current utilizing a signal conditioning element 0710 which serves to symmetrically condition a sense voltage 0105 such that the sense voltage 0105 distortion is substantially determined by properties of the signal conditioning element 0710 rather than by properties of the amplifier amplification devices 0101 or the input perturbing signal.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: June 10, 2014
    Inventor: Kevin M Hayes
  • Patent number: 8736376
    Abstract: There is provided a power amplifier module having a bias circuit, in which a bias power is supplied to an amplifier by differently setting an impedance between an input signal terminal and a reference power terminal and an impedance between the input signal terminal and a ground. The power amplifier module includes: an amplifier unit receiving a bias power to amplify an input signal; and a bias unit supplying the bias power to the amplifier, by differently setting an impedance between an input signal terminal transmitting the input signal therethrough and a reference power terminal transmitting a reference power having a predetermined voltage level and an impedance between the input signal terminal and a ground.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: May 27, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Gyu Suck Kim, Yoo Sam Na
  • Patent number: 8736377
    Abstract: A radio frequency (RF) generation module includes a power control module that receives first and second desired amplitudes of an output of the RF generation module in first and second respective states, and that outputs, based on the first and second desired amplitudes, input power setpoints corresponding to a transition from the first state to the second state. A frequency control module receives the input power setpoints and outputs frequency setpoints corresponding to the input power setpoints. A pulse shaping module receives the input power setpoints, the frequency setpoints, and an indication of when to transition from the first state to the second state, and transitions the output of the RF generation module from the first state to the second state based on the input power setpoints, the frequency setpoints, and the indication.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: May 27, 2014
    Assignee: MKS Instruments, Inc.
    Inventors: Amish Rughoonundon, Larry J. Fisk, II, Aaron T. Radomski
  • Patent number: 8717101
    Abstract: Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: May 6, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Ping Li, Paul T. DiCarlo
  • Patent number: 8704593
    Abstract: Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: April 22, 2014
    Assignee: Hollinworth Fund, L.L.C.
    Inventors: Alexandre Dupuy, Ajay Gummalla, Maha Achour
  • Patent number: 8706064
    Abstract: A system and method improve amplifier efficiency of operation relative to that of an amplifying transistor with a fixed bias current. A power level representing a level of transmission power from an amplifier circuit and an indicator of amplifier circuit operation are provided. The indicator is at least one of channel, channel bandwidth, out-of band spectral requirements, spectral mask requirements, error vector magnitude, modulation rate, and modulation type. The amplifying transistor is biased with a bias current that is determined based at least in part on the power level and the indication where the bias current is different for channels at an edge of a channel band than for channels nearer a center of the channel band.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 22, 2014
    Assignee: SiGe Semiconductor, Inc.
    Inventors: Alan J. A. Trainor, Grant Darcy Poulin, Craig Joseph Christmas
  • Patent number: 8692620
    Abstract: A power amplifier including a MOSFET including a source supplied with a first DC power, a gate connected to an RF input signal, and a drain connected to a power supply terminal of an RF power amplification unit; a supply voltage modulation control unit that determines a DC gate voltage of the MOSFET based on an envelope of the RF input signal; and a bypass circuit connected between the drain and the power supply terminal. The MOSFET outputs a second DC power via the drain and amplifies the RF input signal based on a third DC power substantially identical to a differential between the first and the second DC power, and also outputs an RF power via the drain. The bypass circuit receives and rectifies the RF power to supply a recycled DC power to the power supply terminal of the RF power amplification unit.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: April 8, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Moon Suk Jeon, Jung-Rin Woo, Sang Hwa Jung, Jung Hyun Kim, Young Kwon, Il Do Jung
  • Patent number: 8688061
    Abstract: A system and method for biasing a power amplifier includes a power amplifier having a driver stage and an output stage, the driver stage having a plurality of driver devices, a bias current source configured to deliver a bias current to each of the plurality of driver devices, and a current directing element configured to receive the bias current and selectively bias each of the plurality of driver devices based on a reference voltage and a system voltage.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: April 1, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Duane A. Green, Weiwei Shu, David Sawatzky
  • Patent number: 8686795
    Abstract: A power amplifier includes: an amplifier having a base into which input signals are input, a collector to which a collector voltage is supplied, and an emitter; and a bias circuit for supplying a bias current to the base of the amplifier. The bias circuit includes a first transistor having a first control terminal into which a reference voltage is input, a first terminal to which a power voltage is applied, and a second terminal connected to the base of the amplifier. A capacitance adjusting circuit elevates capacitance between a grounding point and at least one of the first control terminal and the first terminal when the collector voltage of the amplifier is lowered.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 1, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Okamura, Takayuki Matsuzuka
  • Patent number: 8665019
    Abstract: A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: March 4, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Po-Chih Wang
  • Patent number: 8666337
    Abstract: A system for power amplifier control saturation detection and correction includes a comparator configured to receive a power control signal and a detected power signal and generate a regulated voltage, a power amplifier configured to receive the regulated voltage and develop an output power, a power detector configured to sense the output power and develop the detected power signal, a saturation detector configured to receive the regulated voltage and a system voltage and determine whether the power amplifier is operating in a saturation mode during a transmit burst, and a current generator configured to reduce the power control signal when the power control signal exceeds a predetermined value and after expiration of a predetermined period of time, preventing the power control signal from exceeding the detected power signal.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: March 4, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: David S. Ripley, Paul R. Andrys, Matthew L. Banowetz
  • Patent number: 8665027
    Abstract: An amplifier for wireless receivers and an associated method is provided. The amplifier provides an output signal to an output terminal in response to an input signal received from an input terminal, and further includes a first block and a second block. The first block is coupled between the input terminal and the output terminal, and includes a gain control terminal and a first transistor. The gain control terminal is coupled to a gain control signal, while the gain control signal is provided such that the first transistor is kept operating in a triode region, and a gain of the output signal over the input signal can be seamlessly tuned in response to the gain control signal.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: March 4, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventors: Hung-Chuan Pai, Shou-Fang Chen
  • Publication number: 20140055202
    Abstract: An improved method for maintaining optimal amplifier bias current utilizing a signal conditioning element 0710 which serves to symmetrically condition a sense voltage 0105 such that the sense voltage 0105 distortion is substantially determined by properties of the signal conditioning element 0710 rather than by properties of the amplifier amplification devices 0101 or the input perturbing signal.
    Type: Application
    Filed: March 1, 2012
    Publication date: February 27, 2014
    Inventor: Kevin M. Hayes
  • Patent number: 8659358
    Abstract: An amplifier includes a detector configured to detect a given value used for monitoring a change in a gain of an amplifying element amplifying a signal in response to a gate voltage applied to a gate terminal, and a controller configured to judge, based on the detected given value, whether or not the gate voltage is to be increased, and to determine the increased gate voltage in response to the given value when the controller judges that the gate voltage is to be increased.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: February 25, 2014
    Assignee: Fujitsu Limited
    Inventors: Keiji Masuda, Takumi Takayashiki
  • Publication number: 20140049322
    Abstract: A power amplifier comprises a common source amplification stage and a first common gate amplification stage. The common source amplification stage includes a common source transistor for receiving a radio frequency (RF) input signal via a gate. The first common gate amplification stage is connected in cascode between a variable supply voltage source and the common source amplification stage, and amplifies an output of the common source amplification stage. The first common gate amplification stage includes a first common gate transistor, and a first gate bias controller configured to generate a first divided voltage based on a variable supply voltage of the variable supply voltage source, and to supply a first gate bias voltage generated by buffering the first divided voltage to a gate of the first common gate transistor.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 20, 2014
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Moon Suk JEON, Jung-Rin WOO, Sang Hwa JUNG, Jung Hyun KIM, Young KWON
  • Patent number: 8653895
    Abstract: A circuit has a reference source (12) for supplying a bias signal to set a small signal transconductance of an amplifier transistor in an amplifier (10) to a predetermined value. The reference source has at least one reference transistor (120a-b, 30). A feedback circuit (128, 129, 38) has an input coupled to the main current channel of the reference transistor or reference transistors (120a-b, 30) and an output coupled to the control electrode of the reference transistor or reference transistors (120a-b, 30). The feedback circuit controls a control voltage at the control electrode, so as to equalize an offset current and a difference between main currents flowing through the current channel of the reference transistor or reference transistors (120a-b, 30), obtained with and without a small voltage offset added to the control voltage.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: February 18, 2014
    Assignee: NXP, B.V.
    Inventor: Gerben Willem deJong
  • Patent number: 8648659
    Abstract: A digital pre-distortion (DPD) power amplifying apparatus and a method for digitally controlling synchronization of the DPD power amplifying apparatus, which includes a power amplifier, a bias shifter and a DPD unit, are provided. The method includes acquiring a DPD path delay time at a path along which an input signal is fed back to the DPD unit; delaying an input signal incoming to the power amplifier by the DPD path delay time and acquiring synchronization by delaying a bias signal a predetermined number of times until the bias signal and the delayed input signal are synchronized with each other; and in response to synchronization between the bias signal and the delayed input signal being established, pre-distorting the input signal according to a feedback signal output from the power amplifier.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: February 11, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung-Hoon Oh, Joon-Hyung Kim, Gweon-Do Jo, Young-Hoon Kim
  • Patent number: 8629717
    Abstract: Provided is a power consumption control circuit, an amplifier circuit and a power consumption control method which control the power consumption associated with an amplification action in real time. A power consumption control circuit of the present invention comprises: a detection means which detects the presence or absence of an input of a digital input signal, spending a first period of time; a signal delay means which delays the digital input signal by a second period of time equivalent to the first period of time, and outputs the delayed signal; a digital-to-analog conversion means which converts the delayed signal into an analog signal, and outputs the analog signal; an amplification means which generates an amplification action when a bias is applied to it; and a bias control means which applies a bias to an amplification device, on the basis of a detection result obtained by the detection means.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: January 14, 2014
    Assignee: NEC Corporation
    Inventor: Yoshiaki Doi
  • Patent number: 8626092
    Abstract: Aspects of the present disclosure relate to a current multiplier that can generate an output current with high linearity and/or high temperature compensation. Such current multipliers can be implemented by complementary metal oxide semiconductor (CMOS) circuit elements. In one embodiment, the current multiplier can include a current divider and a core current multiplier. The current divider can generate a divided current by dividing an input current by an adjustable division ratio. The division ratio can be adjusted, for example, based on a comparison of the input current with a reference current. The core current multiplier can generate the output current based on multiplying the divided current and a different current. According to certain embodiments, the output current can be maintained within a predetermined range as the input current to the current divider varies within a relatively wide range.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 7, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Hui Liu, Duane A. Green, David Anthony Sawatzky
  • Patent number: 8624678
    Abstract: A power amplifier (PA) using switched-bulk biasing to minimize the risk of output stage snapback effect is disclosed. An adaptive biasing of the output stage prevents device breakdown while accommodating large voltage swings. These protection techniques can be applied to all types of cascode configurations of a PA, including single-ended, differential, quadrature, segmented and any combination thereto.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: January 7, 2014
    Assignee: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Baker Scott, George Maxim, Stephen Franck
  • Patent number: 8624675
    Abstract: A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.
    Type: Grant
    Filed: May 28, 2012
    Date of Patent: January 7, 2014
    Inventor: Lloyd Lautzenhiser
  • Patent number: 8618876
    Abstract: An exemplary embodiment discloses a digital control block for dynamically regulating power consumption of the transmitter; and a first driver amplifier circuit comprising a plurality of bias-modes each corresponding to a power consumption level in the transmitter, the digital control block to instruct the first driver amplifier circuit to operate in a selected bias-mode to regulate power consumption of the transmitter.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: December 31, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Junxiong Deng, Gurkanwal Singh Sahota, Prashanth Akula, Thomas Marra, Vladimir Aparin
  • Patent number: 8600315
    Abstract: Methods and systems for a configurable front end are disclosed. Aspects of one method may include a transceiver on a single chip that may comprise a power amplifier (PA) and a low noise amplifier (LNA). The PA may amplify signals to be transmitted over a range of output transmit power. An upper limit for a power range may of substantially 12 dBm. The LNA may be tolerant to PA signals by, for example, being configured to follow signal voltages generated from an output of the power amplifier. For example, each input transistor of the LNA may be isolated from other transistors in the LNA. Accordingly, the input transistors may float since they may not be tied to a voltage level via other transistors. This may allow the input transistors to avoid damage. The transceiver may also be configured for differential RF input, differential RF output, single-ended RF input, and/or single-ended RF output.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: December 3, 2013
    Assignee: Broadcom Corporation
    Inventors: Razieh Roufoogaran, Iqbal Bhatti
  • Patent number: 8598953
    Abstract: A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage or control signals. A power amplifier module includes at least one current minor and a controller. A capacitor is coupled to the current minor. The controller provides a bias current in an amount proportional to an input to a voltage-to-current converter. The controller receives a control signal that directs the controller to apply one of a pre-charge voltage and a nominal voltage to the voltage-to-current converter.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: December 3, 2013
    Assignee: Skyworks Solutions, Inc.
    Inventors: Robert Michael Fisher, Michael L. Hageman, David S. Ripley
  • Patent number: 8593223
    Abstract: In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a calculated voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: November 26, 2013
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Hideyuki Nosaka, Makoto Nakamura, Koichi Murata, Masatoshi Tobayashi, Yasunobu Inabe, Eisuke Tsuchiya
  • Publication number: 20130307625
    Abstract: Devices and methods for correcting for start-up transients in integrated power amplifiers are disclosed. A delay element is arranged to produce a delay waveform signal that is responsive to an input voltage signal. A transconductance element has an input that receives the delay waveform signal and is arranged to provide an output boost current that is based on the delay waveform signal and a gain of the transconductance element. A reference element provides an output bias current that is responsive to a static reference current and the boost current. A bias element has an input that receives the bias current and is arranged to provide a bias control output. A power amplifier is responsive to the bias control output and is arranged to provide an amplified power output. In some examples, the boost current is adjusted based on a supply voltage and an input power of the power amplifier.
    Type: Application
    Filed: May 17, 2013
    Publication date: November 21, 2013
    Applicant: Microsemi Corporation
    Inventors: Kyle Hershberger, Brian Eplett, Mark Santini