Abstract: A capacitive sensor amplifier circuit comprising: a capacitive sensor; a bias voltage supply connected across the capacitive sensor via a bias resistor; an operational amplifier having an input connected to the capacitive sensor; and a feedback capacitor connected between the input and an output of the amplifier, the input and output being of the same sign.

Abstract: An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to nth output systems (n is a natural number more than 1); first to nth output nodes; an output pad; and first to nth electrostatic protection resistances. An ith output system (i is a natural number between 2 and n) of the first to nth output systems includes an ith PMOS transistor having a drain connected with the ith output node of the first to nth output nodes and a gate connected with a first output of the differential amplifier stage; and an ith NMOS transistor having a drain connected with the ith output node and a gate connected with a second output of the differential amplifier stage. The first to nth electrostatic protection resistances are respectively connected between the first to nth output nodes and the output pad.

Abstract: An amplifier circuit includes a first amplifier stage having a first output node; a second amplifier stage having a second output node; and a compensation block electrically coupled between the first and second output nodes. The compensation block has a compensation capacitor electrically coupled to the first node and electrically connectable to the second node, and has an impedance electrically connectable to the compensation capacitor. The compensation capacitor is electrically coupled via a switch to the impedance such that the compensation capacitor can contribute a zero to shunt branch formed by the compensation capacitor and impedance when the compensation capacitor is disconnected from the second node.

Abstract: An operational amplifier includes a differential amplifier input stage that supplies an operating current to a differential pair, the differential amplifier input stage including a first transistor having a first polarity, a push-pull amplifier output stage that includes a second transistor having the first polarity, and a third transistor having a second polarity, the second transistor and the third transistor being connected in series, and a capacitive element that connects a gate of the first transistor and a gate of the second transistor.

Abstract: Provided is an output buffer for a source driver of an LCD with a high slew rate, and a method of controlling the output buffer. The output buffer, which outputs a source line driving signal for driving a source line of the LCD, includes: an amplifier section amplifying an analog image signal; an output section outputting the source line driving signal in response to a signal amplified by the amplifier section; and a slew rate controller section, setting a capacitance of a capacitor section to a first capacitance, during a first charge sharing period in which the source line is precharged to a first precharge voltage, setting the capacitance of the capacitor section to a second capacitance smaller than the first capacitance during a second charge sharing period in which the source line driving signal is supplied to the source line, and setting the capacitance of the capacitor section to the first capacitance while the source line driving signal is maintained after the second charge sharing period.

Abstract: The present disclosure relates to phase margin modification in operational transconductance amplifiers.

Abstract: An apparatus for an improved operational amplifier. The disclosed improved operational amplifier comprises an operational amplifier, a first feedback circuit, and one or more secondary feedback circuits. The operational amplifier include a plurality of serially coupled gain stages and is configured so that an output of each gain stage drives an input of a next gain stage and an output of a last gain stage drives a load external to the improved operational amplifier. The first feedback circuit is coupled between an output of a designated gain stage and an output of a previous gain stage to provide a first feedback to the previous gain stage. Each secondary feedback circuit provides an additional feedback to the output of the previous gain stage.

Abstract: The present invention includes operational amplifier for an active pixel sensor that detects optical energy and generates an analog output that is proportional to the optical energy. The active pixel sensor operates in a number of different modes including: signal integration mode, the reset integration mode, column reset mode, and column signal readout mode. Each mode causes the operational amplifier to see a different output load. Accordingly, the operational amplifier includes a variable feedback circuit to provide compensation that provides sufficient amplifier stability for each operating mode of the active pixel sensor. For instance, the operational amplifier includes a bank of feedback capacitors, one or more of which are selected based on the operating mode to provide sufficient phase margin for stability, but also considering gain and bandwidth requirements of the operating mode.

Abstract: A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result.

Abstract: An operational amplifier having a first amplification stage with an input terminal to receive a signal to be amplified, and a first output terminal, and a second amplification stage having a first input terminal connected to the first output terminal, and an output terminal to provide the amplified signal. The first and second amplification stages define, between the input terminal and the output terminal, a signal transfer function having first and second poles. The amplifier further includes a decoupling stage having a further input terminal connected to the first stage input terminal, and a further output terminal connected to the second stage output terminal. The decoupling stage is so arranged as to introduce at least one zero in the operational amplifier transfer function.

Abstract: A rail-to-rail Miller compensation method without feed forward path includes forming a first compensation branch including a first amplifier, wherein an input of the first amplifier is electrically connected with an output of a second stage gain amplifier, the second stage gain amplifier is electrically connected the first stage gain amplifier in series forming an operational amplifier; and forming a second compensation branch including a second amplifier, wherein a dual relation is provided between an input stage of the first amplifier and that of the second amplifier, namely, if the input stage of the first amplifier is N-type, the input stage of the second amplifier is P-type, and vice versa. The present invention is capable of achieving the rail-to-rail output range without affecting the system stability. The N-type and P-type inputs are simultaneously applied to the input of the amplifier of the compensation branches.

Abstract: A circuit includes a differential amplifier unit that receives an input signal at a non-inverting input thereof, a constant current source, a load circuit, an output transistor that receives an output of the differential amplifier unit as an input and drives a load circuit, a phase compensation circuit including a variable resistor and a capacitor connected in series between the input of the output transistor and a feedback path, an output current monitor circuit that detects an output current flowing through the output transistor, and a bias voltage generation circuit that varies a resistance value of the variable resistor in accordance with a result of the detection of the output current by the output current monitor circuit. A signal obtained by voltage dividing an output of the output transistor by resistors is supplied to an inverting input of the differential amplifier unit.

Abstract: A three-stage frequency-compensated operational amplifier includes a first-stage circuit, a second-stage circuit incorporated with a first compensation circuit, a third-stage circuit, and a second compensation circuit. The three-stage frequency-compensated operational amplifier functions as a two-stage operational amplifier at high frequencies, thereby capable of driving large capacitive loads with low power consumption.

Abstract: When a semiconductor circuit, in which a stabilizing capacitor 2 for stabilizing a reference voltage Vbias is connected to a reference voltage terminal RT, recovers from a power down state to an operational state, a current mirror circuit 40 provides current mirroring of a current Ia of a first current path Ph1, which generates an OFF threshold voltage ref1 of a hysteresis comparator 1, to generate a current Ib of a second current path Ph2, which generates the reference voltage Vbias. The reference voltage Vbias is input to the comparator 1 as an input voltage vin. When the reference voltage Vbias becomes equal to the OFF threshold voltage ref1, the comparator 1 immediately stops the charging of the stabilizing capacitor 2 by a current source I1.

Abstract: An electronic device includes an operational amplifier, with the operational amplifier having an amplifier input stage coupled with a first output node to an amplifier output stage. A compensation capacitance is connected between an output node of the amplifier output stage and the first output node of the amplifier input stage, thereby operating as a compensator for stabilizing the operational amplifier. The compensation capacitance provides a parasitic diode drawing a first leakage current from the first output node of the amplifier input stage, a leakage current compensation circuit being coupled to the first output node of the amplifier input stage and coupled to a second output node of the amplifier input stage for drawing a first current from the first output node and a second current from the second output node. The leakage current compensation circuit is adapted such that the second current is greater than the first current by an amount corresponding to the first leakage current.

Abstract: An operational amplifier in accordance with one embodiment of the present invention includes a differential amplifier circuit to perform differential amplification of an input signal with respect to a reference potential Vbias, an output circuit to output a signal amplified by the differential amplifier circuit, a phase compensation capacitance connected between the output of the differential amplifier circuit and the output of the output circuit to compensate the phase of the signal output from the output circuit, and a diode connected in parallel with the phase compensation capacitance.

Abstract: The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values.

Abstract: An output stage for an amplifier is provided. The amplifier generally provides for compensation of an error current generated by the base-collector (or gate-drain) capacitance of a common base (or gate) amplifier transistor. The stage accomplishes this by utilizing a three transistor Wilson current mirror to combine the error current with a mirrored bias current to reduce the load current on the common base (or gate) amplifier transistor.

Abstract: Provided is an output buffer for a source driver of an LCD with a high slew rate, and a method of controlling the output buffer. The output buffer, which outputs a source line driving signal for driving a source line of the LCD, includes: an amplifier section amplifying an analog image signal; an output section outputting the source line driving signal in response to a signal amplified by the amplifier section; and a slew rate controller section, setting a capacitance of a capacitor section to a first capacitance, during a first charge sharing period in which the source line is precharged to a first precharge voltage, setting the capacitance of the capacitor section to a second capacitance smaller than the first capacitance during a second charge sharing period in which the source line driving signal is supplied to the source line, and setting the capacitance of the capacitor section to the first capacitance while the source line driving signal is maintained after the second charge sharing period.

Abstract: An amplifier arrangement includes an output amplifier stage (OA) comprising a stage input (SIN), a stage output (SOUT) which is coupled to a signal output (OUT) of the amplifier arrangement, and a capacitive element (CE) which couples the stage output (SOUT) to the stage input (SIN). A driver stage (DR) comprises a driver input (DIN) and a driver output (DOUT) which is coupled to the stage input (SIN). The driver stage (DR) is configured to generate a voltage potential at a driver output (DOUT) depending on an input current at the driver input (DIN) and to provide a charging current to the capacitive element (CE) being higher than the input current.

Abstract: A low noise amplifier having a wide operating frequency band and a high dynamic range is provided. A transformer having a secondary winding connected between an input terminal to which an input signal is applied and a positive differential output terminal, and a primary winding connected between a negative differential output terminal and an input node is provided as a feedback circuit between a cascode amplifier circuit, which includes transistors and a resistor, and an output circuit, which includes a transistor and a constant current source. Selective use of a transformer whose leakage inductance has an adequate value as the feedback transformer can realize a low noise amplifier which has a wide operating frequency band and a high dynamic range.

Abstract: This disclosure relates to load compensating multi-stage amplifier structures at an output of one of the amplifier stages.

Abstract: A preamplifier circuit for processing a signal provided by a radiation detector includes a transimpedance amplifier coupled to receive a current signal from a detector and generate a voltage signal at its output. A second amplification stage has an input coupled to an output of the transimpedance amplifier for providing an amplified voltage signal. Detector electronics include a preamplifier circuit having a first and second transimpedance amplifier coupled to receive a current signal from a first and second location on a detector, respectively, and generate a first and second voltage signal at respective outputs. A second amplification stage has an input coupled to an output of the transimpedance amplifiers for amplifying the first and said second voltage signals to provide first and second amplified voltage signals.

Abstract: A dual reactive shunt feedback low noise amplifier design may include a transconductance amplifier having a capacitor coupled across it and a pair of coupled inductors coupled across it. In one embodiment, the coupled inductors may be laid out as two overlapping coils.

Abstract: An amplifier includes an amplifier module coupled to an input node, and an attenuating module. The attenuating module includes an attenuation resistor coupled to the input node, and an impedance compensation module coupled to the input node. The impedance compensation module compensates an input impedance when an input RF signal is attenuated by the attenuating module.

Abstract: A differential two-stage Miller compensated amplifier system with capacitive level shifting includes a first stage differential transconductance amplifier including first and second output nodes and an output common mode voltage, a second stage differential transconductance amplifier including non-inverting and inverting inputs and outputs and an input common mode voltage, and a level shifting capacitor circuit coupled between the first and second output nodes and the non-inverting and inverting inputs for level shifting between the output common mode voltage of the first stage and the input common mode voltage of the second stage.

Abstract: A frequency compensation circuit internal to an integrated circuit which comprises a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a first output current and a second output configured to output a second output current; and a compensation circuit connected to said second output of said transconductance amplifier, wherein said first output is connected to said second input.

Abstract: Disclosed is a differential amplifier system that maintains high speed characteristics of the differential amplifier while providing stability from a common-mode loop by using dominant pole compensation. The disclosed system includes a first and second transconductance stage, a circuit having high impedance, and a compensation circuit.

Abstract: This disclosure relates to monitoring signal overshoot of an amplifier generated signal and automatically adjusting a quiescent current of the amplifier as a function of the monitored signal overshoot.

Abstract: A semiconductor integrated circuit has an amplifier circuit which includes a phase compensating capacitor and has a feedback loop, and a stability determining and adjusting circuit which measures an amplitude of a voltage outputted from the amplifier circuit at a predetermined plurality of frequencies and adjusts a capacitance value of the phase compensating capacitor on the basis of a ratio between measured values of the amplitude.

Abstract: Circuits and methods are provided for providing high speed operational amplifiers and, in particular, operational amplifiers having frequency compensation circuits that provide improved slew rates with low power dissipation when configured with feedback. Frequency compensation schemes are provided to enable dynamic configuration of frequency compensation circuits implementing miller compensation whereby nodal connections of compensation capacitors are changed during driver setup and driving periods such that compensation capacitors are connected to source voltages to rapidly charge/discharge compensation capacitors using supply source currents during setup period, while providing frequency compensation during the setup and driving periods to maintain circuit stability and prevent oscillation of an output voltage due to the feedback.

Abstract: An amplifier circuit with internal zeros provides a second pole in addition to a first pole and two zeros such that the second pole can prevent excessive gain at high frequency, so as to have high-frequency noise under control.

Abstract: A semiconductor device includes a phase compensation circuit 6 using a MOS capacitor with a structure in which an insulating film is disposed between a gate electrode formed on a semiconductor substrate and a diffusion layer. The phase compensation circuit includes first and second MOS capacitors 14, 15. A gate electrode terminal of the first MOS capacitor is connected equivalently to a diffusion layer terminal of the second MOS capacitor that is a terminal opposite to the gate electrode terminal. A potential difference generating element 16 that generates a potential difference by allowing a current to flow therethrough is connected between a diffusion layer terminal of the first MOS capacitor and a gate electrode terminal of the second MOS capacitor. When the MOS capacitors having the voltage dependence are used, e.g.

Abstract: A frequency compensated operational amplifier includes: an input stage, for receiving an input signal; an output stage, coupled to the input stage, for generating an output signal according to an output of the input stage; a first current source, for providing a first bias current; a second current source, for providing a second bias current identical to the first bias current; an Ahuja compensation circuit, comprising: a matched transistor pair, coupled to the first current source and the second current source; a capacitor coupled between the matched transistor pair and the output stage; and a transconductance boosting circuit, coupled to the matched transistor pair, for boosting transconductance of the matched transistor pair.

Abstract: An embodiment of an amplifier circuit comprising a succession of amplification stages having at least a first amplification stage receiving a first signal and a second amplification stage downstream of the first amplification stage; a stage of unity gain capable of receiving the first signal and of providing a second signal corresponding to the low-impedance copy of the first signal; and a third amplification stage having its input connected to the output of the stage of unity gain by a capacitor and having its output connected to the output of the second amplification stage.

Abstract: Parasitic coupling effects between RF or microwave transistors provided in a common package are compensated by connecting one or more capacitors between the transistors. By connecting the capacitor(s) at a location that corresponds to the site of the coupling, the compensation is effective over a wide frequency band. This coupling-compensation makes it feasible to provide, in a common package, RF or microwave transistors intended to operate in quadrature, thereby improving performance matching and operating efficiency of the overall device.

Abstract: A wideband amplifier having an amplifier input terminal and an amplifier output terminal includes at least one transistor coupled to the amplifier input terminal and an impedance element coupled between the amplifier input terminal and the amplifier output terminal. A feedback signal is transmitted between the amplifier output terminal and the amplifier input terminal by way of the impedance element wherein the feedback signal varies in accordance with changes in an impedance of the impedance element so as to peak a frequency response of the amplifier.

Abstract: A frequency compensated operational amplifier includes: an input stage, for receiving an input signal; an output stage, coupled to the input stage, for generating an output signal according to an output of the input stage; a first current source, for providing a first bias current; a second current source, for providing a second bias current identical to the first bias current; an Ahuja compensation circuit, comprising: a matched transistor pair, coupled to the first current source and the second current source; a capacitor coupled between the matched transistor pair and the output stage; and a transconductance boosting circuit, coupled to the matched transistor pair, for boosting transconductance of the matched transistor pair.

Abstract: An operational amplifier includes a differential amplifier connected between an input and an output port of the operational amplifier, a phase compensator capacitance connected between the differential amplifier and the output port, a switching transistor for controlling the connection between the phase compensator capacitance and the differential amplifier, a detection transistor responsive to a potential difference between the input and output ports to be rendered conductive, and a control transistor responsive to the detection transistor for controlling the switching transistor. The operational amplifier has its slew rate improved without detracting from stability against oscillation and continuity of the output waveform.

Abstract: An amplifier structure includes shield conductors that are provided spatially adjacent to elongated feedback signal lines that couple a feedback circuit to an amplifier input. The shield conductors are provided between the feedback signal lines and a ground plane, which interrupts a parasitic capacitance that otherwise would be established between the feedback signal line and ground. The shield conductors are electrically coupled to the amplifier's outputs which create a capacitance between the output terminal and the feedback signal line. In some embodiments, the capacitance generated between the output terminal and the feedback signal line can suffice as a capacitor in a feedback path of the amplifier and be contained in an integrated circuit die on which the amplifier is manufactured. Optionally, a structure may be provided that eliminates common mode signals on the feedback lines while simultaneously preserving the common mode signals on the amplifier output terminals.

Abstract: An integrated amplifier may include a transconductance stage including a differential pair of input transistors of a first type of conductivity, respective resistive loads coupled to said input transistors, and a first bias circuit coupled to the input transistors. The first bias circuit may include a second differential pair of bias transistors having first conduction terminals coupled in common and second conduction terminals coupled to respective conduction terminals of the input transistors. The first bias circuit may also include respective second bias circuits coupled to the bias transistors to enable the input transistors in a conduction state with the input transistors being biased by a same respective bias current that flows through the respective input transistors. The first bias circuit may also include a capacitive network coupled to the bias transistors to define with the input transistors a feedback loop.

Abstract: A method of compensating a monolithic integrated operational amplifier against process and temperature variations, such that the operational amplifier is suitable for use in an active filter, the method comprising a providing an amplifier having a first stage and an output stage, wherein the output stage drives an RC load, and wherein a compensation capacitor at an output of the first stage is selected so as to scale with the capacitance C of the RC load, and a transconductance of the first stage is a function of the resistance R of the RC load.

Abstract: This disclosure relates to monitoring signal overshoot of an amplifier generated signal and automatically adjusting a quiescent current of the amplifier as a function of the monitored signal overshoot.

Abstract: An OP amplifier including an input stage and an output stage for improving a slew rate is provided. The input stage receives one of input voltages, and generates an internal voltage according to the received input voltage. The output stage receives and gains the internal voltage, and outputs an output voltage. The output stage includes a first transistor, a plurality of first capacitors and a first switching unit. The first transistor includes a first source/drain terminal coupled to a first voltage, a gate terminal controlled by the internal voltage. The output stage outputs the output voltage according to a voltage at a second source/drain terminal of the first transistor. First terminals of the first capacitors are coupled to the second source/drain terminal of the first transistor. The first switching unit selectively transmits the internal voltage to the second terminal of a corresponding one of the first capacitors.

Abstract: An amplifier in an embodiment of the present invention has MOS transistors connected serially between a power supply VDD and a ground terminal GND; an output terminal Vout connected to a node provided between the MOS transistors; a first mirror capacity provided between the gate of a MOS transistor and the output terminal Vout; and a second mirror capacity provided between the gate of another MOS transistor and the output terminal Vout. The amplifier further includes a first switching circuit for connecting one end of the first mirror capacity to the power supply terminal VDD or to the gate of a MOS transistor; and a second switching circuit for connecting one end of the second mirror capacity to the ground terminal GND or to the gate of another MOS transistor.

Abstract: Disclosed is a differential amplifier system that maintains high speed characteristics of the differential amplifier while providing stability from a common-mode loop by using dominant pole compensation. The disclosed system includes a first and second transconductance stage, a circuit having high impedance, and a compensation circuit.

Abstract: An operational amplifier is dynamically compensated depending on the internal state of the operational amplifier. Compensation is fully enabled only when the internal state indicates a risk of instability. When the internal state of the operational amplifier indicates there is no risk of instability, the compensation is totally or partially turned off.

Abstract: A programmable gain amplifier includes an operational amplifier coupled thereto a plurality of resistors to perform a feedback control, thereby rendering a closed-loop gain A f ? ( s ) = A ? ( s ) 1 + A ? ( s ) · ? , where ? is a feedback factor determined by the resistance of the resistors and A(s) is an open-loop gain of the operational amplifier. The operational amplifier includes a first-stage amplifying circuit, a second-stage amplifying circuit, and a compensating capacitor coupled to an output end of the first-stage amplifying circuit and having an equivalent capacitance variable to adjust a dominant-pole frequency of the open-loop gain of the operational amplifier.

Abstract: A pre-emphasis circuit and methods are provided. The circuit includes a first amplifier and a second amplifier. The first amplifier contains M first driver cells and is operable to amplify a signal. The second amplifier contains P second driver cells and is operable to amplify a delayed version of the signal The pre-emphasis circuit further includes logic circuit operable to change a pre-emphasis ratio of the pre-emphasis circuit including switching off one or more of the M first driver cells of the first amplifier and switching on a corresponding one or more of the P second driver cells of the second amplifier, such that a swing amplitude for an output signal provided by the pre-emphasis circuit is maintained at a constant level.

Abstract: A differential amplifier receives a differential input signal and generates an output signal at an output node. An auxiliary circuit coupled to the differential amplifier operates to improve slew rate response. In quiescent and small signal situations with respect to the differential input signal, the auxiliary circuit does not alter or change operation of the differential amplifier. However, in situations where a large signal change is experienced with respect to the differential input signal, the auxiliary circuit functions to speed up the sourcing and sinking current to/from the output node. A stability compensation capacitor coupled to the output node is accordingly more quickly charged or discharged and an improvement in slew rate performance of the differential amplifier is experienced.