Sum And Difference Amplifiers Patents (Class 330/69)
  • Publication number: 20110221521
    Abstract: A current boost circuit acts as an “eye opener” for a digital bus line. A controlled current injects a fraction of the normal signaling current magnitude from a source driver onto the bus line, after a transition between the two logical states on the bus line is detected. The duration of the additional current injection is a fraction of the unit interval. In one embodiment, a linear system uses the summation of a proportional boost current and a delayed and negated proportional boost current. In another embodiment, a positive or negative edge detection circuit triggers a monostable pulse generator that controls the injection of short bursts of additional current into the bus lines. In some embodiments the boost current is suppressed when the bus line is driven from a driver other than the source driver.
    Type: Application
    Filed: December 13, 2010
    Publication date: September 15, 2011
    Inventors: Charles Razzell, Hong Sair Lim, Batuhan Okur, Jerome Tjia, Tue Fatt David Wee
  • Publication number: 20110204971
    Abstract: A differential voltage sensing method for achieving input impedance matching comprises the steps of: providing a first bio-potential signal to a first variable resistor for generating a first signal; providing a second bio-potential signal to a second variable resistor for generating a second signal; differentially amplifying first and second signals for generating a third signal; selecting an operation band of the third signal for generating first and second logic signals; and dynamically adjusting one of the impedances of the first and second variable resistors according to the first and second logic signals, wherein each of the first and second bio-potential signals has a common signal voltage level and a differential signal voltage level.
    Type: Application
    Filed: May 21, 2010
    Publication date: August 25, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen Ying CHANG, Cheng Hung Chang, Ying Ju Chen
  • Patent number: 7999612
    Abstract: An operational amplifier includes an input stage for generating a first differential output signal pair according to a first differential input signal pair, an output stage for generating a second differential output signal pair according to at least a second differential input signal pair, and a high-pass filtering circuit coupled between the input stage and the output stage for performing high-pass filtering on the first differential output signal pair, for generating the at least a second differential input signal pair.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 16, 2011
    Assignee: Ralink Technology Corp.
    Inventor: Yi-Bin Hsieh
  • Patent number: 7994863
    Abstract: An electronic system generates at least one floating supply voltage, wherein during operation of the circuit the floating supply voltage tracks a common mode voltage of first and second differential input signals. By tracking the common mode voltage, in at least one embodiment, the floating supply voltage adjusts as the common mode voltage changes. Thus, the floating supply voltages can be based upon the peak-to-peak values of the first and second output signals without factoring in the common mode voltage. In at least one embodiment, the electronic system provides the floating supply voltages to an amplifier. The amplifier amplifies the first and second differential input signals and generates differential output signals. A differential sampling circuit samples the differential output signals to cancel the common mode voltage from the differential output signals. In at least one embodiment, an analog-to-digital converter converts the sampled differential output signals into a digital output signal.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: August 9, 2011
    Assignee: Cirrus Logic, Inc.
    Inventors: Edmund M. Schneider, Murari L. Kejariwal, Stephen T. Hodapp, John L. Melanson
  • Publication number: 20110169565
    Abstract: A receiving circuit in accordance with an exemplary aspect of the present invention includes a first voltage-dividing circuit that outputs a first input signal obtained by voltage division of one of differential signals based on the resistance ratio between first and second resistors, a second voltage-dividing circuit that outputs a second input signal obtained by voltage division of the other of the differential signals based on the resistance ratio between third and fourth resistors, a differential amplifier that amplifies the differential component between the first and second input signals, a common-mode voltage detection circuit that detects the common-mode voltage of the differential signals, and a bias voltage switching circuit that switches the voltage value of a bias voltage based on the common-mode voltage.
    Type: Application
    Filed: January 12, 2011
    Publication date: July 14, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Wataru Nakamura
  • Publication number: 20110156811
    Abstract: A voltage detection circuit includes operational amplifiers, a battery, and a voltage circuit. The voltage circuit offsets the inverting input terminals and non-inverting input terminals of the operational amplifiers to the positive side with reference to a ground GND.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 30, 2011
    Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yusuke SHINDO, Tsuneo MAEBARA, Keisuke HATA
  • Patent number: 7965139
    Abstract: Conventional multistage amplifiers oftentimes employ trim circuits or highly matched components to combat noise and offset contributions. Having trim circuitry or highly matched components increases the overall size, cost, and power consumption, so it is desirable to have a circuit that reduces any need for better matching components or trim circuitry. Here, a multistage amplifier system is provided that generally accounts for some noise and offset contributions, reducing the need for better matching components and/or trim circuitry.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: June 21, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Adam L. Shook
  • Patent number: 7961042
    Abstract: An amplifier circuit, includes: a first amplifier; a second amplifier; a first capacitor connected to the first amplifier; a second capacitor having one terminal connected to the first amplifier, another terminal connected to the second input terminal; and a first switch circuit switching a connection of the output terminal, the another terminal of the first capacitor, the first input terminal and the second input terminal, and switching supplying a reference potential supply, the first switch circuit including: a first state connecting the first input terminal to the second input terminal, connecting the output terminal to the another terminal of the first capacitor, and supplying the second input terminal with the reference potential, a second state connecting the first input terminal to the another terminal of the first capacitor and providing the output terminal and the second input terminal in an open state.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: June 14, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toru Takeda
  • Patent number: 7952427
    Abstract: A signal amplifier circuit includes peak value holding circuit 11 receiving positive-phase input signal, peak value holding circuit 12 receiving negative-phase input signal, adder 13 adding the positive-phase input signal and output signal of peak value holding circuit 12, adder 14 adding the negative-phase input signal and output signal of the peak value holding circuit 11, non-inverting amplifier 15 amplifying output signal of adder 13, non-inverting amplifier 16 amplifying output signal of adder 14, peak value holding circuit 21 receiving positive-phase output signal of non-inverting amplifier 15, peak value holding circuit 22 receiving negative-phase output signal of non-inverting amplifier 16, adder 23 adding the positive-phase output signal and output signal of peak value holding circuit 22, adder 24 adding the negative-phase output signal and output signal of peak value holding circuit 21, and differential amplifier 29 amplifying difference between output signals of adders 23 and 24.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: May 31, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Takeshi Nagahori
  • Patent number: 7952428
    Abstract: A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: May 31, 2011
    Assignee: Intersil Americas Inc.
    Inventors: Philip V. Golden, Marc T. Thompson
  • Publication number: 20110115565
    Abstract: Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.
    Type: Application
    Filed: May 19, 2010
    Publication date: May 19, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventor: Jose Cabanillas
  • Patent number: 7929989
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: April 19, 2011
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Publication number: 20110080214
    Abstract: An output amplifier includes a differential stage having a reference voltage supplied to a first input, a first output stage that receives an output of the differential stage, a second output stage whose output is connected to a load, a capacitor element having a first end connected to a second input of the differential stage, and connection control circuits that control switching of first and second connection modes. In the first connection mode, there are provided a non-conductive state between output of the differential stage and input of the second output stage, a non-conductive state between output of the first output stage and output of the second output stage, a conductive state between output of the first output stage and the second input of the differential stage, and voltage of a second end of the capacitor element is an input voltage from the input terminal.
    Type: Application
    Filed: October 6, 2010
    Publication date: April 7, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroshi TSUCHI
  • Patent number: 7916133
    Abstract: A buffer circuit is driven with a low voltage and operates at a high speed has first and second comparators constituted by P channel and N channel MOS transistors provided between an input terminal and an output terminal of a buffer amplifier. A predetermined offset voltage is set for the comparing operation, and a switch circuit turns ON/OFF in response to an output signal from the first comparator and the output signal of the second comparator. A leading up of an output voltage from the buffer amplifier is accelerated by the current flowing from a power source line to the output terminal. The buffer circuit also includes an operation restricting circuit for restricting the comparing operation of the second comparator in a range of a dead band of the transistors.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: March 29, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Hiroyuki Inokuchi
  • Publication number: 20110068862
    Abstract: A feedback amplifier comprises a differential amplifier equipped with differential input terminals and differential output terminal and a first amplifier, wherein the differential output terminal is connected to input terminal of the first amplifier, wherein output terminal of the first amplifier is connected to one of the differential input terminals, and wherein the gain of the first amplifier decreases for lower frequency component of the signal which the differential amplifier outputs than a predetermined frequency when the output voltage of the differential output exceeds a predetermined value.
    Type: Application
    Filed: September 15, 2010
    Publication date: March 24, 2011
    Inventor: HIROKAZU KOMATSU
  • Patent number: 7903823
    Abstract: An apparatus for effecting sound stage expansion in an audio system presenting two sound channels includes: (a) A first signal source coupled for providing at least one first signal representing a first sound channel to at least one first input locus of a first amplifying unit. The first amplifying unit participates in presenting the first sound channel. (b) A second signal source coupled for providing at least one second signal representing a second sound channel to at least one second input locus of a second amplifying unit. The second amplifying unit participates in presenting the second sound channel. (c) At least one first filter unit coupling the first signal source with at least one of the at least one second input locus. (d) At least one second filter unit coupling the second signal source with at least one of the at least one first input locus.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: March 8, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Stephen Walter Crump
  • Patent number: 7902923
    Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design. In one aspect, an input voltage is provided to both a common-source amplifier and a common-gate amplifier. The output voltages of the common-source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages. When applied to the design of, e.g., low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: March 8, 2011
    Assignee: QUALCOMM, Incorporated
    Inventors: Xiaoyong Li, Rahul A. Apte
  • Publication number: 20110043278
    Abstract: An apparatus and method for biasing each amplifier of an amplification stage provides that the voltage across each current sensing element of each amplifier of the amplification stage is measured. For each pair of voltage measurements taken, a sum and difference is calculated, where the sum is processed to determine minima peaks and the difference is averaged. A portion of the sum term and the average of the difference term are summed to yield the individual bias current conducted by a first amplifier of the amplification stage. The difference between a portion of the sum term and the average of the difference term is calculated to yield the individual bias current conducted by the second amplifier of the amplification stage. The bias current conducted by the first and second amplifiers may then be individually modified manually, or conversely, may be modified automatically based upon the bias current measurements taken.
    Type: Application
    Filed: August 24, 2009
    Publication date: February 24, 2011
    Applicant: FENDER MUSICAL INSTRUMENTS CORPORATION
    Inventor: Charles C. Adams
  • Patent number: 7893759
    Abstract: Current conveyor based instrumentation amplifiers are disclosed. Such instrumentation amplifiers may have the higher common mode rejection ratios (CMRR), lower area requirements in integrated circuits, fewer resistors, fewer resistor matching requirements, less noise, and less distortion than prior art instrumentation amplifiers. One embodiment, with two input voltage lines and one output voltage line, comprises a single current conveyor and two resistors. Another embodiment, with two input voltage lines and two output voltage lines, comprises two current conveyors and four resistors, possibly in two matched pairs. Buffers may be used for impedance, frequency, and phase delay adjustment on any or all of the voltage lines.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: February 22, 2011
    Assignee: Honeywell International Inc.
    Inventor: Paul M. Werking
  • Patent number: 7888996
    Abstract: Chopper stabilized operational amplifiers are in common use. One drawback of these amplifiers, however, is that there is an inherent tone present at the chopper frequency. Conventional circuits have attempted to reduce the effects of this tone by using various filtering schemes, such as a notch filter. Here, however, a track-and-hold circuit is used in conjunction with matched amplifiers to compensate for this tone.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: February 15, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Raymond Barnett
  • Patent number: 7885682
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: February 8, 2011
    Assignee: ParkerVision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Patent number: 7880541
    Abstract: An instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the input signals. A low pass filter provides passive band limiting of the output signal. Each operational amplifier is implemented as a multi-path amplifier that includes a low frequency path and a high frequency path between an input and an output of the operational amplifier. Further, each multi-path amplifier includes a differential input transconductance stage within the low frequency path and a differential input transconductance stage within the high frequency path. Within each multi-path amplifier, the differential input transconductance stage of the high frequency path is noisier than, but consumes less power than, the differential input transconductance stage of the low frequency path.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: February 1, 2011
    Assignee: Intersil Americas Inc.
    Inventor: Philip V. Golden
  • Publication number: 20110001649
    Abstract: A differential chopper comparator compares an input signal voltage and a first voltage, and includes a first capacitor, a second capacitor, and a differential amplification unit including a differential amplification circuit. Either the input signal voltage or the first voltage is applied to one end of the first capacitor via a first switch unit. A fixed voltage is applied to one end of the second capacitor via a second switch unit. Either a non-inverting input terminal or an inverting input terminal of the differential amplification circuit is connected to the other end of the first capacitor, and the other terminal is connected to the other end of the second capacitor. An impedance of the first switch unit side viewed from one end of the first capacitor and an impedance of the second switch unit side viewed from one end of the second capacitor are substantially same.
    Type: Application
    Filed: June 17, 2010
    Publication date: January 6, 2011
    Applicant: NEC Electronics Corporation
    Inventor: Fumio Nakano
  • Patent number: 7863977
    Abstract: This invention relates to a fully differential non-inverting parallel amplifier for detecting biology electrical signal, including input buffer circuits, differential filter circuits, data selector, non-inverting parallel amplifying circuits and analog-digital circuits. The biology electrical signal, first impeded and converted by the input buffer circuits, and then low-pass filtered by the differential filter circuits, shall be amplified with its common mode signal rejected by passing through the data selector and non-inverting parallel amplifier circuits. At last, the amplified biology electrical signal is output by analog to digital conversion in the analog-digital circuits after its noises beyond signal high frequency band are filtered by anti-aliasing filter net. This invention, with low noise and high common mode rejection ratio, stable baseline, large signal input dynamic range, is reliable and not easy to be saturated. Furthermore, it can support mature PACE Detecting with a low cost.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: January 4, 2011
    Assignee: Edan Instruments, Inc.
    Inventors: Xiaofei Xiang, Xunqiao Hu, Xicheng Xie
  • Publication number: 20100321002
    Abstract: An integrated sensor includes: i) a voltage regulator coupled with a mechanical ground and delivering a regulated voltage based on a primary power supply voltage referencing an electrical ground; ii) a high-impedance sensitive element powered by the primary power supply, electrically coupled to the mechanical ground and delivering an electrical quantity representative of a physical quantity; iii) an amplification module powered by the regulated voltage and including a first input receiving an analog reference dependent on the regulated voltage and a second input receiving the electrical quantity, and designed to deliver a first output voltage representing the amplified measurement voltage; and iv) a differential amplifier powered by the primary power supply voltage, referencing the electrical ground and including first and a second inputs receiving the analog reference and the first output voltage, respectively, and delivering a second output voltage representing the first amplified output voltage referenced
    Type: Application
    Filed: December 3, 2007
    Publication date: December 23, 2010
    Applicant: CONTINENTAL AUTOMOTIVE FRANCE
    Inventor: Michel Suquet
  • Publication number: 20100312080
    Abstract: An apparatus includes a first amplifier having a first input coupled to a first optical detector. The first amplifier includes a first output corresponding to a logarithm of the first input. The apparatus includes a second amplifier having a second input coupled to a second optical detector and having a second output corresponding to a logarithm of the second input. The apparatus includes a differential amplifier configured to amplify a difference between the first output and the second output.
    Type: Application
    Filed: June 4, 2010
    Publication date: December 9, 2010
    Applicant: Nonin Medical, Inc.
    Inventor: Philip O. Isaacson
  • Publication number: 20100301932
    Abstract: A non-inverting amplifier includes an operational amplifier, an input resistor, and a feedback resistor. The operational amplifier amplifies and outputs a difference between an input voltage and a voltage of a control node. The input resistor is connected between a reference voltage port and the control node. The feedback resistor is connected to an output port of the operational amplifier and the control node. The non-inverting amplifier supplies a control current to the control node for controlling an offset voltage of the output port.
    Type: Application
    Filed: May 11, 2010
    Publication date: December 2, 2010
    Inventor: SANG-WOOG BYON
  • Publication number: 20100301917
    Abstract: The invention provides a level shift circuit that prevents an offset when the supply voltage changes. A level shift circuit has a differential amplification circuit, a current generation circuit, a capacitor and a holding circuit. An input signal from the optical pickup is inputted to the non-inversion input terminal of the differential amplification circuit. First, by turning on a first switch, a feedback loop is formed by the differential amplification circuit, the current generation circuit and the capacitor to perform a level shift, and the voltage charged in the capacitor is held by the holding circuit. Then by turning off the first switch and turning on a second switch, the voltage held by the holding circuit is applied to the non-inversion input terminal of the differential amplification circuit to perform a level shift.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 2, 2010
    Applicants: SANYO Electric Co., Ltd.
    Inventors: Tsuyoshi YOSHIMURA, Taichiro KAWAI
  • Publication number: 20100302385
    Abstract: An angular velocity sensor includes a sensor device and an amplification circuit. The sensor device generates a detection signal corresponding to an angular velocity. The amplification circuit generates both a first output signal by non-inverting amplifying the detection signal with a first gain and a second output signal by inverting-amplifying the detection signal with the first gain, and outputs the first output signal and the second output signal in order to obtain an angular velocity signal by calculating a difference between the first output signal and the second output signal.
    Type: Application
    Filed: April 26, 2010
    Publication date: December 2, 2010
    Applicant: Sony Corporation
    Inventor: Kazuo KURIHARA
  • Patent number: 7839212
    Abstract: A two stage fully differential amplifier has been designed which works, in tandem with a TX-FIR, as a linear equalizer at low frequencies, not covered by the TX-FIR, and also acts as a linear amplifier at higher frequencies which are equalized by the TX-FIR. The amplifier as a frequency response which does not attenuate signals frequencies less than one twentieth of baud rate, creates gain peaking ion the region between one twentieth and one tenth of baud rate and maintains flat peak gain up to half of baud rate. Different aspects of the frequency response curve (such as dc gain, max gain and zero frequency) are completely programmable. Also, the differential amplifier has been designed from low power and process, voltage and temperature insensitive frequency response.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: November 23, 2010
    Assignee: Oracle America, Inc.
    Inventors: Dawei Huang, Arif Amin, Waseem Ahmad, Rajesh Kumar, Venkatesh Arunachalam
  • Publication number: 20100283652
    Abstract: A differential amplifier circuit comprising a differential amplifier capacitor and a mismatch error cancellation circuitry, a first pair of capacitors, a second pair of capacitors consisting of switching network. The switching network is arranged to operate in a first configuration wherein the first pair of capacitors is operably coupled to differential inputs of the differential amplifier circuit. The switching network is further arranged to operate in second configuration wherein each capacitor of the first pair of capacitors is operably coupled within a feedback loop between an output and an input of the differential amplifier such that the differential amplifier outputs signals representative of the sampled input voltage signals, and the second pair of capacitors are operably coupled in parallel between the outputs of the differential amplifier such that the second pair of capacitors sample the voltage difference between the outputs.
    Type: Application
    Filed: January 8, 2008
    Publication date: November 11, 2010
    Applicant: FREESCALE SEMICAONDUCTOR INC.
    Inventor: Alain Nadiguebe
  • Publication number: 20100283538
    Abstract: An amplifier system providing improved Cartesian feedback is provided. A complex band pass error amplifier is provided. A quadrature up converter is connected to the complex band pass error amplifier so as to receive as input, output from the complex band pass error amplifier. An amplifier is connected to the quadrature up converter so as to receive as input, output from the quadrature up converter. A quadrature down converter is connected at or beyond the amplifier output so as to receive as input a signal proportional to that delivered by the amplifier as output to a load, wherein the complex band pass error amplifier is connected to the quadrature down converter so as to receive as a first input, output from the quadrature down converter and as a second input, a quadrature reference signal.
    Type: Application
    Filed: May 11, 2009
    Publication date: November 11, 2010
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Marta G. Zanchi, Greig C. Scott
  • Publication number: 20100272294
    Abstract: A two-channel amplifier with common signal including a splitter for establishing three intermediate signals on the basis of two input signals, wherein the three intermediate signals represent two channels, one of the three intermediate signals being a common signal common to both of the two channels and having a representation based on a sum of the two input signals.
    Type: Application
    Filed: December 21, 2007
    Publication date: October 28, 2010
    Applicant: THE TC GROUP A/S
    Inventors: Lars Arknaes-Pedersen, Kim Rishoj Pedersen
  • Patent number: 7822162
    Abstract: A current-mode differential signal transmitting circuit is disclosed, including a transmitter having a first transmitting module and a second transmitting module. The first transmitting module includes a plurality of first outputting units to output first data and a clock outputting signal. The second transmitting module includes a plurality of second outputting units for outputting second data, and the first and second transmitting modules share this clock outputting unit.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: October 26, 2010
    Assignee: Realtek Semiconductor Corp
    Inventors: Hsien-Chun Chang, Chao-Hsin Lu, Ming-Yen Hsu
  • Publication number: 20100259324
    Abstract: A broad-band active delay line comprises a plurality of broad-band active delay cells configured in a cascade topology. Each broad-band active delay cell comprises a feedback loop and a feedforward path to achieve a high bandwidth.
    Type: Application
    Filed: May 4, 2009
    Publication date: October 14, 2010
    Inventors: Chia-Liang Lin, Hsin-Che Chiang
  • Publication number: 20100259323
    Abstract: Techniques for providing an instrumentation amplifier having a plurality of selectable gain settings. In an exemplary embodiment, a gain adjustment block for accepting a differential input voltage is coupled to a differential-to-single-ended conversion block for generating a single-ended output voltage. The gain adjustment block may have a plurality of gain settings selectable by one or more switches. The instrumentation amplifier advantageously offers precise gain control without the need for external calibration, while being robust and simple to design.
    Type: Application
    Filed: April 3, 2009
    Publication date: October 14, 2010
    Applicant: QUALCOMM INCORPORATED
    Inventor: Paul L. Bugyik
  • Publication number: 20100259661
    Abstract: This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.
    Type: Application
    Filed: February 8, 2010
    Publication date: October 14, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
  • Patent number: 7812668
    Abstract: A multi-input operational amplifier comprises two transconductors, two current mirrors, and a current source. Each transconductor generates a current according to a corresponding voltage difference. When the voltage difference is less than or equal to zero, the current is a constant. When the voltage difference exceeds zero, the current is proportional to the voltage difference.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: October 12, 2010
    Assignee: Advanced Analog Technology, Inc.
    Inventor: Yung Ching Chang
  • Publication number: 20100253423
    Abstract: Methods and apparatus according to various aspects of the present invention may operate in conjunction with a resistor formed of a lightly-doped P-type region formed in a portion of a lightly-doped N-type semiconductor well extending on a lightly-doped P-type semiconductor substrate, the well being laterally delimited by a P-type wall extending down to the substrate, the portion of the well being delimited, vertically, by a heavily-doped N-type area at the limit between the well and the substrate and, horizontally, by a heavily-doped N-type wall. A diode may be placed between a terminal of the resistor and the heavily-doped N-type wall, the cathode of the diode being connected to said terminal.
    Type: Application
    Filed: July 4, 2008
    Publication date: October 7, 2010
    Inventors: Serge Pontarollo, Dominique Berger
  • Publication number: 20100231294
    Abstract: Signal processing circuit for voltage signals from electrodes of a magneto-inductive, flow measuring device, wherein two measuring electrodes are connected with a fully differentially working amplifier having two inputs and two outputs.
    Type: Application
    Filed: November 5, 2008
    Publication date: September 16, 2010
    Applicant: Endress + Hauser Flowtec AG
    Inventor: Thomas Bier
  • Patent number: 7795974
    Abstract: A digitally variable gain amplifier comprising a front-end stage, a level shifter stage, and an output amplifier stage. The front-end stage comprises a high gain pre-amplifier and a low gain pre-amplifier driven in parallel by a differential input signal. A coarse gain control is realized by enabling only one pre-amplifiers at a time, while the differential input signal remains connected to the inputs of the disabled pre-amplifier. An attenuator following each pre-amplifier provides fine gain control. The enabled pre-amplifier amplifies the differential input signal and outputs a first dc voltage level. The disabled pre-amplifier is placed into a standby ready mode and outputs a second dc voltage level that is greater in magnitude than the first dc voltage level. The level shifter stage performs a minimum voltage selection operation to automatically select and level shift the amplified differential input signal, and further pass the signal to the output amplifier stage.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: September 14, 2010
    Assignee: National Semiconductor Corporation
    Inventors: Michael X. Maida, Gertjan Van Sprakelaar
  • Patent number: 7782131
    Abstract: A balanced amplifier (1) is provided with: a first operational amplifier (11) whose reverse-phase input terminal is connected to an input voltage source (30) and whose reverse-phase input terminal is connected to an output terminal of the first operational amplifier; a second operational amplifier (12) whose positive-phase input terminal is connected to the input voltage source and whose reverse-phase input terminal is connected to an output terminal of the second operational amplifier; and a voltage division circuit (20i, 20j, 20k, 20l) for dividing a reference voltage supplied from a reference voltage source (40), the reference voltage source being connected to a positive-phase input terminal of each of the first operational amplifier and the operational amplifier through the voltage division circuit.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: August 24, 2010
    Assignee: Pioneer Corporation
    Inventor: Tatsuya Nishizawa
  • Publication number: 20100207691
    Abstract: A phase mismatch compensation device comprises a first low pass filter unit, a second low pass filter unit and a phase compensation unit. The first low pass filter unit comprises a first input unit transferring the I-channel analog input signal to an input terminal of a first OP-amp, and the first self-feedback unit transferring the I-channel output signal to the input terminal of the first OP-amp. The second low pass filter unit comprises the second input unit transferring the Q-channel analog input signal to an input terminal of a second OP-amp, and a second self-feedback unit transferring the Q-channel output signal to the input terminal of the second OP-amp. The phase compensation unit comprises a first compensation unit transferring the Q-channel analog input signal to the input terminal of the first OP-amp, and a second compensation unit transferring the I-channel analog input signal to the input terminal of the second OP-amp.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 19, 2010
    Inventor: Seyeob KIM
  • Patent number: 7777565
    Abstract: A differential amplification circuit and a method corrects an offset voltage derived from a variance in resistances. With first and second input terminals brought to the same potential and set to a potential different from a reference potential, the resistance value of resistors is adjusted so that an output potential and the reference potential will be substantially equal to each other.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: August 17, 2010
    Assignee: DENSO CORPORATION
    Inventor: Yukihiko Tanizawa
  • Patent number: 7756279
    Abstract: A microphone preamplifier, comprising a differential input (102) stage with a first and a second input terminal and an output stage with an output terminal; where the microphone preamplifier is integrated on a semiconductor substrate. A feedback circuit, with a low-pass frequency transfer function (103), is coupled between the output terminal and the first input terminal and integrated on the semiconductor substrate. The second input terminal provides an input for a microphone signal (105). Thereby a very compact (with respect to consumed area of the semiconductor substrate), low noise preamplifier is provided.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: July 13, 2010
    Assignee: AudioAsics A/S
    Inventors: Michael Deruginsky, Claus Erdmann Furst
  • Patent number: 7733168
    Abstract: A first to a fourth sampling switch (1a to 1d), a first to a fourth sampling capacitance (4 to 7), and a first and a second charge redistribution switch (2a, 2b) are provided on the input side of a differential amplifier (8). A first and a second reset switch (3a, 3b) are provided between inputs and outputs of the differential amplifier (8). A positive-polarity input signal voltage (Vinp), a negative-polarity comparison reference voltage (Vrefn), a positive-polarity comparison reference voltage (Vrefp), and a negative-polarity input signal voltage (Vinn) are applied via the first to fourth sampling switches (1a to 1d) to one ends of the first to fourth sampling capacitances (4 to 7), respectively. During a reset period, the reset of the differential amplifier (8) is released after sampling of the voltages. During a comparison period, the first and second charge redistribution switches (2a, 2b) are caused to be in a conduction state.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: June 8, 2010
    Assignee: Panasonic Corporation
    Inventor: Masahiro Higuchi
  • Patent number: 7733172
    Abstract: A single stage differential amplifier is disclosed as comprising a pair of vacuum tube triodes for amplifying two input signals and generating two output signals. The differential amplifier has DC self-biasing ability and grid-to-cathode over-voltage protection for directly coupling from the outputs of another differential amplifier. By possessing these unique features, this differential amplifier becomes an important building block in forming a balanced amplifier by cascading multi differential amplifiers in a directly coupled fashion.
    Type: Grant
    Filed: January 12, 2009
    Date of Patent: June 8, 2010
    Inventor: Chi Ming John Lam
  • Patent number: 7711128
    Abstract: An audio power amplifier includes a differential amplifier circuit that serves as an input circuit. The differential amplifier circuit includes a signal GND (SG) terminal that receives a SG voltage, and an audio signal input terminal that receives an audio signal. A SG voltage generation circuit is provided to output the SG voltage. The SG voltage generation circuit includes a voltage follower amplifier that outputs a current, a reference voltage source that is input to the voltage follower amplifier, and a current control circuit that controls the current output from the voltage follower amplifier. The SG voltage rises in a prescribed manner while suppressing a pop sound during its transition.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: May 4, 2010
    Assignee: Ricoh Company, Ltd.
    Inventor: Kohichi Hagino
  • Patent number: 7705683
    Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: April 27, 2010
    Assignee: Broadcom Corporation
    Inventor: Alireza Zolfaghari
  • Patent number: 7701284
    Abstract: A line driver includes: a differential amplifier for amplifying an input signal to generate an output signal; first and second series resistors coupled respectively to output terminals of the differential amplifier and through which the output signal is output; first and second negative-feedback resistors each coupled between a respective input terminal and a respective output terminal of the differential amplifier; first and second positive-feedback variable resistors each coupled between a respective input terminal of the differential amplifier and a respective one of the first and second series resistors; and an adjusting unit coupled to the first and second positive-feedback variable resistors to adjust a resistance thereof with reference to the output signal.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: April 20, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Su-Liang Liao, Ming-Cheng Chiang