Strip Type Patents (Class 333/246)
  • Patent number: 6414574
    Abstract: A potential-free connection of a first line section of a microwave transmission line with a second line section of the microwave transmission line is described and illustrated. To obtain a broadband transfer range for the microwave signal with high breakdown voltage at the same time, it is provided for that the first line section of the microwave transmission line has a first slotted line, the second line section of the microwave transmission line has a second slotted line and the first slotted line and the second slotted line are arranged on two opposite sides of a dielectric substrate in such a way that the first slotted line and the second slotted line have a strong electromagnetic coupling but have no conductive connection to each other.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: July 2, 2002
    Assignee: Krohne Messtechnik GmbH & Co. KG
    Inventors: Reinhard Knöchel, Matthias Weiss
  • Patent number: 6414250
    Abstract: Thin film, multi-layered components wherein the layers are hermetically sealed with a re-flowed conductive sealant (e.g. Pb/Sn solder). The sealant is applied to an endless ground conductor at the peripheral edge of at least one of each pair of opposed substrate layers prior to registering the conductors and re-flowing the sealant. The microstrip conductors comprise thin film adhesion and seed layers and a covering metalization. The signal and ground conductors are terminated with solder balls and the signal and ground conductors are connected with micro vias that extend through the substrates.
    Type: Grant
    Filed: December 30, 2000
    Date of Patent: July 2, 2002
    Assignee: Thin Film Technology Corp.
    Inventors: Hiroo Inoue, Michael Howieson, Mark Brooks
  • Patent number: 6414564
    Abstract: The present invention is directed to a magnetic thin-film device whose operating frequency band ranges from several millihertz (MHz) to several gigahertz (GHz) and which is used as an inductor for a switching power supply, a noise filter, a reception circuit for receiving a quasi-microwave and a magnetic sensor. In this device, uniaxial magnetic anisotropy is guided to a magnetic layer, and the magnetic layer is sandwiched between dielectric layers to form a propagation path of electromagnetic wave. A microstrip line is provided on the top surface of the propagation path, while an insulative underlying substrate is formed on the bottom surface thereof with a lower grounded conductor interposed therebetween. Thus, the wavelength of the propagation path can be shortened to miniaturize the device. The device is rapidly improved in characteristics and miniaturized further, resulting in reduction in manufacturing costs.
    Type: Grant
    Filed: August 1, 2000
    Date of Patent: July 2, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuhiko Mizoguchi, Tetsuo Inoue, Toshirou Sato
  • Patent number: 6414563
    Abstract: The present invention relates to a low-loss microwave device test fixture which presents as little losses as possible along the signal path and which can permit impedance transformations. The test fixture includes a frame having two opposite extremities, a top, a bottom, a height and a width. The device is further provided with a device supporting column located between the two extremities, having a top surface lying below the top of the frame adapted to receive the device. Two adjustable blocks are further provided, each located between the device supporting column and an opposite extremity, each of the blocks being vertically adjustable. Between the adjustable blocks and the top of the device are two brackets, each for receiving a flange of a device, each of the brackets being secured to an opposite extremity of the frame. The device can be secured to the column and the column and the blocks can be vertically adjusted.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: July 2, 2002
    Assignee: Focus Microwaves Inc.
    Inventor: Christos Tsironis
  • Publication number: 20020079983
    Abstract: A printed circuit board is described. That printed circuit board includes a capacitive load that is coupled to a signal trace. The signal trace has a first section and a second section. The first section is positioned between the capacitive load and the second section. The second section has a first width, and the first section includes first and second lines that each have a width that is smaller than the first width.
    Type: Application
    Filed: December 22, 2000
    Publication date: June 27, 2002
    Inventors: Michael W. Leddige, James A. McCall
  • Publication number: 20020075107
    Abstract: An interconnection structure includes: a dielectric layer; a first metallization pattern on the dielectric layer, the first metallization pattern including at least one etch stop having a perimeter defining at least one etch stop opening; a cured adhesive on a portion of the dielectric layer, the adhesive not present in an area aligned with the at least one etch stop; and at least one electrical device being attached to the dielectric layer by the adhesive such that an active area of the at least one electrical device is aligned with the etch stop perimeter. The active area of the at least one electrical device may further be aligned with at least one predetermined area defined by an optional additional portion of cured adhesive, the additional portion of the cured adhesive being adhesively attached to the dielectric layer and not adhesively attached to the at least one electrical device.
    Type: Application
    Filed: December 18, 2000
    Publication date: June 20, 2002
    Inventors: William Edward Burdick, James Wilson Rose, Kevin Matthew Durocher, Raymond Albert Fillion
  • Publication number: 20020075093
    Abstract: A signal transmission unit includes a first transmission line, a second transmission line, and a tapered transmission line coupling the first transmission line to the second transmission line. The tapered transmission line has a width and a length and the width changes along the length according to one or more functions. The one or more functions include but are not limited to linear functions, non-linear functions, hyperbolic functions, and exponential functions.
    Type: Application
    Filed: December 14, 2000
    Publication date: June 20, 2002
    Applicant: Intel Corporation
    Inventors: Karl H. Mauritz, David W. Frame
  • Publication number: 20020070826
    Abstract: A vertical transition device for differential stripline paths, connects differential microstrip paths on a horizontal plane with differential triplate paths on another horizontal plane in a multilayered architecture. The differential microstrip paths include a pair of differential microstrip lines. The differential triplate paths include a pair of triplate lines. The differential microstrip lines are connected with the differential triplate lines by via-holes within the transition device, respectively.
    Type: Application
    Filed: June 18, 2001
    Publication date: June 13, 2002
    Inventor: Hiroshi Aruga
  • Patent number: 6400241
    Abstract: The invention relates to a microwave module having an outer face with a connection device. In the module the connection device presents, on the outer face, a central conductive zone and a peripheral conductive zone, and inside the volume of the module, connective zone, and inside the volume of the module, connection to the device takes place by means of coplanar conductors comprising a central signal conductor connected to the central conductive zone, and lateral ground conductors connected to the peripheral conductive zone. The connection is favorable to miniaturization and is suitable for operating over a broad band.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: June 4, 2002
    Assignee: Alcatel
    Inventors: Patrice Ulian, Sébastian George, Philippe Monfraix
  • Patent number: 6400240
    Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: June 4, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masao Nishida, Tetsuro Sawai
  • Publication number: 20020057144
    Abstract: A print board comprises a ground layer, an insulation layer, a signal layer formed on the insulation layer, formed in a predetermined line pattern, and serving as a transmission line for transmitting high-speed signals, and a pad formed on the signal layer. The signal layer has a line width that satisfies a characteristic impedance required for the transmission line, and the width of the signal layer is set substantially equal to the width of the pad.
    Type: Application
    Filed: June 28, 2001
    Publication date: May 16, 2002
    Inventor: Yuuichi Koga
  • Patent number: 6388208
    Abstract: An interconnection circuit and related techniques are described. The interconnection circuit includes a plated through hole having a plurality of electrically isolated segments with at least one of the plurality of electrically isolated segments coupled to a signal path and at least one of the electrically isolated segments coupled to ground. With this arrangement, the circuit provides a signal path between a first and a second different layers of a multilayer. By providing one segment as a signal segment and another segment as a ground segment the size and shape of the electrically isolated segments can be selected to provide the interconnection circuit having a predetermined impedance characteristic. The interconnection circuit can thus be impedance matched to circuit board circuits, devices and transmission lines, such as striplines, microstrips and co-planar waveguides.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: May 14, 2002
    Assignee: Teradyne, Inc.
    Inventors: Sepehr Kiani, Mikhail Khusid
  • Patent number: 6373740
    Abstract: Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present invention further provides a reduction in skew and crosstalk. Embodiments of the present invention also provide the fabrication of improved transmission lines for silicon-based integrated circuits using conventional CMOS fabrication techniques. Embodiments of a method for forming transmission lines in an integrated circuit include forming a first layer of electrically conductive material on a substrate. A first layer of insulating material is then formed on the first layer of electrically conductive material. The method also includes forming a pair of electrically conductive lines on the first layer of insulating material. Moreover, a transmission line is also formed on the first layer of insulating material.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: April 16, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Eugene H. Cloud, Kie Y. Ahn
  • Patent number: 6373354
    Abstract: The method for adjusting a resonance frequency of a ring resonator formed as a strip line ring exactly includes removing successive amounts of conducting material from one or more positions (2,3) on the strip line ring (1) with a laser until the ring resonator has a desired predetermined resonance frequency.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: April 16, 2002
    Assignee: Robert Bosch GmbH
    Inventors: Martin Schallner, Willibald Konrath
  • Patent number: 6369678
    Abstract: An RF assembly (20) operating at a predetermined wavelength of &lgr; and having a ground-plane interface (26) between first and second components (22, 24) is presented. A bond wire (48) couples the components (22, 24) along a bond-wire directrix (54). The components (22, 24) have grounding members (30, 32) establishing substantially coplanar ground planes (42, 44). The grounding members (30, 32) are coupled together so as to create a semi-cylindrical slot (28) having an opening (60) substantially coincident with the ground planes (42, 32). The slot 28 has an axis (66) proximate the bond-wire directrix (54), and a radius (68) substantially equal to &lgr;/2. The slot axis (66) and the bond-wire directrix (54) are located within a plane (56) substantially perpendicular to the ground planes (42, 32).
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: April 9, 2002
    Assignee: Motorola, Inc.
    Inventors: Warren Leroy Seely, Ronald Dee Fuller, Ronald Frank Kielmeyer, Jr.
  • Patent number: 6366185
    Abstract: An RF interconnect between an airline circuit including a dielectric substrate having a conductor trace formed on a first substrate surface and an RF circuit separated from the airline circuit by a separation distance. The RF interconnect includes a compressible conductor structure having an uncompressed length exceeding the separation distance, and a dielectric sleeve structure surrounding at least a portion of the uncompressed length of the compressible conductor structure. The RF interconnect structure is disposed between the substrate and the RF circuit such that the compressible conductor is placed under compression between the substrate and the RF circuit. Examples of the RF circuit include a vertical coaxial transmission line or a grounded coplanar waveguide circuit disposed in parallel with the airline circuit.
    Type: Grant
    Filed: January 12, 2000
    Date of Patent: April 2, 2002
    Assignee: Raytheon Company
    Inventors: Timothy D. Keesey, Clifton Quan, Douglas A. Hubbard, David E. Roberts, Chris E. Schutzenberger, Raymond C. Tugwell, Gerald A. Cox
  • Patent number: 6362973
    Abstract: A multi-layer printed circuit board that includes a first layer and a second layer that have first and second signal traces, respectively. The multi-layer printed circuit board includes a via that couples a signal transmitting component to the second signal trace and a throttling member, which is coupled to the first signal trace. The throttling member reduces the speed at which a first signal routed over the first signal trace travels when compared to the speed at which that signal would have traveled had the throttling member been absent.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: March 26, 2002
    Assignee: Intel Corporation
    Inventors: Michael W. Leddige, Bryce D. Horine
  • Patent number: 6359536
    Abstract: An electronic module, comprising: a dielectric base plate having first and second opposing surfaces on which respective electrodes are disposed such that respective areas at the first and second surfaces are free of electrode material and aligned relative to one another to form a dielectric resonator; a first electronic component coupled to the base plate; and a first circuit sheet having first and second opposing surfaces, at least one aperture between the surfaces, and a conductor pattern disposed on the first surface, the first circuit sheet being disposed on the base plate such that: (i) the first electronic component is at least partially received within the aperture; and (ii) at least part of the conductor pattern is coupled to the dielectric resonator.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: March 19, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Koichi Sakamoto, Kenichi Iio, Sadao Yamashita, Yohei Ishikawa
  • Publication number: 20020030566
    Abstract: A microelectro-mechanical device which includes a fixed electrode formed on a substrate, the fixed electrode including a transparent, high resistance layer, and a moveable electrode formed with an anisotropic stress in a predetermined direction and disposed adjacent the fixed electrode. The device includes first and second electrically conductive regions which are isolated from one another by the fixed electrode. The moveable electrode moves to cover the fixed electrode and to electrically couple to the second conductive region, thus electrically coupling the first and second conductive regions, in response to a potential being applied across the fixed and moveable electrodes. The fixed electrode is transparent to electromagnetic signals or waves and the moveable electrode impedes or allows transmission of electromagnetic signals or waves.
    Type: Application
    Filed: June 20, 2001
    Publication date: March 14, 2002
    Inventors: Carl O. Bozler, Richard G. Drangmeister, Robert J. Parr, Lawrence J. Kushner
  • Patent number: 6356168
    Abstract: A high-frequency, e.g., microwave, filter (100, 300, 400) is made, e.g., stamped or etched, from a single sheet (110, 310, 410) of electrically conductive material, e.g., a metal plate or a printed circuit board. The sheet defines a frame (112, 312, 412-413), one or more resonant filter elements (114, 311-315, 411-415) inside of the frame, one or more supports (116, 316-317, 416) connecting each resonant filter element to the frame, and a flange (118, 318, 418) on one of the resonant filter elements. The flange serves as an electrical contact to the filter; another flange (317, 417) on another element, or the frame itself, serves as a second contact. An electrically conductive housing (104, 304, 404) encapsulates both faces of the sheet.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: March 12, 2002
    Assignee: Avaya Technology Corp.
    Inventors: Ron Barnett, Zhengxiang Ma, Louis Thomas Manzione, Richard F. Schwartz, Hui Wu
  • Publication number: 20020027481
    Abstract: An electromagnetic wave propagation structure, suitable for the transmission of an electromagnetic wave and the formation of resonators within filters, is constructed of both high and low dielectric-constant materials wherein the high dielectric-constant is in excess of approximately 80 and the low dielectric-constant is less than approximately 2. A boundary between the high and the low dielectric-constant materials serves as an electric wall to waves propagating in the low dielectric-constant material and as a magnetic wall to waves propagating in the high dielectric-constant material. This permits substitution of the high dielectric-constant material for metal elements, such as resonators and feed structures in filters. Furthermore, the use of a cladding of dielectric material of one of the foregoing dielectric ranges about a core of material of the other of the foregoing dielectric ranges enables construction of waveguides having rectangular and circular cross-sections.
    Type: Application
    Filed: December 27, 2000
    Publication date: March 7, 2002
    Inventor: Slawomir J. Fiedziuszko
  • Patent number: 6348844
    Abstract: The present invention relates to an arrangement in multilayer printed circuit boards, with the aim of improving matching in transitions between symmetric striplines (3) and asymmetric striplines (4). The requirement of a coverpad (6) for contact between the via (5) and the asymmetric stripline (4) for dimension reasons among other things, results in matching problems. In order to avoid this problem, the earth plane (7, 10) nearest the transition is moved away in the proximity of the via (5).
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: February 19, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Björn Albinsson, Thomas Harju
  • Publication number: 20020017963
    Abstract: Transmission line structure is composed of a pair of signal conductors which are embedded in one wiring region of a dielectric layer and a thickness in height of the signal conductor is larger than a width, and is constituted so that a coupling impedance between the adjacent signal conductors is lower than a coupling impedance between the signal conductor and another conductor formed in another wiring region, and thus to provide a multi-layer wiring board having a transmission line structure of high wiring density and excellent transmission characteristic.
    Type: Application
    Filed: July 3, 2001
    Publication date: February 14, 2002
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., Ltd.
    Inventors: Takeshi Shimamoto, Kazufumi Yamaguchi, Masahide Tsukamoto, Fumikazu Tateishii, Yutaka Taguchi
  • Patent number: 6347041
    Abstract: A data processing system including but not limited to a section of a first printed-circuit-board conductive element, the section of the first printed-circuit-board conductive element formed to follow at least one bent segment of a first printed-circuit-board path; a section of a second printed-circuit-board conductive element, the section of the second printed-circuit-board conductive element having at least a first part formed to follow at least one bent segment of a second printed-circuit-board path, where the at least one bent segment of the second printed-circuit-board path is substantially proximate to and has a length less than a length of the at least one bent segment of the first printed-circuit-board path; and the section of the second printed-circuit-board conductive element having at least a second part formed to follow a conductive-section-equalization feature which deviates from the second printed-circuit-board path, the at least a second part situated substantially proximate to the at least one
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: February 12, 2002
    Assignee: Dell USA, L.P.
    Inventors: Jeffrey C. Hailey, William M. Simon
  • Publication number: 20020005769
    Abstract: The present invention is to realize a filter element comprising an element consisting of a strip line having an approximately uniform line width which is effective to improve the production yield and reliability. Cavities are provided on the surface of a dielectric substrate, a strip conductive pattern is formed partially on the cavities to serve as inductance.
    Type: Application
    Filed: August 16, 1999
    Publication date: January 17, 2002
    Inventors: TAKAYUKI HIRABAYASHI, AKIHIKO OKUBORA
  • Publication number: 20020000902
    Abstract: A connecting structure for high frequency circuits is provided, with which components can be readily replaced, and which does not require high assembly accuracy and is applicable in a broad band. First and second circuit boards each having strip lines on the top surfaces are placed to secure a gap. Patch portions each constituting a resonator are formed by extending the width of the strip lines, and a supporting member of a foam material is placed on the top of the patch portion formed on the first circuit board such that a parasitic element made of a dielectric material is cantilevered by the supporting member. The free end side of the parasitic element is placed above the patch portion formed on the second circuit board while securing a predetermined space. A strong electrical connection is established by the parasitic element that electromagnetically couples non-continuing portions, thereby making it possible to cut a direct current.
    Type: Application
    Filed: February 2, 2001
    Publication date: January 3, 2002
    Inventors: Takashi Tamura, Naoki Atsumi, Hiroyuki Arai, Hajime Izumi
  • Publication number: 20020000901
    Abstract: The impedance of a wiring pattern can be controlled in an easy way. A multilayer type printed-wiring board 1 comprises a pair of inner layer substrates 6, 7, a pair of data transmission wire patterns 4, 5 arranged between the CPU module 2 and the memory modules 3, 3 formed on one of the surfaces of the inner layer substrates 6, 7, said memory modules 3, 3 operating as main memories, and a pair of prepreg layers 10, 11 on the data transmission patterns 4, 5.
    Type: Application
    Filed: March 1, 2001
    Publication date: January 3, 2002
    Inventors: Kenji Kuhara, Akinari Mohri, Takao Ito, Shoji Horie
  • Publication number: 20010054939
    Abstract: A high-frequency multilayer circuit substrate having a plurality of circuit layers includes a via hole for connection between the circuit layers, a metal pad, an impedance matching transmission line, rectangular stubs and a signal transmission line. A via hole connecting portion is constructed of the via hole, the rectangular stubs and the impedance matching transmission line. A characteristic impedance of the via hole connecting portion is matched to a characteristic impedance of the signal transmission line by adjusting widths and lengths of the impedance matching transmission line and the rectangular stubs. Thereby, the reflection of the signal wave in the via hole connecting portion is reduced to decrease a transmission loss.
    Type: Application
    Filed: April 27, 2001
    Publication date: December 27, 2001
    Inventors: Yu Zhu, Eiji Suematsu
  • Publication number: 20010052829
    Abstract: Various bus trace topologies are provided which allow for shorter stub lengths, reduced motherboard costs, more efficient routing between multiple agents, and bus traces with better matched characteristic impedances.
    Type: Application
    Filed: August 22, 2001
    Publication date: December 20, 2001
    Inventors: Sanjay Dabral, Ming Zeng, Dillip Sampath, Zale T. Schoenborn
  • Patent number: 6331806
    Abstract: A ribbon and a bonding wire are connected respectively to a high-frequency input and output of a microwave circuit, the width of the ribbon and/or the thickness of the bonding wire being varied continuously or discontinuously at a portion other than a portion used for bonding. By applying the ribbon and bonding wire to a microwave circuit package including a metallic substrate and sealing therein an MMIC mounted to the metallic substrate, desired high-frequency characteristics of the MMIC can be obtained.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: December 18, 2001
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Masahito Shingyoji, Nobuyoshi Takeuchi
  • Publication number: 20010050603
    Abstract: A laminate construction for use in microwave electronics, such as for circuit boards or antennas, has expensive dielectric material having a low dissipation factor (Df<0.005 at 1 GHz), such as PTFE/glass or GORE-PLY®, only in the upper 200 &mgr;m and less expensive dielectric material having a higher dissipation factor (Df>0.005 at 1 GHz), such as FR-4, cyanate ester, BT/epoxy, polyimide thermount or polyimide, in the underlying 400 &mgr;m of the dielectric material, thereby reducing cost while maintaing the same performance as regards low energy loss and consistency of the dielectric constant over the temperature and frequency range of use.
    Type: Application
    Filed: April 9, 2001
    Publication date: December 13, 2001
    Inventor: Leif Bergstedt
  • Patent number: 6323745
    Abstract: A planar bandpass filter that comprises a substrate having a ground plane on one side and a plurality of resonators on the other side. Each resonator includes an elongated inductive portion and a capacitive portion. The elongated inductive portions are coupled through the substrate at the end opposite of the capacitive portion to the ground plane. The planar bandpass filter also includes a first tap and a second tap. The first tap is connected to a first elongated portion to serve as an input to the bandpass filter. The second tap is connected to a last elongated portion to serve as an output to the bandpass filter.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: November 27, 2001
    Assignee: Qualcomm Inc.
    Inventor: Stanley S. Toncich
  • Publication number: 20010040051
    Abstract: The invention relates to a coaxial conductor comprising an inner conductor (S), an outer conductor (U) encasing the inner conductor (S) at least partly, and a dielectric (E) placed between the same. The coaxial conductor (K) is formed in a multi-layer circuit board (M) primarily by means of vias (2a-2h) and strip conductors (1a-1i). According to an embodiment of the coaxial conductor of the invention, the inner conductor (S) is formed substantially parallel to the board layers (3a-3e) of the multi-layer circuit board (M), the inner conductor (S) is formed of at least one strip conductor (1a, 1b) or at least one electroconductive via (2a) or a combination of the same, and the outer conductor (U) is formed of at least four electroconductive vias (2b-2h) and at least two strip conductors (1c-1i). The dielectric (E) is at least partly formed of the material of the board layers (3a-3e). The invention relates also to a method for manufacturing a coaxial conductor.
    Type: Application
    Filed: October 21, 1998
    Publication date: November 15, 2001
    Inventor: MARKKU LIPPONEN
  • Publication number: 20010035799
    Abstract: A circuit board device suppress with a small number of terminal elements unwanted irradiation originating between a power supply layer and a ground layer, even when a configuration of the power supply layer and the ground layer on the circuit board is complex, and a design support device thereof. The circuit board device has a power supply layer and a ground layer disposed in opposition to one another. A dielectric is disposed between the power supply layer and the ground layer. A power supply surface is divided into two power supply surfaces and by a slit having a generally T-shaped configuration to form power supply surface edges. The power supply surface edges retain across a predetermined length L a characteristic impedance present between the power supply layer and the ground layer. A terminal load is connected to a terminal portion of the power supply surface edges.
    Type: Application
    Filed: March 14, 2001
    Publication date: November 1, 2001
    Inventors: Osamu Ueno, Hitoshi Arakaki
  • Publication number: 20010033210
    Abstract: A microstrip line includes a ground conductor layer, a dielectric layer formed on the ground conductor layer, and a linear conductor layer formed on the dielectric layer to have a linear configuration. The linear conductor layer has a wider portion in the upper part of a cross section thereof taken in a direction perpendicular to the direction in which the linear conductor layer extends and a narrower portion in the lower part of the cross section. The narrower portion is smaller in width than the wider portion.
    Type: Application
    Filed: April 20, 2001
    Publication date: October 25, 2001
    Inventor: Mitsuru Tanabe
  • Publication number: 20010033211
    Abstract: A multilayered RF signal transmission circuit includes an interlevel via hole comprised of a trunk via hole and a branch via hole. The trunk via hole is formed to pass through a region where a plurality of conductors overlap in a direction perpendicular to planes including them, and to run in a direction perpendicular to a signal transmission direction of the plurality of conductors. The branch via hole runs from each end in a longitudinal direction, along which the trunk via hole runs, of the trunk via hole for a predetermined length substantially symmetrically at a predetermined angle with respect to a direction perpendicular to the longitudinal direction.
    Type: Application
    Filed: March 6, 2001
    Publication date: October 25, 2001
    Inventor: Kuniyoshi Nakada
  • Publication number: 20010033209
    Abstract: A coplanar transmission line of the present invention comprises a substrate 10, earth-connected conductors 14, 16 formed on the substrate 10, and a center conductor 12 formed between the earth-connected conductors 14, 16. The center conductor 12 includes a lower center conductor 12a and an upper center conductor 12b formed on the lower center conductor 12a. An edge of the upper center conductor 12b is set-back from an edge of the lower center conductor 12a.
    Type: Application
    Filed: April 20, 2001
    Publication date: October 25, 2001
    Inventor: Yasunori Ogawa
  • Patent number: 6300847
    Abstract: A data server having a plurality of hot replaceable processing unit modules. Each module includes a motherboard having plugged therein: a CPU; a main memory; an I/O adapter card, and an interconnect printed board, electrically connected to the motherboard. A backplane has a first connector adapted for coupling to a DC power supply. The interconnect printed circuit board has a DC to DC converter connected to a second connector adapted to mate with the first connector to enable the processing unit module to be hot plugged into, or removed from, the backplane. The backplane has formed thereon a strip transmission line adapted to provide an Ethernet bus for interconnecting a plurality of the modules. A cable management system for a cabinet used to house the module includes at least one vertically extending channel disposed in the cabinet and a fastener adapted to open and enable the a cable to be inserted into the channel and close to retain such cable within the channel.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: October 9, 2001
    Assignee: EMC Corporation
    Inventors: Brian Gallagher, Nikolai Markovich
  • Publication number: 20010026199
    Abstract: A directional coupler (21) comprises main and auxiliary lines (27, 30) between dielectric boards (23, 24); a ground plate (25) provided on outer face of the dielectric board (23) and a conductive case (34) covering the dielectric boards 23 and 24 and makes contact with the ground plate (25)
    Type: Application
    Filed: March 27, 2001
    Publication date: October 4, 2001
    Inventors: Hiroaki Nishimura, Yukinori Miyake
  • Patent number: 6288557
    Abstract: A probe station for probing a test device has a chuck element for supporting the test device. An electrically conductive outer shield enclosure at least partially encloses such chuck element to provide EMI shielding therefor. An electrically conductive inner shield enclosure is interposed between and insulated from the outer shield enclosure and the chuck element, and at least partially encloses the chuck element.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: September 11, 2001
    Assignee: Cascade Microtech, Inc.
    Inventors: Ron A. Peters, Leonard A. Hayden, Jeffrey A. Hawkins, R. Mark Dougherty
  • Patent number: 6285559
    Abstract: A multichip module (MCM) of the present invention includes a first substrate formed with through holes and having shield electrodes arranged therein. At least one semiconductor device is mounted on one major surface of the first substrate and electrically and mechanically connected to the first substrate by a first conductive material. A second substrate is mounted on the other major surface of the first substrate and formed with through holes. At least one filter device is mounted on the other major surface of the first substrate and electrically and mechanically connected to the first substrate by a second conductive material. The second substrate is electrically connected to the semiconductor device by the through holes and first conductive material. The MCM is capable of enhancing the efficient mounting of devices and promoting easy insulation between the devices.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: September 4, 2001
    Assignee: NEC Corporation
    Inventor: Eiichi Fukiharu
  • Patent number: 6285269
    Abstract: A drain electrode and a source electrode are provided for an intrinsic device section on a GaAs substrate with a gate electrode placed therebetween. Almost all or substantial parts of the GaAs substrate is covered by an extending source electrode extending from the source electrode. A belt-shaped extending drain electrode is provided on the extending source electrode with a dielectric layer placed therebetween, and thereby an output-side microstripline is formed. A belt-shaped extending gate electrode is also provided on the extending source electrode with a dielectric layer placed therebetween, and thereby an input-side microstripline is formed.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: September 4, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yohei Ishikawa, Koichi Sakamoto, Sadao Yamashita, Takehisa Kajikawa
  • Publication number: 20010015684
    Abstract: A circuit board having a dielectric substrate, a grounding surface formed on at least one surface of the dielectric substrate, and transmission lines formed on one surface of the dielectric substrate for transmitting electrical signals. At least a portion of each of the transmission lines is isolated from an upper surface of the dielectric substrate to reduce the effective permittivity between the transmission lines and the grounding surface and a dielectric loss therebetween. In a method of manufacturing a circuit board, first, a sacrificial layer is formed on a dielectric substrate. Next, supporter patterns and transmission line patterns are formed by patterning the sacrificial layer. Then, supporters and transmission lines are formed in the supporter patterns and transmission line patterns, respectively. Following this, the sacrificial layer is removed so that the transmission lines are isolated from the upper surface of the dielectric substrate.
    Type: Application
    Filed: January 2, 2001
    Publication date: August 23, 2001
    Inventors: Yong-jun Kim, Dong-sik Shim, Sang-goog Lee
  • Patent number: 6268783
    Abstract: In a printed circuit board including a signal transmission line, the signal transmission line is formed by first, second and third connection patterns connected in series, and the width of the second connection pattern is smaller than that of the first and second connection patterns.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: July 31, 2001
    Assignee: NEC Corporation
    Inventor: Hiroshi Kamiya
  • Patent number: 6263198
    Abstract: A microwave broadside coupled balun integral in a multi-layer printed wiring board formed by broadside coupled conductors embedded in the multi-layer printed wiring board. The balun may be used to form components which are integrated into the multi-layer printed wiring board, such as a microwave mixer formed by two of said broadside coupled baluns embedded in a multi-layer printed wiring board and connected to a diode ring quad.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: July 17, 2001
    Assignee: WJ Communications, Inc.
    Inventor: Frank Xiaohui Li
  • Patent number: 6259337
    Abstract: A coplanar waveguide structure for use in constructing a monolithic microwave integrated circuit high power amplifier. The coplanar waveguide structure is a coplanar transmission line segment having more than two ground plane electrodes and a plurality of signal/dc current carrying electrodes. The current carrying electrodes are each separated from an adjacent ground plane electrode by a gap. The coplanar waveguide structure forms a shunt inductor for the monolithic microwave integrated circuit high power amplifier. The electrodes are shorted at one end to form the shunt inductor. A center ground plane electrode is preferably at least twice the width of the signal carrying electrode. The gaps between the signal carrying electrode and the ground electrodes are preferably at least one half the width of the signal carrying electrode to minimize current crowding.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: July 10, 2001
    Assignee: Raytheon Company
    Inventor: Cheng P. Wen
  • Patent number: 6255920
    Abstract: A low-pass filter includes metal stub conductors mounted on a signal conductor at midpoints of adjacent high impedance sections of the signal conductor. The metal stub conductors prevent the occurrence of resonance between the high impedance sections, thereby providing a large attenuation value over a wide frequency band above the cutoff frequency of the low-pass filter.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: July 3, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsu Ohwada, Moriyasu Miyazaki, Kazuhiro Mukai
  • Patent number: 6249439
    Abstract: A millimeter wave multilayer phased array assembly has a multilayer board consisting of several laminated printed wiring boards (PWBs) and a frame having a waveguide input and waveguide output. The PWBs are made of a high frequency laminate material and have a pattern of metalization to perform varying electronic tasks. These tasks include electrical interconnection, RF signal transmission, DC current routing and DC signal routing.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: June 19, 2001
    Assignee: Hughes Electronics Corporation
    Inventors: Walter R. DeMore, Richard A. Holloway, Bruce A. Holmes, Benjamin T. Johnson, Dale A. Londre, Lloyd Y. Nakamura
  • Publication number: 20010002116
    Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.
    Type: Application
    Filed: December 18, 2000
    Publication date: May 31, 2001
    Applicant: Sanyo Electric Co, Ltd.
    Inventors: Masao Nishida, Tetsuro Sawai
  • Patent number: 6218910
    Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: April 17, 2001
    Assignee: Formfactor, Inc.
    Inventor: Charles A. Miller