Strip Type Patents (Class 333/246)
  • Patent number: 6219255
    Abstract: A computer system includes a microprocessor, an an input coupled to provide signal inputs to the microprocessor, a mass storage coupled to the microprocessor, a video controller for coupling the microprocessor to a display, a memory coupled to provide storage to facilitate execution of computer programs by the microprocessor, and a multilayer printed circuit board for mounting the microprocessor thereon. The multilayer printed circuit board provides for reduced electromagnetic interference (EMI) and includes at least two layers. The multilayer printed circuit board further includes a first conductive segment on a first layer, a second conductive segment on the first layer, the second segment being separated from the first segment by a primary gap, and a conductive interconnect on a second layer, the interconnect for carrying a high frequency signal therein. The second layer is disposed laterally from and substantially parallel to the first layer.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: April 17, 2001
    Assignee: Dell USA, L.P.
    Inventor: Abeye Teshome
  • Patent number: 6211751
    Abstract: A balun is used in electric communications for supplying power to a balanced line from an unbalanced circuit, a power feeder consisting of a microstrip line. Two microstrip center conductors are connected to the balanced line, and are supplied with signals of opposite phases. This makes it possible to convert an unbalanced current flowing through the microstrip line to a balanced current flowing through the balanced line.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: April 3, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Katsuhiko Aoki
  • Patent number: 6211754
    Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: April 3, 2001
    Assignee: Sanyo Electric Co., Ltd,
    Inventors: Masao Nishida, Tetsuro Sawai
  • Patent number: 6208220
    Abstract: A microwave coupler is constructed in a multilayer, vertically-connected stripline architecture provided in the form of a microwave integrated circuit that has a homogeneous, multilayer structure. Such a coupler has a vertically-connected stripline structure in which multiple sets of stripline layers are separated by interstitial groundplanes, and wherein more than one set of layers has a segment of coupled stripline. A typical implementation operates at frequencies from approximately 0.5 to 6 GHz, although other frequencies are achievable.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: March 27, 2001
    Assignee: Merrimac Industries, Inc.
    Inventor: James J. Logothetis
  • Patent number: 6201459
    Abstract: Transmission lines have variable characteristic impedance and length which may also be integrated with modulators and switches. The external electrical voltage controls the number of loads connected to the transmission line as well as connecting required loads to the transmission line and to modulate the value of a load connected to the transmission line. The transmission line includes several twin-conductor transmission lines where one conductor (2) is a main conductor. The other conductors (11), including those with different lengths, are either connected to conductive parts (1) or spaced by a gap from the conductive parts (1). The transmission lines form an ohmic contact with a semiconductor layer (4) having an electronic or hole-type conductivity with a pre-formed non-rectifying contact. The conductive parts (1) may be formed at the beginning or at the end of the transmission line or, alternatively, at the beginning and at the end of the transmission line.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: March 13, 2001
    Inventors: Valery Moiseevich Ioffe, Askhat Ibragimovich Maksutov
  • Patent number: 6198367
    Abstract: It has been difficult to form a high-frequency electronic circuit using a single-crystal dielectric substrate, and down-sizing of high-frequency electronic circuits is also difficult because of necessity of a metal housing.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: March 6, 2001
    Assignee: Kyocera Corporation
    Inventors: Yoshinori Matsunaga, Tsuyoshi Nakai
  • Patent number: 6188301
    Abstract: A switch structure having a base surface; a first high density interconnect (HDI) plastic interconnect layer overlying the base surface layer; a cavity within the HDI plastic interconnect layer; at least one patterned shape memory alloy (SMA) layer overlying the HDI plastic interconnect layer and the cavity, and at least one patterned conductive layer over the at least one patterned SMA layer; a fixed contact pad within the cavity and attached to the base surface and a movable contact pad attached to a portion of the first patterned SMA layer within the cavity such that when the first and second patterned SMA layers and the first and second patterned metallized layers are in a first stable position, the movable contact pad touches the fixed contact pad, thereby providing an electrical connection and forming a closed switch. The structure has a second stable position in which the SMA and metallized layers are flexed away from the cavity so that the contact pads are not in contact and form an open switch.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: February 13, 2001
    Assignee: General Electric Company
    Inventors: William Paul Kornrumpf, Robert John Wojnarowski
  • Patent number: 6188128
    Abstract: A monoblock structure comprises at least two stacked component levels, each component level comprising a layer of insulative material forming a component and encapsulation storey, at least one component and at least a first track a first end of which is connected to a connection point of the component. The structure further comprises at least one second track disposed laterally and a first end of which is connected to a second end of the first track. It additionally comprises a printed circuit forming a printed circuit storey and supporting at least one third track. A first end of the third track is coupled to a single input and/or output member one end of which is exposed on a face of the structure parallel to the component and printed circuit storeys and a second end of the third track is connected to a second end of the second track.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: February 13, 2001
    Assignee: Alcatel
    Inventor: Claude Drevon
  • Patent number: 6188358
    Abstract: A frequency matched signal conduit apparatus wherein a micro-strip feed fabricated onto a material consistent with long vacuum life applications, such as ceramic or other crystalline materials, is used with a vacuum vessel signal interconnect, electrically connected to the micro-strip feed, comprising thermally resistive, electrically conductive material that provides high thermal isolation and low signal loss, for electrically connecting the micro-strip feed network to a device to be cooled.
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: February 13, 2001
    Assignee: Infrared Components Corporation
    Inventor: Thomas H. Clynne
  • Patent number: 6184757
    Abstract: A number of electronic modules 82, 82′, 83, 83′ are mounted on a cold finger 100 disposed within a sealed housing 104, 110, the interior 210 of which is evacuated. To minimize heat transfer by conduction, gaps are provided in the dielectric substrates carrying the input and output transmission lines providing signal paths between the modules and electrical connectors on the exterior sidewalls 106, 108 of the housing. The gaps are bridged by thin conductive wires, thereby providing low electrical, but high thermal, impedance at the gaps. A number of module assemblies may be stacked on a single cold finger. To allow modules to be adjusted under actual operating conditions, a cover having a number of spring-loaded screwdrivers extending through vacuum tight seals and aligned with adjustable components of the modules, may be temporarily substituted for the enclosure lid 110. The springs urge the screwdrivers out of engagement when no adjustment is being made to minimize heat transfer.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: February 6, 2001
    Assignee: GEC-Marconi Limited
    Inventors: Keith Ronald Rosenthal, Ramanlal Chhiba Mistry, Robert Brian Greed
  • Patent number: 6185354
    Abstract: A printed circuit board comprises a metallic layer (12) cooperating with a metallic plate (26) to form a generally polygonal cross-section (48) of an integral waveguide (46) filled with a solid dielectric layer. The metallic layer (12) is on a substrate (10). The metallic layer (12) has a first strip (14) and a second strip (16) spaced apart from the first strip (14). A solid dielectric layer (18) overlies the metallic layer (12). The solid dielectric layer (18) has a first channel (36) exposing the first strip (14), a second channel (38) exposing the second strip (16), and a land (34) disposed between the first channel (36) and the second channel (38). A metallic plate (26) overlies the land (34), extends through the first channel (36) to the first strip (14), and extends through the second channel (38) to the second strip (16).
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: February 6, 2001
    Assignee: Motorola, Inc.
    Inventors: Jason Andrew Kronz, Roger J. Forse
  • Patent number: 6181219
    Abstract: A printed circuit board assembly having a pair of printed circuit boards. Each one of the boards has a conductive via passing from a surface of a dielectric into an interior region of the dielectric. Each one of the printed circuit boards has a reference potential layer and a signal conductor disposed in the dielectric thereof parallel to, the reference potential layer thereof to provide a transmission line having a predetermined impedance. The signal conductor of each one of the boards is connected to the conductive via thereof. The conductive via in each one of the boards is configured to provide an impedance to the transmission line thereof substantially matched to the impedance of the transmission line thereof. A first electrical connector is provided having a signal contact connected to the conductive via of one of the boards and a second electrical connector having a signal contact connected to the conductive via of the other one of the boards.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: January 30, 2001
    Assignee: Teradyne, Inc.
    Inventors: Mark W. Gailus, Philip T. Stokoe, Thomas S. Cohen
  • Patent number: 6178311
    Abstract: The present invention is a method and apparatus for isolating high frequency signals in a printed circuit board. A barrier strip (36) of staggered elongated grounding slots is positioned on the circuit board to prevent stray signals from leaking from one portion of the board to another. To further improve signal isolation, additional grounding holes (80) are placed around those areas where a trace on a circuit board makes the transition from one layer to another layer in a multilayer circuit board. In addition, microstrip filters (56, 58) are attached to the power or control traces of circuitry on the board at positions where the traces cross from one section of the board to another in order to filter out any stray rf signals that may be induced by the transmitter onto the power and control traces.
    Type: Grant
    Filed: April 1, 1998
    Date of Patent: January 23, 2001
    Assignee: Western Multiplex Corporation
    Inventors: Gordana Pance, Amir H. Zoufonoun
  • Patent number: 6172305
    Abstract: First to fourth power wiring conductors and first to fourth ground wiring conductors are arranged on first to fourth insulating layers, respectively, and a first signal wiring conductor is arranged on the first or second insulating layer and a second signal wiring conductor is arranged on the third or fourth insulating layer.
    Type: Grant
    Filed: July 29, 1998
    Date of Patent: January 9, 2001
    Assignee: Kyocera Corporation
    Inventor: Shigeo Tanahashi
  • Patent number: 6163233
    Abstract: A waveguide structure and a method of forming a waveguide structure is disclosed. The waveguide structure includes at least three dielectric layers juxtapositioned together such that two layers are positioned as outer layers. At least two intermediate signal path layers are positioned between respective dielectric layers. The outer dielectric layers each include a ground layer to form opposing ground planes. A controlled impedance signal track is formed at each intermediate signal path layer and a plurality of conductive vias interconnect the ground planes.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: December 19, 2000
    Assignee: Harris Corporation
    Inventor: Calvin L. Adkins
  • Patent number: 6147570
    Abstract: The monolithic integrated interdigital coupler includes a plurality of parallel conductors (5, 6, 7, 8, 9) extending side-by-side and a plurality of conducting air bridges (10,11,12, 13) connecting pairs of conductors. One end of each conductor is connected with one end of another non-adjacent or non-neighboring conductor by means of one of the conducting air bridges (10,11,12,13). In order to provide a closer or tighter coupling at least one conducting air bridge (10,11,12,13) is connected to the conductor it bridges by a concentrated capacitance (14,15,16,17).
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: November 14, 2000
    Assignee: Robert Bosch GmbH
    Inventor: Hardial Gill
  • Patent number: 6144268
    Abstract: The invention provides a high-frequency transmission line and a dielectric resonator having a small size and having an effectively reduced loss. When a transmission line is produced, an electrode is formed on a dielectric plate in such a manner that one or more gaps are formed in an edge portion of the electrode along an edge of the electrode thereby forming thin line-shaped electrodes whereby a current which would otherwise be concentrated to a great extent in the edge portion of the electrode is divided into a plurality of portions.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: November 7, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Norifumi Matsui, Seiji Hidaka, Yohei Ishikawa
  • Patent number: 6140892
    Abstract: In a distributed constant circuit, a first line is connected between a first node and a second node. The first node is grounded through a series connection between a first capacitor and a second line, and the second node is grounded through a series connection between a second capacitor and a third line. The parameters of the first, second and third lines and the first and second capacitors satisfy a predetermined relational expression such that characteristics equivalent to a .lambda./4 line are obtained with respect to the frequency of a fundamental wave, and the second and third lines and the first and second capacitors respectively resonate with respect to an arbitrary frequency.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: October 31, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hisanori Uda, Masao Nishida
  • Patent number: 6131269
    Abstract: A circuit module construction and method for its fabrication, in which radio-frequency (RF) or millimeter-wave circuit components (10) are electromagnetically isolated in a circuit module (12), to allow for location of multiple circuit components in close proximity without concern for signal loss or interference between components. Multiple RF or millimeter-wave circuit components (10) are installed on a dielectric substrate (14) and are separated by at least one metal isolation wall (20), which extends in depth all the way through the dielectric substrate (14) to a metal layer (16) formed under the substrate. Each isolation wall (20) is formed by first cutting a channel through the dielectric substrate (14), preferably using a laser that selectively removes the dielectric material but not the metal layer (16). Then the channel is filled with metal by electroplating, to provide continuous electromagnetic isolation in a lateral direction, parallel to the plane of the substrate (14).
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: October 17, 2000
    Assignee: TRW Inc.
    Inventors: Alfred E. Lee, Steven S. Chan
  • Patent number: 6130585
    Abstract: A stripline cross-over architecture includes a first stripline layer extending on a first side of a dielectric layer between a first signal input port and a plurality of first signal output ports. A second stripline layer extends on a second side of the dielectric layer between a second signal input port and a plurality of second signal output ports, crossing over the first stripline layer at a plurality of cross-overs of mutual overlap therebetween. The electrical lengths of the stripline layers are defined and the cross-overs are located such that electrical distances between the cross-overs and signal combination locations cause cross-coupled signals to cancel one another, when non cross-coupled signals are combined in phase.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: October 10, 2000
    Assignee: Harris Corporation
    Inventors: Walter M. Whybrew, Jeffery C. May, Douglas E. Heckaman
  • Patent number: 6127908
    Abstract: A microelectro-mechanical device which includes a fixed electrode formed on a substrate, the fixed electrode including a transparent, high resistance layer, and a moveable electrode formed with an anisotropic stress in a predetermined direction and disposed adjacent the fixed electrode. The device includes first and second electrically conductive regions which are isolated from one another by the fixed electrode. The moveable electrode moves to cover the fixed electrode and to electrically couple to the second conductive region, thus electrically coupling the first and second conductive regions, in response to a potential being applied across the fixed and moveable electrodes. The fixed electrode is transparent to electromagnetic signals or waves and the moveable electrode impedes or allows transmission of electromagnetic signals or waves.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: October 3, 2000
    Assignee: Massachusetts Institute of Technology
    Inventors: Carl O. Bozler, Richard G. Drangmeister, Robert J. Parr, Lawrence J. Kushner
  • Patent number: 6114716
    Abstract: Silicon conductive vias and pedestals are disclosed for use in microwave integrated circuits. The pedestals are isolated from a ground plane on the bottom surface by glass, while the vias are used to make electrical contact to ground. Electrical circuit elements in the top surface of the integrated circuit are selectively grounded or isolated by the choice of connection to a via or pedestal, respectively.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: September 5, 2000
    Assignee: The Whitaker Corporation
    Inventors: Timothy Edward Boles, Joel Lee Goodrich
  • Patent number: 6111474
    Abstract: In a low-noise amplifying device, an antenna point is attached to a tip portion of a microstrip line and an end surface of a printed wiring board. The printed wiring board is fixed to a chassis by a screw, a rivet, a projecting portion of a frame or a conductive adhesive in the vicinity of a connection of the antenna pin to the microstrip line. Thereby, even a slight warp that might exist on the board is corrected, so that adhesion between the board and the chassis is reinforced and the low-noise amplifying device stably operates.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: August 29, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masayuki Nibe
  • Patent number: 6097260
    Abstract: A distributed ground pad-based isolation arrangement for a multilayer stripline architecture is configured to effectively inhibit the mutual coupling of signals between overlapping regions of adjacent stripline networks of dielectrically separated transmission networks, without substantially increasing either the mass of the laminate structure or the lossiness of the stripline. At regions of mutual overlap, the stripline layers are spatially oriented at right angles to one another, and a limited area ground pad is interleaved between the stripline layers. To maintain the desired characteristic line impedance of a stripline layer as it passes over a ground pad, the width of the stripline layer is reduced in the overlap region. Each ground pad is connected to an external ground reference by plated vias, that extend through the dielectric layers and intersect outer grounded shielding layers of the laminate.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: August 1, 2000
    Assignee: Harris Corporation
    Inventors: Walter M. Whybrew, Jeffery C. May, Douglas E. Heckaman
  • Patent number: 6097271
    Abstract: This invention is directed to an apparatus for transmitting an electromagnetic wave. The apparatus includes a dielectric material with a permittivity that decreases with increasing frequency over an operating frequency bandwidth that includes the frequency of the electromagnetic wave. With this behavior, the electrical or phase length of the dielectric material remains relatively constant and independent of frequency over the operating band, a feature that is highly advantageous for many important applications including circuit boards, radomes, and antennas. In addition, the dielectric material can be engineered to exhibit this behavior at a desired frequency, including frequencies in the millimeter, microwave, VHF and UHF frequency ranges. In a preferred embodiment, the dielectric material is an artificial dielectric manufactured by mixing conductive particulate into a host dielectric material.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: August 1, 2000
    Assignee: Nextronix Corporation
    Inventor: Dennis J Kozakoff
  • Patent number: 6094115
    Abstract: An interconnect structure defining an interconnect transmission line for RF signal interconnection between two substrates. The interconnect structure includes an outer shield member forming an electrically conductive outer shield structure. A solid conductor pin is sized to form an inner conductor, the pin having a first pin diameter, and a head region of a second pin diameter greater than the first pin diameter, said head region formed intermediate a first pin end and a second pin end. A first dielectric tube member has an outer diameter sized in relation to an opening dimension of the shield member to fit tightly therein, and an inner tube diameter sized to receive tightly therein a first region of the pin of the first pin diameter, the first tube member having a first tube first end and a first tube second end. A second dielectric tube member has an outer diameter sized to fit tightly in the outer shield, and an inner tube diameter sized to receive tightly therein a second region of the pin.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: July 25, 2000
    Assignee: Raytheon Company
    Inventors: Dung T. Nguyen, Claudio S. Howard, Clifton Quan
  • Patent number: 6094359
    Abstract: The invention relates to a HF housing comprising an arrangement for electrically interconnecting at least two HF conductor tracks (18, 19) which are formed on adjacent printed circuit boards (13, 15), which are separated from each other by a slit (17), and whose ends are situated opposite each other in the region of the slit. A simple way of interconnecting the conductor tracks (18, 19) situated opposite each other in the slit region is achieved in accordance with the invention by an auxiliary printed circuit board (20) which bridges the slit region and is pressed against the printed circuit boards (13, 15), the lower side of said auxiliary printed circuit board being provided with auxiliary contact bridges (21) in the region of the HF conductor tracks (18, 19) to be interconnected.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: July 25, 2000
    Assignee: U.S. Philips Corporation
    Inventors: Evangelos Avramis, Peter Matuschik, Ronald Schiltmans
  • Patent number: 6093886
    Abstract: A vacuum-tight cable feedthrough device includes a metallic first flange that is penetrated by a slot. Passing through the slot is a flat stripline cable that includes a plurality of conductive signal channels encompassed by a dielectric material on whose upper and lower surfaces is disposed a conductive material including a ground. The stripline cable is sealed within the slot to provide a substantially vacuum-tight seal between the cable and the first flange. In a preferred embodiment, the cable feedthrough device includes a plurality, at least 16, of stripline cables. In a further preferred embodiment, the device includes a second flange and a bellows sealably connecting the first and second flanges, thereby providing a substantially vacuum-tight, flexible housing for the plurality of cables.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: July 25, 2000
    Assignee: University of Rochester
    Inventors: Kamel Abdel Bazizi, Thomas Eugene Haelen, Frederick Lobkowicz, Paul Francis Slattery
  • Patent number: 6091439
    Abstract: A laser printer is provided printing with a high precision simply and at a high speed, and the laser printer uses a semiconductor laser which can vary the diameter of the emitted light while the light density is held constant. In the laser printer, laser rays emitted from a semiconductor laser are irradiated onto a photoconductor to vary its surface potential to produce a charge pattern particles adhere, and printing is performed by transferring the changed particles to a printing object. The semiconductor laser has a plurality of waveguide type resonators, the emitted beams of the resonators having a spatial superposition, and light emission is possible so that the emitted beams of the resonators having a spatial superposition with respect to each other among the resonators of the semiconductor laser are not substantially superimposed in time.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: July 18, 2000
    Assignees: Hitachi, Ltd., Hitachi Koki Co., Ltd.
    Inventors: Shinichi Nakatsuka, Susumu Saito, Akira Arimoto
  • Patent number: 6087907
    Abstract: A transverse electric or quasi-transverse electric mode to rectangular waveguide mode transformer converts an electrical signal propagating in a transmission line from the TE or quasi-TEM transmission mode to a rectangular waveguide transmission mode for propagating in a waveguide. The transformer comprises a trace printed on a substrate, the substrate having first and second major surfaces and first, second, third, and fourth minor surfaces. The transformer is logically divided into a quasi-TEM mode portion, a conversion portion, and a waveguide mode portion. The quasi-TEM mode comprises a length of microstrip. The microstrip widens to a conversion trace in the conversion portion where there is one or more converting fins oriented perpendicularly to the direction of signal propagation. The conversion portion is adjacent the waveguide mode portion comprising metalized first and second major surfaces and third and fourth minor surfaces.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: July 11, 2000
    Assignee: The Whitaker Corporation
    Inventor: Nitin Jain
  • Patent number: 6075211
    Abstract: There is provided a multi-layered printed wiring board including a power supply layer, a ground layer, a signal layer, and insulators sandwiched between those layers. The power supply layer is provided with a circuit in the form of wirings for imparting impedance thereto. For instance, the power supply layer may be formed to include main wirings for distributing a dc current entirely to the printed wiring board with a dc voltage drop being depressed, and branch wirings for enhancing high frequency impedance to isolate circuits in terms of high frequency, which circuits are mounted on the multi-layered printed wiring board and operated independently with each other. The invention makes it possible to provide a relatively great inductance to thereby decrease high frequency power supply current which is generated on IC/LSI operation and is to flow into decoupling capacitors.
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: June 13, 2000
    Assignee: NEC Corporation
    Inventors: Hirokazu Tohya, Shiro Yoshida
  • Patent number: 6072375
    Abstract: A waveguide structure and associated method for forming the waveguide structure is disclosed. The waveguide structure is formed from at least two dielectric layers having opposing, substantially planar faces and an intermediate signal path layer positioned between the faces. A conductive layer is formed on each of the opposing, substantially planar faces to form outer ground planes. At least one controlled impedance signal track is formed at the intermediate signal path layer. A plurality of conductive vias extend through the dielectric layers and interconnect the ground planes. The vias form a "sea" of vias, which provide enhanced waveguide mode rejection. A plurality of grounding lines interconnect the vias at the intermediate signal path layer. A conductive via is connected to all adjacent conductive vias outside the controlled impedance signal track to form an inner grounding line grid that is coplanar with the controlled impedance signal track for waveguide mode rejection.
    Type: Grant
    Filed: May 12, 1998
    Date of Patent: June 6, 2000
    Assignee: Harris Corporation
    Inventors: Calvin L. Adkins, Donald K. Belcher
  • Patent number: 6049262
    Abstract: A transmission line device includes at least two rectangular plates of an insulating material having opposed planar surfaces and edges. A transmission line of a conductive material is on a surface of at least one of the plates and extends between two opposed edges of the plates. The plate having a transmission line thereon has holes therethrough adjacent its opposed edges, which holes extend to the ends of the transmission line. The holes are filled with a conductive material which makes electrical contact to the ends of the holes. Ground planes of a conductive material are on a surface of the plates. The plates are stacked together with the surface having the transmission lines facing a surface of another plate, and the ground planes facing outwardly. The plates are mechanically secured together either by metal clips or by a suitable cement between the opposed surfaces of the plates. Terminals are at the edges of the plates and are connected to the ends of the transmission line and to the ground planes.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: April 11, 2000
    Assignee: EMC Technology LLC
    Inventor: Joseph B. Mazzochette
  • Patent number: 6046898
    Abstract: Apparatus for blocking a d.c. component of a signal, comprises an electrically conductive signal path (1, 2) having a gap (3) in it preventing direct current flow across the gap, and an electrically conductive element (4) spaced from the path by a body (5) of dielectric material, the element (4) being located and dimensioned such that in use an a.c. signal is coupled from the signal path (1) into the element (4) at one side of the gap, and from tie element (4) into the signal path (2) at the other side of the gap. The apparatus optionally includes a quarter wavelength earthing strap between the signal path and ground potential. The apparatus includes means for providing an a.c. signal feed into a hazardous environment in an intrinsically safe manner.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: April 4, 2000
    Assignee: Central Research Laboratories Limited
    Inventors: Colin Seymour, Nigel Couch
  • Patent number: 6040530
    Abstract: A printed circuit board can be used as a test card. The printed circuit board has a first image and a second image. The first image includes a first array pattern for attaching a package, a first power plane, and a first ground plane. The second image includes a second array pattern for attaching a package, a second power plane, and a second ground plane. A first routing area between the first image and the second image electrically and physically isolates the first power plane from the second power plane. The first routing area also physically isolates the first ground plane from the second ground plane. A first single trace extends through the first routing area. The first single trace electrically connects the first ground plane to the second ground plane.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: March 21, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Robert J. Wharton, Eric R. Daniel, Joseph D. Brown
  • Patent number: 6028497
    Abstract: A hermetic RF pin grid array package methodology is described that obviates the need for glass to metal feedthroughs, simplifying construction, improving reliability and reducing the cost of RF multi-chip modules. An array of cylindrical passages (13, 15) through the module's base plate (3) are aligned with and receive respective associated conductor pins (7, 9) depending from the module substrate (1). Cylindrical metal shrouds (11) are positioned within some passages (15) combine with associated pins (9) to define coaxial RF transmission lines and support for an external RF coax coupling. Unshrouded pins (7) serve to connect DC to the integrated circuit chips in the module. Waveguide interfaces, if required, are provided by conductive coupling structures patterned on the substrate, suspended over a waveguide (17) formed in or about the baseplate.
    Type: Grant
    Filed: January 28, 1998
    Date of Patent: February 22, 2000
    Assignee: TRW Inc.
    Inventors: Barry R. Allen, Edwin D. Dair, Randy J. Duprey
  • Patent number: 6028494
    Abstract: A stripline isolation cross-over is configured to cancel signals that may be mutually coupled at cross-over points between adjacent stripline networks within a compact multilayer signal distribution architecture, such as one feeding elements of phased array antennas, without a shielding layer between adjacent signal distribution networks. The signal distribution networks includes layers of stripline, patterned on opposite sides of a dielectric layer. Wherever the stripline layers mutually overlap, they are oriented at right angles to one another, and one of the striplines is configured as a pair of power dividers, connected back-to-back via stripline interconnect passing the other stripline layer, to form a signal splitting-recombining stripline pair.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: February 22, 2000
    Assignee: Harris Corporation
    Inventors: Jeffery C. May, Walter M. Whybrew, Douglas E. Heckaman
  • Patent number: 6023080
    Abstract: A semiconductor device comprises a dielectric substrate formed on a metal carrier, a semiconductor chip formed on the dielectric substrate and having a first electrode, a microstrip line formed on the dielectric substrate and having a second electrode to be connected to the first electrode, and wires, having different lengths, for connecting the first and second electrodes.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: February 8, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruo Kojima
  • Patent number: 6023211
    Abstract: There is provided a transmission circuit using a strip line which can be formed in three dimensions with simple construction and low cost and which has high reliability. A first microstrip line is formed by sandwiching a dielectric substrate 1 between a first strip conductor 2 provided on a top surface of the dielectric substrate 1 and a first grounding conductor 3 provided on a bottom surface of the dielectric substrate 1. A second microstrip line is formed by sandwiching the dielectric substrate 1 between a second strip conductor 4 provided on the bottom surface of the dielectric substrate 1 and a second grounding conductor 5 provided on the top surface of the dielectric substrate 1. The first strip conductor 2 and the second strip conductor 4 are electrically connected to each other by a connecting through hole 11 provided in the dielectric substrate 1.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: February 8, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Junichi Somei
  • Patent number: 6023210
    Abstract: A improved stripline transition in a planar configuration for coupling signals between two signal planes by electromagnetic coupling.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: February 8, 2000
    Assignee: California Institute of Technology
    Inventor: Ann N. Tulintseff
  • Patent number: 6018282
    Abstract: The voltage-controlled variable-passband filter in accordance with the present invention is structured so that conductive patterns, R, L, and C, and other circuit elements are embedded in a ceramic substrate. Within this substrate is also embedded an insulating layer made of the same ceramic material, the capacitance of which changes in response to an electric field applied thereto. On one surface of the insulating layer is provided a control electrode, and on the other surface are provided adjacent to one another a resonator pattern, to which high-frequency signals are applied, and a ground pattern. Accordingly, two capacitors connected in series are formed between the resonator pattern and the ground pattern, and the capacitance of these series capacitors can be adjusted by an integrated circuit mounted on the ceramic substrate, thus reducing size and weight, and simplifying adjustment.
    Type: Grant
    Filed: November 6, 1997
    Date of Patent: January 25, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoichi Tsuda
  • Patent number: 6014066
    Abstract: A stand-alone circuit board (3), a packaged surface mount PIN diode (1) and a metal ribbon (9) are mounted together in a new tented diode configuration. The flat end surface of the diode end terminal (4) is attached to a metal trace (5) on the circuit board, positioning the diode in an upstanding position, overlying the metal trace and leaving the other diode end terminal (2) in an elevated position over the circuit board. The metal ribbon wraps over the diode symmetrically extending along opposed sides of the diode to complete an electrical connect on the circuit board. In performance, the configuration emulates that prior configuration employing a thick metal plate backed circuit board. An improved RF switch incorporates the foregoing tented diode configuration.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: January 11, 2000
    Assignee: TRW Inc.
    Inventors: Harry S. Harberts, Jeffrey A. Grant
  • Patent number: 6005451
    Abstract: A microwave element is described with a substantially trough-shaped housing part having a bottom portion and at least one wall portion merging into the circumference of the bottom portion. A lid part, together with the housing part, encloses an inner space in which a number of substantially disc-shaped components are present in a stacked arrangement between the bottom portion and the lid part. The microwave element renders possible an inexpensive manufacture without sacrificing any operational properties. The housing part and the lid part are each formed as an integral part without any cutting operation from a magnetically permeable material. The lid part is directly connected to the housing part by matching and mutually retaining shapes. A magnetically impermeable spacer element is arranged adjacent to the stacked arrangement of the disc-shaped components.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: December 21, 1999
    Assignee: U.S. Philips Corporation
    Inventor: Ralf Wendel
  • Patent number: 5994983
    Abstract: A microwave circuit having a two-sided substrate on which a microwave lead-through is arranged in the form of a symmetrical lead-through structure, being provided by opposite metallizationless areas on the upperside and the underside of the substrate and comprising a lead-through conductor, coplanar width adaption segments and first and second line segments connected thereto, the ground of said segments comprising opposite metallization parts being inter-connected through via holes. In a sealed microwave circuit a seal lead-through comprises said lead-through structure and a microstrip line segment.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: November 30, 1999
    Assignee: Sivers IMA AB
    Inventor: Ronny Andersson
  • Patent number: 5990732
    Abstract: A composite high frequency apparatus includes a high frequency filter and a high frequency switch which have a substantially reduced size and do not require an impedance matching circuit. The apparatus includes a multilayered base having an outer surface with a plurality of diodes, an external ground electrode, an external electrode for a transmission circuit, an external electrode for a receiving circuit, an external electrode for an antenna circuit and external electrodes for control terminals located thereon. A plurality of strip lines, capacitor electrodes and an external grounding electrode are located within the multilayered base.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: November 23, 1999
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Koji Furutani, Norio Nakajima, Ken Tonegawa, Mitsuhide Kato, Koji Tanaka, Tatsuya Ueda
  • Patent number: 5982250
    Abstract: A waveguide to microstrip transition (124) formed in a multi-layer substrate (208) is disclosed. The waveguide to microstrip transition (124) may be incorporated into a hermetically sealed package including a metal base (202), a multi-layer circuit (208), a metal ring (206), and a metal cover (204). The multi-layer circuit (208) has at least a first dielectric layer (230), a second dielectric layer (222), and a first conductive layer (218) disposed between the bottom side of the first dielectric layer (230) and the top side of the second dielectric layer (222). The multi-layer circuit (208) includes a waveguide (234). An electromagnetically reflective material (236) coats the walls of the waveguide (234) to allow signals to propagate by reflection through the waveguide (234) toward the first dielectric layer (230). Plated through vias (126) are located in at least the first dielectric layer (230).
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: November 9, 1999
    Assignee: TWR Inc.
    Inventors: Hingloi A. Hung, Randy J. Duprey, Raquel T. Villeages
  • Patent number: 5977847
    Abstract: A microstrip band elimination filter is disclosed, that comprises a microstrip main line 1 that is bend in a rectangular shape, and 1/4.lambda. stubs 2, 3, and 4 that are vertically connected to the microstrip main line 1 at intervals of 1/4.lambda., the edge of each of the 1/4.lambda. stubs 2, 3, and 4 being bent.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: November 2, 1999
    Assignee: NEC Corporation
    Inventor: Kuniharu Takahashi
  • Patent number: 5971804
    Abstract: A data server having a plurality of hot replaceable processing unit modules. Each module includes a motherboard having plugged therein: a CPU; a main memory; an I/O adapter card, and an interconnect printed board, electrically connected to the motherboard. A backplane has a first connector adapted for coupling to a DC power supply. The interconnect printed circuit board has a DC to DC converter connected to a second connector adapted to mate with the first connector to enable the processing unit module to be hot plugged into, or removed from, the backplane. The backplane has formed thereon a strip transmission line adapted to provide an Ethernet bus for interconnecting a plurality of the modules. A cable management system for a cabinet used to house the module includes at least one vertically extending channel disposed in the cabinet and a fastener adapted to open and enable the a cable to be inserted into the channel and close to retain such cable within the channel.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: October 26, 1999
    Assignee: EMC Corporation
    Inventors: Brian Gallagher, Nikolai Markovich
  • Patent number: 5963111
    Abstract: Apparatus and methods for transitioning between opposite sides of adjacent stripline circuit boards. An orthogonal coaxial connection between opposite sides of the stripline circuit boards is provided wherein a center pin of a coax connector is disposed through the first stripline circuit board and the center trace of one of the stripline circuit boards and through the second board. The center pin is soldered or otherwise electrically attached to a small conductor island pad isolated from the ground plane of the second board and to the plated through hole. The ground of the coaxial connector is connected to the ground plane of the second board adjacent to the isolated conductor island pad.
    Type: Grant
    Filed: April 9, 1998
    Date of Patent: October 5, 1999
    Assignee: Raytheon Company
    Inventors: Joseph M. Anderson, Pyong K. Park
  • Patent number: 5959846
    Abstract: First and second electrically insulating substrates are joined with each other at respective joining faces thereof. Each of the first and second insulating substrates has an annular groove at the joining face, and a plurality of through holes along outer and inner peripheries of the annular groove. An annular core is mounted in the annular groove. A cylindrical connection is formed in each through hole, and a radial connection is formed on an outer surface of each insulating substrate so as to connect opposite cylindrical connections. A toroidal coil is formed by serially connecting cylindrical connections and radial connections. An IC chip is mounted on the outer surface of the first insulating substrate, and connected to the toroidal coil and electronic part. The toroidal coil and the electronic part are coated with an electrically insulating material.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: September 28, 1999
    Assignee: Citizen Electronics, Co., Ltd.
    Inventors: Kathuhiko Noguchi, Masashi Miyashita, Yosio Murano