Strip Type Patents (Class 333/246)
  • Patent number: 6538538
    Abstract: A printed circuit board (PCB) via, providing a conductor extending vertically between microstrip or stripline conductors formed on separate layers of a PCB, includes a conductive pad surrounding the conductor and embedded within the PCB between those PCB layers. The pad's shunt capacitance and the magnitudes of capacitances of other portions of the via are sized relative to the conductor's inherent inductance to optimize frequency response characteristics of the via.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: March 25, 2003
    Assignee: FormFactor, Inc.
    Inventors: Emad B. Hreish, Charles A. Miller
  • Patent number: 6538537
    Abstract: A chip capacitor is arranged on a microstrip conductor forming a microstrip line. The chip capacitor has a dielectric material and electrodes provided on both ends thereof. The electrodes of the chip capacitor are connected to the microstrip conductor. A resonance frequency is decided by the length of the microstrip conductor between the electrodes of the chip capacitor, the dielectric constant and the thickness of the dielectric substrate and the capacitance value of the chip capacitor.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: March 25, 2003
    Assignee: Sanyo Electric Co. Ltd.
    Inventors: Masao Nishida, Tetsuro Sawai
  • Patent number: 6535090
    Abstract: A compact high-frequency circuit device including a signal distribution circuit and a signal combining circuit.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: March 18, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Matsuzuka, Takayuki Katoh
  • Patent number: 6535088
    Abstract: A suspended transmission line includes a lossy dielectric support layer having a first side and a second side. A conductor is supported between first and second ground planes by the lossy support layer and includes a first part supported on the first side of the lossy support layer and a second part supported on the second side of the lossy support layer. A propagation structure is positioned between the ground planes to substantially contain an electromagnetic field generated by a signal transmitted on the conductor.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: March 18, 2003
    Assignee: Raytheon Company
    Inventors: James R. Sherman, Ray B. Jones, Barry B. Pruett
  • Patent number: 6535089
    Abstract: A high-frequency circuit device solves problems caused by a spurious mode reflection generated at a part where propagation of a spurious mode wave is prevented, with the result that propagation of the spurious mode wave such as a parallel plate mode wave is blocked. In the arrangement of the high-frequency circuit device, a leakage spurious mode wave radiates from a transmission line including at least two parallel planar conductors, and the leakage spurious mode wave is reflected by a spurious-mode reflection circuit disposed parallel to the transmission line. The distance between the transmission line and the spurious-mode reflection circuit is equivalent to the length in which a wave reflected by the spurious-mode reflection circuit is cancelled by the transmission line.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: March 18, 2003
    Assignee: Murata Manufacturing Co. Ltd.
    Inventor: Kenichi Iio
  • Publication number: 20030043001
    Abstract: A vertical transition device for differential stripline paths, connects differential microstrip paths on a horizontal plane with differential triplate paths on another horizontal plane in a multilayered architecture. The differential microstrip paths include a pair of differential microstrip lines. The differential triplate paths include a pair of triplate lines. The differential microstrip lines are connected with the differential triplate lines by via-holes within the transition device, respectively.
    Type: Application
    Filed: October 2, 2002
    Publication date: March 6, 2003
    Inventor: Hiroshi Aruga
  • Patent number: 6529105
    Abstract: A device, and a method for making the same, for bonding two millimeter elements, which include a substrate having an upper face and a lower face, a conducting line on the upper face and oriented substantially perpendicular to an edge of the substrate, and two continuous bounding zones on the upper face and along the edge of the substrate, each continuous bounding zone being electrically grounded, and having a length along said edge between about two and about five times the width of the conducting lines.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: March 4, 2003
    Assignee: Thomson-CFS
    Inventors: Gerard Cachier, Jean-Yves Daden, Alain Grancher
  • Patent number: 6528732
    Abstract: A circuit device board having a desired characteristic is provided by bonding dielectric substrates. A printed board 11 carrying patterns 11a and 11b incorporating a resonator is joined by a prepreg 13 to a printed board 12 carrying patterns 12a and 12b, which are substantially identical to the patterns 11a and 11b, so that the patterns come opposite to each other. As a grounding conductor is provided on the outer side of each of the printed boards 11 and 12, a band-pass filter having the three-plate structure is completed. The patterns 11a and 12a are connected to each other for determining the signal input while the patterns 11b and 12b are connected to each other for determining the signal output. Accordingly, the frequency response can be obtained at a desired level regardless of the thickness of the prepreg 13.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: March 4, 2003
    Assignee: Sony Corporation
    Inventors: Akihiko Okubora, Takayuki Hirabayashi, Hideyuki Shikichi
  • Patent number: 6525631
    Abstract: A microstrip termination is provided with a thin film resistor connecting a transmission line to a tapered edge ground, enabling high frequency performance, such as for optical modulators. The tapered edge ground is formed with metal deposited on a substrate edge between a top surface of a substrate containing the transmission line with thin film resistor, and a bottom surface with a metal coating forming a ground plane. The tapered edge is cut at an angle in the range of 30 degrees with respect to the top surface. The microstrip termination provides a wider bandwidth of impedance matching than a standard microstrip termination.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: February 25, 2003
    Assignee: Anritsu Company
    Inventor: William W. Oldfield
  • Patent number: 6522214
    Abstract: The invention relates to an electrical transmission arrangement comprising a first strip-line conductor which has its main extension in a first direction in a first plane in the transmission arrangement and comprises a conductor, an upper ground plane which is situated at an upper distance from the conductor and a lower ground plane which is situated at a lower distance from the conductor, and a second strip-line conductor which has its main extension in a second direction in a second plane in the transmission arrangement and comprises a conductor, an upper ground plane which is situated at an upper distance from the conductor and a lower ground plane which is situated at a lower distance from the conductor, where the ground planes are separated from their respective conductors and from one another by a dielectric material, in which transmission arrangement the lower ground plane of the first strip-line conductors coincides with the upper ground plane of the second strip-line conductors at at least one point.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: February 18, 2003
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Thomas Harju, Björn Albinsson
  • Patent number: 6518844
    Abstract: A suspended transmission line with an embedded amplifier includes a support layer and a conductor supported on the support layer between first and second plates each having a ground plane. The conductor includes an input section and an output section. A propagation structure is disposed between the first and second plates to substantially encompass an electric field generated by a signal transmitted on the conductor. An amplifier is coupled to the input and output sections of the conductor and is at least substantially disposed between the first and second plates. The amplifier operates to amplify an input signal received on the input section to generate an output signal on the output section.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: February 11, 2003
    Assignee: Raytheon Company
    Inventors: James R. Sherman, Ofira M. Von Stein
  • Patent number: 6518864
    Abstract: The present invention provides a transmission line structure comprising: a dielectric substrate having first and second surfaces; a signal conductive layer selectively provided on the first surface of the dialectic substrate for signal transmission; at least a first non-signal conductive layer being selectively provided on the first surface of the dialectic substrate, and the at least first non-signal conductive layer being separated from the signal conductive layer; and a second non-signal conductive layer being provided on the second surface of the dialectic substrate, wherein the dielectric substrate has at least a conductive region extending in contact with only one of the at least first non-signal conductive layer and the second non-signal conductive layer so that the at least conductive region is separated by the dielectric substrate from remaining one of the first non-signal conductive layers and the second non-signal conductive layer in view of a vertical direction to the first and second surfaces of
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: February 11, 2003
    Assignee: NEC Corporation
    Inventors: Masaharu Ito, Kenichi Maruhashi, Keiichi Ohata
  • Patent number: 6515236
    Abstract: A printed wiring board in which control of a characteristic impedance of a signal transmission pattern is realized. The printed wiring board includes a flat plate base material, a signal transmission pattern provided on at least one surface of the base material for transmitting a high frequency signal, an insulator layer formed with a constant thickness to cover the signal transmission pattern, and a grounded control unit provided on the insulator layer opposing the signal transmission pattern for controlling a characteristic impedance of the signal transmission pattern.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: February 4, 2003
    Assignee: Sony Corporation
    Inventor: Yoshinari Matsuda
  • Patent number: 6515563
    Abstract: A print board comprises a ground layer, an insulation layer, a signal layer formed on the insulation layer, formed in a predetermined line pattern, and serving as a transmission line for transmitting high-speed signals, and a pad formed on the signal layer. The signal layer has a line width that satisfies a characteristic impedance required for the transmission line, and the width of the signal layer is set substantially equal to the width of the pad.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: February 4, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Patent number: 6515555
    Abstract: A printed circuit board is described. That printed circuit board includes a capacitive load that is coupled to a signal trace. The signal trace has a first section and a second section. The first section is positioned between the capacitive load and the second section. The second section has a first width, and the first section includes first and second lines that each have a width that is smaller than the first width.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: February 4, 2003
    Assignee: Intel Corporation
    Inventors: Michael W. Leddige, James A. McCall
  • Patent number: 6515554
    Abstract: Electrodes are formed on both top and bottom surfaces of a dielectric plate and grounded coplanar lines, as transmission lines, are formed on the top surface of the dielectric plate. A plurality of micro-strip lines, each composed of high-impedance lines and low-impedance lines alternately connected in series, is arranged at a pitch shorter than the wavelength of a wave traveling along the grounded coplanar lines. A spurious mode propagation blocking circuit thus constructed prevents a spurious mode wave, such as a parallel-plate mode, from traveling.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: February 4, 2003
    Assignee: Murata Manufacturing Co. Ltd
    Inventors: Yohei Ishikawa, Kenichi Iio, Takatoshi Kato, Koichi Sakamoto
  • Patent number: 6515561
    Abstract: A connecting structure for high frequency circuits is provided, with which components can be readily replaced, and which does not require high assembly accuracy and is applicable in a broad band. First and second circuit boards each having strip lines on top surfaces thereof are placed to secure a gap therebetween. Patch portions each constituting a resonator are formed by extending the width of the strip lines, and a supporting member of a foam material is placed on the top of the patch portion formed on the first circuit board. A parasitic element made of a dielectric material is cantilevered by the supporting member. The free end side of the parasitic element is placed above the patch portion formed on the second circuit board while securing a predetermined space between the parasitic element and this patch portion. A strong electrical connection is established by the parasitic element that electromagnetically couples non-continuing portions, thereby making it possible to cut a direct current.
    Type: Grant
    Filed: February 2, 2001
    Date of Patent: February 4, 2003
    Assignees: FDK Corporation
    Inventors: Takashi Tamura, Naoki Atsumi, Hiroyuki Arai, Hajime Izumi
  • Patent number: 6512423
    Abstract: A printed board having a structure for equalizing propagation times on transmission lines connecting the same pair of circuit elements at several terminals. The structure controls each propagation delay by connecting each transmission line partially in different dielectric layers having different dielectric constants in a multi-layered printed board regardless of a distance between the terminals to be connected.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: January 28, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuichi Koga
  • Patent number: 6512431
    Abstract: The present invention is generally directed to an interconnect structure, which in accordance with exemplary embodiments, includes a first layer and a second layer for connecting an integral first signal path with a second signal path. The first layer can have a first conductor and a slot. The second layer can be positioned to be in operable communication by an opening between the first layer and the second signal path such that a distance from the first signal path to a second surface of the second layer establishes an evanescent mode of signal propagation.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: January 28, 2003
    Assignee: Lockheed Martin Corporation
    Inventor: Albert Pergande
  • Publication number: 20030016095
    Abstract: A coplanar coupler for use with microstrip input and output ports includes a printed circuit substrate in which first and second metal input ports are formed on a top surface and cooperate with a metal layer on the bottom surface as microstrip lines, and first and second metal output ports formed on the top surface which cooperate with the metal layer on the bottom surface as microstrip lines. The metal layer on the bottom surface functions as a ground plane for the input ports and the output ports, the metal layer being removed in a coupler region underlying at least portions of the metal input and output ports and extending therebetween. First and second metal lines are formed on the bottom surface in the coupler region and function as a coplanar coupler for the input and output ports. Electrical vias in the substrate interconnect the ports and the coplanar coupler.
    Type: Application
    Filed: July 19, 2001
    Publication date: January 23, 2003
    Inventor: Emil James Crescenzi
  • Publication number: 20030011448
    Abstract: A configuration for coupling a dielectric resonator to a microstrip transmission line that maintains a relatively high Q value of the dielectric resonator. The dielectric resonator-to-microstrip transmission line coupling configuration includes a dielectric resonator, a metal wall, and a microstrip conductor mounted on a dielectric substrate surface such that the dielectric resonator is near the microstrip conductor. The dielectric resonator is configured to resonate in an intrinsic non-radiating hybrid electromagnetic mode, and the metal wall is configured as a mirror for conceptually forming an image of the resonating dielectric resonator. When an electromagnetic wave is transmitted on the microstrip transmission line, the dielectric resonator is excited to resonate in the hybrid electromagnetic mode, thereby allowing electromagnetic field coupling between the microstrip transmission line and the dielectric resonator, while maintaining a high Q value of the dielectric resonator.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 16, 2003
    Applicant: Tyco Electronics Corporation
    Inventor: Kristi Dhimiter Pance
  • Patent number: 6507495
    Abstract: An apparatus for use with data processing systems. In one embodiment, the apparatus includes but is not limited to at least one conductive member having a first end electrically coupled to a first conductive structure which partially forms a moat and a second end electrically coupled to a second conductive structure which substantially spans the moat, with the second conductive structure having at least a part overhanging a third conductive structure which partially forms the moat.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: January 14, 2003
    Assignee: Dell Products L.P.
    Inventors: Jeffery C. Hailey, Donald L. Brooks
  • Patent number: 6504189
    Abstract: A microstrip line includes a first conductor pattern formed on a substrate, a second conductor pattern formed on the first conductor pattern with a width substantially identical with a width of the first conductor pattern, and a third conductor pattern formed on the second conductor pattern with a width smaller than the width of the second conductor pattern.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: January 7, 2003
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Hajime Matsuda, Norikazu Iwagami
  • Patent number: 6501343
    Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: December 31, 2002
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 6498551
    Abstract: A low cost millimeter wave (MMW) module for a microwave monolithic integrated circuit (MMIC) includes a carrier board formed of a dielectric material and having at least one MMIC die mounted thereon and at least one interface line, such as a 50 Ohm microstrip interface line. A base plate is formed of a material that has a higher unmatched coefficient of thermal expansion (CTE) than the carrier board and supports same. A housing is mounted over the carrier board and engages the base plate. The housing has at least one subminiature coaxial connector (SMA) interface mounted thereon. A flexible circuit interconnect, such as a fuzz button, connects the subminiature coaxial connector and MMIC die through the interface line. A thermal interface member is positioned between the carrier board and base plate to aid in heat transfer between the base plate and housing and the lower CTE carrier board.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: December 24, 2002
    Assignee: Xytrans, Inc.
    Inventors: Danny F. Ammar, Eugene Fischer, Gavin Clark, John Hubert, Glenn Larson
  • Patent number: 6496081
    Abstract: The present invention provides a transmission equalization system for use with an integrated circuit package employing a substrate. In one embodiment, the transmission equalization system includes a signal transmission subsystem having a pair of transmission line conductors located in the substrate and employing a differential electrical signal. The transmission equalization system also includes an equalization subsystem located proximate the pair of transmission line conductors that employs at least one aperture positioned and oriented to provide a substantially equivalent transmission environment for each of the pair of transmission line conductors.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: December 17, 2002
    Assignee: LSI Logic Corporation
    Inventors: Anand Govind, Aritharan Thurairajaratnam
  • Patent number: 6489866
    Abstract: In a microwave module including a transmitting portion circuit and a receiving portion circuit, the transmitting portion circuit and the receiving portion circuit are respectively constructed by transmission lines of different kinds in which polarization planes are orthogonal to each other, and are constructed on the same surface of the same substrate. For example, one of the transmitting portion circuit and the receiving portion circuit is constructed by a microstrip line, and the other is constructed by a coplanar line. Further, one of the transmitting portion circuit and the receiving portion circuit is constructed by a microstrip line, and the other is constructed by a slot line. By this, there is obtained a microwave module in which mutual interference by an electromagnetic field between element circuits in the module can be suppressed, the circuits can be arranged close to each other without requiring a shielding member, and miniaturization of the module can be realized.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: December 3, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiromitsu Uchida, Yasushi Itoh
  • Patent number: 6486755
    Abstract: A vertical transition device for differential stripline paths, connects differential microstrip paths on a horizontal plane with differential triplate paths on another horizontal plane in a multilayered architecture. The differential microstrip paths include a pair of differential microstrip lines. The differential triplate paths include a pair of triplate lines. The differential microstrip lines are connected with the differential triplate lines by via-holes within the transition device, respectively.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: November 26, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroshi Aruga
  • Publication number: 20020171516
    Abstract: A passive microwave component with constant impedance and electrically adjustable phase length utilizes a microstrip or stripline transmission line geometry incorporating a composite dielectric having both ferroelectric (FE) and ferromagnetic (FM) properties. These properties can be varied with externally applied electric and magnetic fields such that the phase length (or electrical length) of the line can be varied without varying the characteristic impedance of the transmission line. Thus, the component can be electrically tuned without adversely affecting the impedance match. The component can be used in microwave devices such as phase shifters, frequency filters, directional couplers, power dividers and combiners, and impedance-matching networks.
    Type: Application
    Filed: April 4, 2001
    Publication date: November 21, 2002
    Applicant: MCNC
    Inventors: William T. Joines, William D. Palmer
  • Patent number: 6483403
    Abstract: The invention includes a filter element comprising a dielectric substrate and a strip conductive pattern formed on the dielectric substrate. The dielectric substrate has cavities with apertures on the surface of the dielectric substrate. The strip conductive pattern is formed over the apertures of the cavities to serve as inductance. The strip conductive pattern has an approximately uniform line width that effectively improves the production yield and reliability of the filter element.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: November 19, 2002
    Assignee: Sony Corporation
    Inventors: Takayuki Hirabayashi, Akihiko Okubora
  • Patent number: 6483714
    Abstract: A multilayered wiring board comprising a first stacked structure consisting essentially of a first insulating layer having a first parallel conductor array and a second insulating layer formed thereon, having a second parallel conductor array oriented orthogonal to the first parallel conductor array, the first and second parallel conductor arrays being electrically interconnected by a first through conductor array; and a second stacked structure consisting essentially of a third insulating layer having a third parallel conductor array crossing at an angle of 30 to 60 degrees to the first parallel conductor array and a fourth insulating layer formed on top of the third insulating layer, having a fourth parallel conductor array orthogonal to the third parallel conductor array, the third and fourth parallel conductor arrays being electrically interconnected by a second through conductor array, wherein the second stacked structure is overlaid on the first stacked structure by interposing therebetween an intermedi
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: November 19, 2002
    Assignee: Kyocera Corporation
    Inventors: Masanao Kabumoto, Yoshihiro Nabe, Masaru Nomoto, Shigeto Takeda
  • Patent number: 6483404
    Abstract: A millimeter wave filter for surface mount applications includes a dielectric base plate having opposing surfaces. A ground plane layer is formed on a surface of the dielectric base plate. At least one low temperature co-fired ceramic layer is positioned over the ground plane layer and defines an outer filter surface. A plurality of coupled line millimeter wavelength resonators are formed as stripline or microstrip and positioned on the outer filter surface. These resonators can be parallel coupled line filters, including hairpin resonators. Radio frequency terminal contacts are positioned on the surface of the dielectric base plate opposite the at least one low temperature co-fired ceramic layer. Conductive vias extend through the at least one low temperature co-fired ceramic layer, ground plane and dielectric base plate and interconnect the radio frequency terminal contacts and coupled line resonator.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: November 19, 2002
    Assignee: Xytrans, Inc.
    Inventors: Danny F. Ammar, Eugene Fischer
  • Publication number: 20020167380
    Abstract: A micro-electro mechanical system (MEMS) switch having a single anchor is provided. The MEMS switch includes a substrate; grounding lines installed on the substrate to be distant away from each other; signal transmission lines positioned at predetermined intervals between the grounding lines; an anchor placed between the signal transmission lines; a driving electrode that encircles the anchor while not being in contact with the anchor, the signal transmission lines and the grounding lines; and a moving plate that is positioned on the driving electrode to be overlapped with portions of the signal transmission lines, and connected to the anchor elastically.
    Type: Application
    Filed: May 10, 2002
    Publication date: November 14, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seok-jin Kang, Jin-woo Cho
  • Patent number: 6476695
    Abstract: A high frequency module is provided with a resistor array layer with interconnections, in which a plurality of resistor elements having a prescribed resistance value are formed as an array, and in which an interconnection pattern for providing electrical connection to each resistor element is formed in advance. Additionally, a capacitor array layer with interconnection in which a plurality of capacitor elements having a prescribed capacitance value are formed as an array and an interconnection pattern for providing electrical connection to each capacitor element is also formed in advance for later use. A desired circuit constant is obtained by providing interconnections among the plurality of resistor elements and among the plurality of capacitor elements, respectively, in any given combination by simply modifying the respective interconnection patterns instead of the entire module.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: November 5, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masumi Nakamichi
  • Publication number: 20020158722
    Abstract: A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom.
    Type: Application
    Filed: April 29, 2002
    Publication date: October 31, 2002
    Inventors: Kenichi Maruhashi, Masaharu Ito, Keiichi Ohata, Kazuhiro Ikuina, Takeya Hashiguchi
  • Publication number: 20020153976
    Abstract: An arrangement for interconnecting RF ports on mutually parallel printed-circuit boards includes an arrangement of a ladder-shaped conductive foil or thin plate rolled to make a cylindrical inner conductor, and another arrangement of a ladder-shaped conductive foil rolled to make an outer conductor, with the ladder “rungs” being parallel to the axis of the interconnection. The rungs are long slender columns, which deflect laterally or “bulge” in response to axial forces. The inner and outer conductors are spaced apart by a dielectric solid material, preferably elastomeric.
    Type: Application
    Filed: March 8, 2001
    Publication date: October 24, 2002
    Inventor: Brian Alan Pluymers
  • Patent number: 6467152
    Abstract: A microwave microstrip/waveguide transition structure includes a substrate, an elongated microstrip layer residing on a surface of the substrate, and an elongated integral hollow waveguide on the surface of the substrate. The microstrip layer and a side of the hollow waveguide constitute a single continuous piece of metal. The transition structure is fabricated by providing a substrate, depositing a metallic layer on the substrate, and depositing a metallic hollow housing continuous with a portion of a length of the metallic layer. The metallic hollow waveguide bounded by the metallic layer and the metallic hollow housing and having a contained volume therewithin is thereby defined.
    Type: Grant
    Filed: December 11, 1999
    Date of Patent: October 22, 2002
    Assignee: Hughes Electronics Corp.
    Inventors: Hector J. De Los Santos, Yu-Hua Kao Lin, Andrew H. Kwon, Eric D. Ditmars, John R. Dunwoody
  • Publication number: 20020148640
    Abstract: The present invention is directed to methods for producing substrates (24) for electric circuits, particularly ultra high frequency circuits, and electric components (44-48) for mounting thereon employing for the purpose mixtures of polymers and finely powdered filler materials, the latter having specific electric characteristics, such as dielectric constant and/or resistivity. Any one substrate or component can be manufactured to have at least two body regions (241, 242), and even multiple body regions (241-24n), each of which has a different characteristic such as dielectric constant (&Sgr;1-&Sgr;n respectively) or resistivity (R1-Rn respectively). The regions can be formed separately as substrate or component preforms and thereafter placed together in a mold and united into a single body by a heating and pressing operation that at least melts polymer at the junctions to bond them together.
    Type: Application
    Filed: April 11, 2002
    Publication date: October 17, 2002
    Applicant: Holl Technologies Company
    Inventors: Richard A. Holl, Philip L. Lichtenberger
  • Publication number: 20020139579
    Abstract: An electrical interconnect having a multi-layer circuit board structure is designed to facilitate source and load impedance matching. The circuit board structure has a first transmission line extending along a surface of one of the layers, and a second transmission line extending along a surface of another of the layers. A signal line connects the first transmission line to the second transmission line in the vertical direction of the circuit board structure. A conductive ground spacer is interposed between respective layers of the circuit board structure and has a through-hole in which the signal line resides. A dielectric medium, such as air, occupies the through-hole and substantially circumferentially surrounds the signal line. Accordingly, the ground conductor, the signal line and the dielectric medium form a coaxial structure in the vertical direction, by which it is easy to provide a desired characteristic impedance.
    Type: Application
    Filed: March 18, 2002
    Publication date: October 3, 2002
    Inventor: Bongsin Kwark
  • Patent number: 6459347
    Abstract: Conductors extend parallel to one another in a device in the microwave range. Each conductor includes a conductive layer, a layer of a dielectric material and a ground plane. The ground planes of the two conductors are separated in the device by a core made of a dielectric material. The various layers are arranged on one another in the desired order, and a cavity is arranged in the device, extending from that layer in the first conductor which is to be connected to the second conductor, at right angles to the main direction of this layer, up to and including the layer on which the conductive layer of the second conductor is to lie. A component including a stripline conductor is arranged in the cavity, the component being arranged so that electrical contact is brought about between the conductor of the component and that layer in the first conductor which is to be connected to the second conductor.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: October 1, 2002
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Leif Bergstedt, Katarina Boustedt
  • Patent number: 6456420
    Abstract: A MEMS apparatus is provided that includes a microelectronic substrate and an elevating structure having a fixed portion attached to the substrate and a distal portion raised from the surface of the substrate. The distal portion of the elevating structure defines at least one zone of attachment. Additionally, the MEMS apparatus comprises a MEMS device attached to the distal portion of the elevating structure at one of the zones of attachment. The attached MEMS device may comprise an electrostatic actuator having a first and second electrode film that are attached to the elevating structure at one of the zones of attachment. In those embodiments in which the MEMS devices comprise an electrostatic actuator the force and movement provided by the actuator may be used to incorporate switches, pumps, valves or other similar MEMS devices.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: September 24, 2002
    Assignee: MCNC
    Inventor: Scott Halden Goodwin-Johansson
  • Patent number: 6448874
    Abstract: This resonant line comprises a plurality of microstrip lines. The length of each of the microstrip lines is set so that the reactance between one end of each of the microstrip lines and the ground is equivalently inductive and one ends of the microstrip lines are connected to each other.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: September 10, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventors: Ikuhiro Shiino, Isao Ishigaki
  • Patent number: 6449168
    Abstract: The present invention refers to circuit board (10), in particular a multilayer circuit board including at least a first carrying section (11) and a second section (12), conductor pattern (17a, 17b, 17c) and via holes (14, 14b, 14c), at least one of the sections (11; 12) comprises at least one cavity (13a, 13b) for receiving a least one electric component (15), preferably a naked circuit, the second section (11, 12) constitutes a protective cover essentially hermetical sealing of the component (15). The circuit board (10) comprises substrates of a non ceramic material and that said substrates are protected against moisture penetrating in the transverse direction of the substrates by means scaling arranged at outer edges of the substrates.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: September 10, 2002
    Assignee: Telefonaktiebolaget LM Ericcson (publ)
    Inventor: Mats Söderholm
  • Publication number: 20020118083
    Abstract: The present invention is generally directed to an interconnect structure, which in accordance with exemplary embodiments, includes a first layer and a second layer for connecting an integral first signal path with a second signal path. The first layer can have a first conductor and a slot. The second layer can be positioned to be in operable communication by an opening between the first layer and the second signal path such that a distance from the first signal path to a second surface of the second layer establishes an evanescent mode of signal propagation.
    Type: Application
    Filed: February 28, 2001
    Publication date: August 29, 2002
    Inventor: Albert Pergande
  • Patent number: 6437661
    Abstract: A directional coupler (21) comprises main and auxiliary lines (27, 30) between dielectric boards (23, 24), a ground plate (25) provided on the outer face of the dielectric boards (23), and a conductive case (34) covering the dielectric boards (23) and (24) and making contact with the ground plate (25).
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: August 20, 2002
    Assignee: Hirose Electric Co., Ltd.
    Inventors: Hiroaki Nishimura, Yukinori Miyake
  • Patent number: 6437669
    Abstract: An interface have been provided to permit the formation of solder connections between substrates suitable for microwave to millimeter wave frequencies. Specifically, signal traces on the substrate are selectively masked to form solder dams. The high temperature, thick-film solder dams define the bonding area and control the flow of solder. Since the solder dam forms a finite-extent structure, the solder mask minimally overlies the signal trace, and signal propagation through the trace is not degraded.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: August 20, 2002
    Assignee: Applied Micro Circuits Corporation
    Inventors: Robert B. Welstand, Timothy L. Leclair
  • Patent number: 6429757
    Abstract: Coupling arrangement (100, 200) for a stripline network, which comprises a first (160) and a second (110) ground plane, which ground planes are arranged essentially parallel to one another, extend in a common main direction, and each have at least one aperture (170, 120), a stripline conductor (130) arranged between the first (160) and the second (110) ground plane, a first dielectric layer (190) located between the stripline conductor (130) and the first ground plane (160), and a second dielectric layer (180) located between the stripline conductor (130) and the second ground plane (110). The stripline conductor has a first main surface (150) facing towards the first ground plane and a second main surface (140) facing towards the second ground plane.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: August 6, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Ingmar Karlsson, Camilla Johansson, Yvonne Jensen
  • Publication number: 20020093402
    Abstract: A tunable dielectric structure includes a first layer of dielectric material, a second layer of dielectric material positioned adjacent to the first layer of dielectric material, with the second layer of dielectric material having a dielectric constant that is less than the dielectric constant of the first layer of dielectric material, and electrodes for applying a controllable voltage across the first dielectric material, thereby controlling a dielectric constant of the first dielectric material, wherein at least one of the electrodes is positioned between the first and second layers of dielectric material. The dielectric materials can be formed in various shapes and assembled in various orientations with respect to each other. The tunable dielectric structure is used in various devices including coaxial cables, cavity antennas, microstrip lines, coplanar lines, and waveguides.
    Type: Application
    Filed: February 6, 2002
    Publication date: July 18, 2002
    Inventors: Louise C. Sengupta, Steven C. Stowell, Yongfei Zhu, Somnath Sengupta, Luna H. Chiu, Xubai Zhang
  • Patent number: 6418031
    Abstract: An improved method and means for decoupling a printed circuit board are disclosed. A power plane is included having a peripheral edge. The power plane includes a first region and a second region which is separate from and contiguous to the first region. The first region is located from the peripheral edge to a middle portion of the power plane. The first region includes a peripheral portion of the power plane. The second region includes only the middle portion of the power plane. A ground plane is coupled in parallel to the power plane. The ground plane has a peripheral edge. The ground plane includes a first region, and a second region which is separate from and contiguous to the first region. The first region includes the peripheral edge and includes a peripheral portion of the ground plane. The second region includes a middle portion of the ground plane. A first plurality of decoupling elements are connected to the first region of the power plane and to the first region of the ground plane.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: July 9, 2002
    Assignee: International Business Machines Corporation
    Inventor: Bruce Roy Archambeault
  • Patent number: 6417744
    Abstract: The present invention relates to a multilayer printed circuit board arrangement which results in better matching between a stripline (9) and a microstrip (4) in a cavity (6). The solution comprises the use of an asymmetric stripline (9) where the electric field is tied primarily to the lower earth plane (10). This results in good matching at the transition to the microstrip (4), whose field is tied to the lower earth plane (10).
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: July 9, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Björn Albinsson, Thomas Harju