Abstract: An organic light emitting display can improve display quality by securing a charging time of a data signal. An organic light emitting display includes pixels, a data driver, a plurality of data drivers, and a control signal generator. The pixels are respectively positioned at areas defined by scan lines and data lines. The data driver sequentially supplies i (i is a natural number greater than or equal to 2) data signals to each of output lines during one horizontal period. The plurality of data dividers are respectively coupled to the output lines, and supply the i data signals to i data lines. The control signal generator sequentially supplies i control signals to the data dividers, corresponding to the i data signals. In the organic light emitting display, the data dividers supply a corresponding data signal to each data line during the one horizontal period.

Abstract: Provided is a display panel, which includes an active area and a vacant area surrounding the active area, and a dummy pattern area without display functionality being along a boundary between the active area and the vacant area. Also provided are a manufacturing method of a display panel and a panel display device. A dummy pattern area is provided along a boundary of an active area to withstand a loading effect and to ensure the active area is not affected by the loading effect and display patterns are normal and uniform.

Abstract: A display circuit and a driving method thereof and a display apparatus are provided. The display circuit comprises a pixel unit (11), a first gate driving unit (12) and a second gate driving unit (13); wherein the first gate driving unit (12) is configured to input a first gate driving signal to the pixel unit (11); the second gate driving unit (13) is configured to input a second gate driving signal to the pixel unit (11); and the pixel unit (11) is configured to perform threshold compensating and gray scale displaying simultaneously under the control of the first gate driving signal and the second gate driving signal. The apparatus and method is capable of reducing the complexity in design of the display circuit, which is advantageous for raising density of pixels of the display panel. The apparatus and method are applicable to manufacture a display.

Abstract: An active-matrix display device according to the present disclosure includes a plurality of pixels. Each of the pixels includes: a drive transistor disposed on a substrate; and an organic EL element that is caused by the drive transistor to emit light and includes an AM layer disposed above the substrate and a transparent electrode layer disposed above the AM layer. The active-matrix display device further includes: a source line that supplies data to the pixels; and a power supply line that supplies electric power to the pixels. The power supply line is shared by, among the plurality of pixels, two pixels that are adjacent to each other in a second direction that crosses a first direction in which the power supply line is extended. The source line and the AM layer are disposed not to overlap each other in a plan view of the substrate.

Abstract: A thin film transistor substrate having two different types of thin film transistors on the same substrate, and a display using the same are discussed. The thin film transistor substrate can include a substrate, a first thin film transistor (TFT), a second TFT, a first storage capacitor electrode, an oxide layer, a nitride layer, a second storage capacitor electrode, a planar layer and a pixel electrode. The first TFT is disposed in a first area, the second TFT is disposed in a second area, and the first storage capacitor electrode is disposed in a third area on the substrate respectively. The oxide layer covers the first and second TFTs, and exposes the first storage capacitor electrode. The nitride layer is disposed on the oxide layer and covers the first storage capacitor electrode. The second storage capacitor electrode overlaps with the first storage capacitor electrode on the nitride layer. The planar layer covers the first and second TFTs, and the second storage capacitor electrode.

Abstract: A deskew display panel is disclosed in present invention. The deskew display panel includes a plurality of data lines arranged in a column direction, a plurality of scanning lines perpendicular to the column direction and intersecting the data lines; a sub-pixel array including a plurality of sub-pixels arranged in array, each sub-pixel including a transistor and disposed between any two neighboring scanning lines and any two neighboring data lines; the scanning lines disposed in the sub-pixel array and parallel to each other; sub-pixels in each row including a plurality of sub-pixel sets, each sub-pixel set including two sub-pixels, the sub-pixel including the transistor, gates of the transistors connected to two neighboring scanning lines respectively, sources of the transistors connected to the same data line, and drains of the transistors connected to a liquid crystal capacitor and a storage capacitor.

Abstract: Representative implementations of devices and techniques provide conservation of charge in a pixel. Charge in the pixel may be alternately stored in a first gate capacitance of the pixel and a second gate capacitance of the pixel. Transferring the charge between the gate capacitances conserves some or all of the charge, and reduces input power used to charge the gate capacitances.

Abstract: A display device includes: a display panel having: a lower substrate; an upper substrate facing the lower substrate and having at least one through hole formed therein; a display active layer disposed between the lower substrate and the upper substrate; at least one lower pad disposed on the lower substrate; a touch sensing layer disposed on the upper substrate; and at least one connection pad disposed on the upper substrate. The connection pads are electrically connected to the lower pads through connectors disposed in the though holes of the upper substrate.

Abstract: The present disclosure provides a pixel compensating circuit. The circuit includes a driving module and a resetting module connected to a reference voltage line for providing an initial potential and a reset-control potential, a scanning signal line, and the driving module. The circuit further includes a data-writing module connected to a data signal line, the scanning signal line, and the driving module.

Abstract: The present invention provides an LCD display device with a switchable angle of view, comprising two grating lines, a signal line and a pixel components, the signal line running between the two grating lines, wherein each group of the pixel components comprises at least two display drivers and at least two conductive pixel films, the display drivers and the conductive pixel films being electrically connected to each other correspondingly; the display drivers are embedded into the grating lines, respectively, and are electrically connected to the grating lines. When the display drivers respectively disposed on different sides are turned on simultaneously, the LCD display device is switched to a narrow-angle mode; and when one of the display drivers is turned on separately or the display drivers disposed on a same side are turned on simultaneously, the LCD display device is switched to a wide-angle mode.

Abstract: A TFT array substrate is disclosed. The substrate includes a plurality of gate lines, and a first gate drive circuit, where the first gate drive circuit includes m levels of first repeat units. Each level of first repeat unit includes a first shift register. The substrate also includes a second gate drive circuit, where the second gate drive circuit includes n levels of second repeat units. Each level of second repeat unit includes a second shift register. The substrate also includes a first start signal line and a first start transistor, where a drain of the first start transistor is electrically connected with the first start signal line. The substrate also includes a second start transistor, where a drain of the second start transistor is electrically connected with the first start signal line.

Abstract: A display device is provided. The display device can include a first pixel portion comprising a first thin-film transistor provided at the intersection between a first gate line and a first data line, and a first pixel electrode connected to the first thin-film transistor, and a second pixel portion comprising a second thin-film transistor provided at the intersection between a second gate line and the first data line, and a second pixel electrode connected to the second thin-film transistor, wherein the first pixel portion and the second pixel portion are arranged parallel to the first data line, and directions extended the first pixel electrode and the second pixel electrode are extended in such a direction as to face each other.

Abstract: An organic light emitting display device includes display pixels, auxiliary pixels, and a plurality of signal lines. The signal lines include data lines, auxiliary data lines, scan lines, and emission control lines. The auxiliary pixels are to be used for repairing defective ones of the display pixels. In operation, scan signals are supplied in a unit of p scan lines, A emission control signals are to be supplied in a unit of p A emission control lines, and B emission control signals are to be supplied in a unit of p B emission control lines, where p?2.

Abstract: A gate driving circuit for providing a scan signal to a LCD panel is disclosed. The gate driving circuit includes at least one positive level shifter, at least one negative level shifter, a pair of P-type transistor and an N-type transistor. The positive level shifter is utilized for shifting up agate control signal to generate a positive control signal. The negative level shifter is utilized for shifting down the gate control signal to generate a negative control signal. The pair of transistors is utilized for outputting a positive power voltage or a negative power voltage as the scan signal according to the positive control signal and the negative control signal. The positive power voltage minus the positive control signal is less than six volts. The negative control signal minus the negative power voltage is less than six volts.

Abstract: A column driver of a display device provides a high slew rate with lowered power requirements by using external switches connected to upper and bottom output buffers. The upper output buffer is driven between a first voltage rail and a second voltage rail, and outputs a first output signal in response to a first input signal and a second input signal. The bottom output buffer is driven between the second voltage rail and a third voltage rail, and outputs a second output signal in response to a third input signal and a fourth input signal. A first switch group selectively provides input for the upper output buffer and the bottom output buffer. A second switch group feeds back the first and the second output signals to the first or the second input terminal of each of the upper output buffer and the bottom output buffer.

Abstract: A touch panel, a method for fabricating the same and a touch display device are disclosed. The touch panel includes touch units, each of which includes: a capacitor having a first terminal connected to a first bias voltage; a first transistor having an amorphous silicon active layer, one of a source and a drain of the first transistor is connected to a third bias voltage and the other is connected to a second terminal of the capacitor; a second transistor having an oxide semiconductor active layer, a gate of the second transistor is connected to a scan line, one of a source and a drain of the second transistor is connected to the second terminal of the capacitor and the other is connected to a data line. The touch panel further includes a light-shielding layer; an aperture portion is disposed on a part of the light-shielding layer.

Abstract: A pixel structure includes a pixel electrode and a pixel switch including a gate electrode, an upper source electrode, an upper drain electrode, an upper active layer, a lower source electrode, a lower drain electrode, and a lower active layer. A bottom-gate TFT is formed by the upper source electrode, the upper active layer, the upper drain electrode and the gate electrode; a top-gate TFT is formed by the lower source electrode, the lower active layer, the lower drain electrode and the gate electrode. The upper source electrode is connected to the lower source electrode. The pixel electrode includes a first sub-pixel electrode and a second sub-pixel electrode. The first sub-pixel electrode is connected to the upper drain electrode for receiving a first signal; the second sub-pixel electrode is connected to the lower drain electrode for receiving a second signal from the bottom-gate TFT different from the first signal.

Abstract: A pixel includes a voltage dividing unit, a LC capacitor, a control unit, a first capacitor, a writing-in unit, and an adjusting unit. First terminal of the voltage dividing unit receives a first power voltage. The control terminal of the voltage dividing unit receives a first control signal. The LC capacitor is electrically coupled to the second terminal of voltage dividing unit. The control terminal of the control unit receives a second control signal. The writing-in unit provides a first pixel data signal to the first capacitor based on a third control signal. The adjusting unit receives a second power voltage. The adjusting unit divides voltage difference between the first and second power voltages based on the first pixel data signal stored in the first capacitor so as to control voltage stored in the LC capacitor, such that the LC corresponding to LC capacitor can be controlled.

Abstract: The present disclosure provides a display substrate and a display device, which display substrate including a base substrate a plurality rows of subpixel units formed on the base substrate. Each of the subpixel units is of a parallelogram shape including first sides parallel to the row direction and second sides inclined with respect to vertical direction, wherein the vertical direction is perpendicular to the row direction, second sides of subpixel units in the same row have consistent incline direction, and second sides of subpixel units in adjacent two rows have opposite incline directions.

Abstract: A display device with less power consumption. The display device operates in a still image display period and a moving image display period, and includes a receiving circuit having a function of receiving an image signal, a driver circuit having a function of driving a display portion, and the display portion having a function of displaying an image. The display portion displays an image at a frame frequency of less than or equal to 1 Hz in the still image display period. The receiving circuit stops receiving an image signal in the still image display period. Switching from the still image display period to the moving image display period is accurately performed by an external signal.

Abstract: A display device and a method for displaying an image thereof are disclosed. The display device includes a display panel, a gray scale voltage output circuit, a common voltage output circuit and a control circuit. The display panel, according to a first gray scale voltage signal and a first common voltage signal, display an image; the control circuit is used for controlling the gray scale voltage output circuit and the common voltage output circuit to output a second gray scale voltage signal and a second common voltage to the display panel when at a predetermined time to display another image. The present invention can cause the blink rate to be maintained over time at a relatively stable range.

Abstract: A gate driving circuit includes first and second driving stages respectively driving first and second gate lines of a display panel. The first driving stage includes output transistors, a first control transistor controlling an electric potential of a control node in response to a signal provided from the second driving stage through an input terminal before a first gate signal is output, and a second control transistor applying a first carry signal to the input electrode of the first control transistor while the first gate signal is output.

Abstract: The present disclosure relates to a voltage driving pixel circuit, a display panel and a driving method thereof. The voltage driving pixel circuit comprises: any two power lines and a load connected in each power line, wherein there is one or more switching circuits between the any two power lines. By means of the voltage driving pixel circuit of the present disclosure, the power lines form a network structure in the light emitting phase, so as to avoid voltage change of the power line voltage Vdd of each row in the pixel in the light emitting phase, thereby improving lateral resistance drop and crosstalk phenomenon of the variable power line voltage Vdd.

Abstract: The present invention relates to the field of display technology, and provides a circuit and a method for eliminating a shutdown after-image, and a display device. The circuit for eliminating the shutdown after-image in a liquid crystal panel comprises a control module configured to apply a common voltage of a liquid crystal panel to a gate line of the liquid crystal panel under the control of a shutdown signal when the liquid crystal panel is shut down. According to the present invention, it is able to eliminate the shutdown after-image and prevent the occurrence of large shutdown current.

Abstract: For the purpose of providing a display panel that realizes a high light utilization efficiency, a low power consumption, a fast response and a low cost, a display panel of the present invention includes, between a transparent substrate (102) and a TFT substrate (105), (i) a soft material layer (101) that expands or contracts in response to voltage application to the soft material layer (101), (ii) a flexible pixel electrode (102) that expands or contracts together with the soft material layer (101), and (iii) an upper electrode (103).

Abstract: A display device is disclosed. In one aspect, the display device includes a display panel including a display area and a non-display area surrounding the display area. The display device also includes a plurality of active pixels formed in the display area extending in first and second directions as a matrix, a plurality of dummy pixels formed in the non-display area and extending in the second direction, a repair test line and one or more active pixel test lines formed in the non-display area and extending in the first direction, a plurality of scan lines electrically connected to the active pixels and the dummy pixels and extending in the first direction, a plurality of data lines electrically connected to the active pixels and extending in the second direction, and at least one dummy data line electrically connected to the dummy pixels and extending in the second direction.

Abstract: An object is to suppress deterioration of a displayed image even when a refresh rate is reduced in displaying a still image. A liquid crystal display device includes a pixel transistor electrically connected to a pixel electrode, and a capacitor having one electrode electrically connected to the pixel electrode and the other electrode electrically connected to a capacitor line. The pixel transistor is turned on and a voltage based on an image signal is supplied to the pixel electrode, and then, the pixel transistor is turned off so that a holding period during which the pixel electrode holds the voltage based on the image signal starts. A holding signal corresponding to change of the voltage based on the image signal in the pixel electrode in the holding period is supplied to the capacitor line so that a potential of the pixel electrode is constant.

Abstract: The present invention belongs to the field of display technology and provides a thin film transistor and a manufacturing method thereof, an array substrate and a display device. The thin film transistor comprises a gate, a source, a drain and a plurality of insulating layers, wherein at least one insulating layer comprises a Group VB metal oxide. Since the insulting layer is formed by using the Group VB metal oxide which has high dielectric constant, the thickness of the insulating layer can be reduced and the thin film transistor can be miniaturized.

Abstract: Provided is a liquid crystal display including: a liquid crystal panel assembly including a plurality of pixels; a data driver applying data voltages to a plurality of data lines connected to the plurality of pixels; and a signal controller generating image data signals to provide the generated image data signals to the data driver, in which the plurality of pixels includes a reactive mesogen (RM) alignment layer formed on a display panel, and the signal controller generates the image data signals by adjusting the data voltage with the maximum gray applied to the blue pixel to be decreased by a predetermined level.

Abstract: A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first reset unit, a second reset unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function.

Abstract: An organic light-emitting diode display is disclosed. In one aspect, the OLED display includes first and second pixels respectively including first and second capacitors, each of the first and second capacitors including top and bottom electrodes. The first and second pixels respectively include first and second pixel electrodes. The display also includes a substrate, a first conductive layer formed over the substrate and including the bottom electrodes of the first and second capacitors, and a second conductive layer formed over the first conductive layer and including the top electrodes of the first and second capacitors. The display further includes a third conductive layer formed over the second conductive layer and including the first and second pixel electrodes, and a connection node electrically connecting the first capacitor to the second capacitor.

Abstract: A touch display panel structure, a method for forming the touch display panel structure, and a touch display device are provided. The touch display panel structure includes: a substrate, scan lines each including a plurality of scan line segments, touch electrode lines each disposed at an interval between adjacent scan line segments; a first dielectric layer and data lines; a second dielectric layer and a first interconnection structure; a first via hole through the first dielectric layer and the second dielectric layer; a third dielectric layer a common electrode layer; a second via hole through the first dielectric layer and the second dielectric layer; and a plurality of third via holes through the third dielectric layer, wherein each touch electrode is connected to a touch electrode line via the second via hole and the third via hole.

Abstract: A system reads a desired circuit parameter from a pixel circuit that includes a light emitting device, a drive device to provide a programmable drive current to the light emitting device, a programming input, and a storage device to store a programming signal. One embodiment of the extraction system turns off the drive device and supplies a predetermined voltage from an external source to the light emitting device, discharges the light emitting device until the light emitting device turns off, and then reads the voltage on the light emitting device while that device is turned off. The voltages on the light emitting devices in a plurality of pixel circuits may be read via the same external line, at different times.

Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit. The ESD protection circuit includes a transistor structure having at least five thin film transistors (TFTs), said transistor structure configured in view of changes in operating characteristics that depend on a channel length of a back channel etched (BCE) type oxide transistor.

Abstract: An organic electroluminescence display includes a plurality of scan lines, a plurality of data lines, at least one first pixel circuit, and at least one second pixel circuit. The scan lines and the data lines cross. Each of the first and second pixel circuits is electrically connected to one of the scan lines and one of the data lines. The first pixel circuit includes at least one first driving transistor having a first channel in a first channel direction. The second pixel circuit includes at least one second driving transistor having a second channel in a second channel direction. The second channel direction is different from that of the first channel direction.

Abstract: The present invention provides a liquid crystal display panel and liquid crystal display device, which includes data lines, scan lines disposed in a crisscross manner with data lines, pixel electrode disposed within area formed by two adjacent scan lines and two adjacent data lines, and thin film transistor disposed at intersection points of data line and scan line; wherein drain terminal of thin film transistor having extension part acting as repair line for scan line, extension part extending along direction parallel to scan line and an end of extension part away from thin film transistor partially overlapping scan line.

Abstract: An organic light-emitting display apparatus is provided. The apparatus includes an organic light-emitting diode emitting visible light, a driving thin film transistor driving the organic light-emitting diode, and a compensation thin film transistor. The compensation thin film transistor includes a compensation gate electrode, a compensation semiconductor layer, a compensation source electrode, and a compensation drain electrode. The compensation gate electrode includes a first gate electrode, and a second gate electrode electrically connected to the first gate electrode. The compensation drain electrode is electrically connected to the driving gate electrode of the driving thin film transistor.

Abstract: A source drive integrated circuit includes a source driving circuit, output buffers, and voltage protection circuits. The source driving circuit generates data voltages according to a source timing control signal and digital video data. The output buffers output the data voltages from the source driving circuit to output terminals. The voltage protection circuits are connected between the output buffers and the output terminals. A voltage supplied to at least one of the voltage protection circuits is different from a voltage supplied to remaining ones of the voltage protection circuits.

Abstract: A display device that may be driven at both frequencies of 120 Hz and 240 Hz, includes a plurality of pixels arranged in a column direction and a row direction, a plurality of data lines connected with one of the pixels of a j-th row (‘j’ is a natural number) and one of the pixels of a (j+1)-th row in k-th column (‘k’ is a natural number), and connected with one of the pixels of a (j+2)-th row and one of the pixels of a (j+3)-th row in (k?1)-th column, a first gate circuit part configured to apply a gate signal to a (4m?3)-th gate line row (‘m’ is a natural number), a second gate circuit part configured to apply a gate signal to a (4m?2)-th gate line row, a third gate circuit part configured to apply a gate signal to a (4m?1)-th gate line row and a fourth gate circuit part configured to apply a gate signal to a 4m-th gate line row.

Abstract: Displays and display driving methods implement a pixel set/reset scheme. Pixel cells of an example display each include a set terminal, a reset terminal, an output terminal, and a set/reset circuit. Responsive to receiving a set signal on the set terminal, the set/reset circuit asserts a first signal on the output terminal and maintains the first signal on the output terminal until a reset signal is received on the reset terminal. Responsive to receiving a reset signal on the reset terminal, the set/reset circuit asserts a second signal on the output terminal and maintains the second signal on the output terminal until a set signal is received on the set terminal. The optical output of the pixel depends on when the first signal and the second signal are asserted on the output terminal of the set/reset circuit during a predefined modulation period.

Abstract: A liquid crystal display is provided that includes a first substrate on a back surface side, a second substrate on a display surface side and a liquid crystal layer provided between the first and second substrates. The display also includes a plurality of sub-pixels including one or more green sub-pixels and one or more non-green sub-pixels. The first substrate includes first and second wirings provided at the boundary between adjacent sub-pixels. When a green sub-pixel is adjacent to a non-green sub-pixel, the first wiring is provided at a shifted position that is closer to the non-green sub-pixel than the green sub-pixel. Accordingly, when a non-green image is to be displayed, the display can reduce the amount of color mixing of light passing through a green color filter with the light passing through a non-green color filter, particularly when the display is viewed at oblique angles.

Abstract: An image sensor may include an array of image sensor pixels. Each pixel may have a photodiode, a charge storage region, and a charge overflow circuit. The charge storage region may be used to operate the image sensor array in global shutter mode. During high light level illumination, the charge overflow circuit may divert charge away from the photodiode such that only a predetermined portion of the accumulated charge remains in the photodiode. During low light level illumination all of the accumulated charge may be stored in the pixel photodiode. The charge overflow circuit may include a transistor and a resistor or capacitor. By implementing a charge overflow circuit, the size of the charge storage region may be reduced while still preserving the high dynamic range and low noise of the image sensor during all light illumination conditions.

Abstract: According to one embodiment, a power reception section connects to the battery side, and receives supply of power, a detection section detects a singular state where a voltage of the battery side has fallen to a value less than or equal to a predetermined voltage value, a shifting section receives a detection output of the singular state from the detection section to thereby shift to singular control, and a driver connection section connects the plurality of drivers to each other. If the detection section in one of the liquid crystal display drivers has detected the singular state, the shifting section executes the singular control, and the driver connection section notifies the other liquid crystal display drivers that the singular state has been detected.

Abstract: A display apparatus includes a first substrate and a second substrate opposite to the first substrate. The first substrate includes a plurality of color pixels and a white pixel that outputs a second white light having a same gray scale as a first white light formed by mixing light outputted from the plurality of color pixel. The white pixel is activated by a second current that is lower than a first current that activates the color pixels.

Abstract: A display device includes a substrate, a gate line connected to a gate driver, a reference voltage line, a data line crossing the gate line and the reference voltage line, a first thin film transistor including a first drain electrode and connected to the gate line and the data line, a second thin film transistor including a second drain electrode, a third thin film transistor connected to the gate line, the reference voltage line, and the second thin film transistor, and a pixel electrode including a first sub-pixel electrode connected to the first thin film transistor and a second sub-pixel electrode connected to the second thin film transistor. The first drain electrode overlaps the reference voltage line, and an area of a region in which the first drain electrode and the reference voltage line overlap each other increases in a direction toward the gate driver.

Abstract: In general, embodiments of the present invention provide a 3D panel, a method for driving the 3D panel, and an electronic device. The method includes: driving a first group of gate lines row by row and displaying a first image, in scanning a (4k+1)-th frame, k being a natural number; driving a second group of gate lines row by row and displaying a second image, in scanning a (4k+2)-th frame; driving the first group of gate lines row by row and displaying a third image, in scanning a (4k+3)-th frame; driving the second group of gate lines row by row and displaying a fourth image, in scanning a (4k+4)-th frame. Gate lines in the first group of gate lines and those in the second group are arranged alternately. Scanning directions of the (4k+1)-th frame and the (4k+3)-th frame are opposite. Scanning directions of the (4k+2)-th frame and the (4k+4)-th frame are opposite.

Abstract: Disclosed are method and circuit for synchronizing input and output synchronization signals, which can synchronize an output synchronization signal based on frequency change of an input synchronization signal and limit input and output periods, thereby preventing flickering, a backlight driver of a liquid crystal display device using the same, and a method for driving the backlight driver. The method for synchronizing input and output synchronization signals, includes generating an output synchronization signal whose output period is set based on a comparison result between an input period of an input synchronization signal and a previous output period of the output synchronization signal, and limiting the output period of the output synchronization signal within a predefined limit range from the previous output period.

Abstract: A level shifter circuit has a plurality of channels for providing signals to a capacitive load and has circuits for sharing charge stored in the capacitive load between the channels. A first pair of channel clock generating circuits are coupled respectively to a first pair of channels. A second pair of channel clock generating circuits are coupled respectively to a second pair of channels. A pair of switches couple the first pair of channels together and the second pair of channels together, respectively, for sharing charge between the channels. A single resistor is coupled in circuit with all of the channels for controlling a slope of charge sharing between channels.

Abstract: A liquid crystal display includes: first and second substrates; a liquid crystal layer sandwiched between the first and second substrates and comprising a polymer network liquid crystal (PNLC) or a polymer dispersed liquid crystal (PDLC); a common electrode provided on the first substrate; transistors provided on the second substrate for respective pixels; a reflective film provided on the transistors; a color filter provided on the reflective film; and pixel electrodes provided on the color filter and electrically connected to drain electrodes of the respective transistors.

Abstract: The present disclosure discloses a TFT-LCD display panel based on an HSD structure, including: a sub-pixel unit array; a plurality of pairs of gate lines, with each pair being arranged between two adjacent rows of the sub-pixel units, wherein each gate line includes subsections arranged repeatedly and the subsection is consist of subsection portions with different widths, on the wider subsection portion of which a TFT element connected with a pixel electrode of the sub-pixel unit is placed; a plurality of data lines perpendicular to the gate lines, wherein two or more columns of sub-pixel units are arranged between two adjacent data lines. TFT elements of the present disclosure are placed on the gate lines other than the pixel region, which increases the open rate of the pixel region, and thus improves the penetration rate of the pixels.