Abstract: A method of voltage-programming a pixel circuit in a display panel to remove, before programming the pixel circuit, effects due to short-term effects such as caused by fast light transitions or effects due to previous pixel circuit measurements such as charge trapping. During a resetting cycle, the pixel circuit is programmed with a reset voltage value corresponding to a maximum or a minimum voltage value. Then, during a calibration cycle, the pixel circuit is programmed with a calibration voltage based on previously extracted data for the pixel circuit, a pixel current of the pixel circuit is measured, and the extracted data for the pixel circuit is updated based on the measured pixel current. Then, the pixel circuit is programmed with a video data that is calibrated with the updated extracted data. The pixel circuit is finally driven according to the programmed video data and emits a commensurate amount of light.

Abstract: A pixel of a display apparatus includes at least a first transistor and at least a second transistor. A cell of transparent fluid including particles charged to have different polarities from each other is arranged between a pixel electrode and a common electrode. The first and second transistors are connected to the pixel electrode. The pixel is drivable according to pulse amplitude modulation (PAM) and pulse width modulation (PWM) such that a frame of an image is displayable using a single field.

Abstract: Disclosed herein is a display including: a pixel array part configured to include pixels that are arranged in a matrix and each have an electro-optical element, a write transistor for writing a video signal, a drive transistor for driving the electro-optical element based on the video signal written by the write transistor, and a holding capacitor connected between gate and source of the drive transistor, wherein the holding capacitor includes a first electrode, a second electrode disposed to face one surface of the first electrode for forming a first capacitor, and a third electrode disposed to face the other surface of the first electrode for forming a second capacitor, and the first capacitor and the second capacitor are connected in parallel to each other electrically.

Abstract: An organic light emitting display device of the present embodiments includes: a plurality of pixels positioned at intersections of scan lines, data lines, and emission control lines; a pixel unit, including the plurality of pixels, and divided into two or more blocks; a scan driver sequentially supplying scan signals to the scan lines; a data driver supplying data signals to the data lines in synchronization with the scan signals; and two or more emission drivers connected with emission control lines in the blocks, in which each emission driver supplies emission control signals to emission control lines connected thereto, and at least one or more emission control signals are supplied in each block simultaneously.

Abstract: A display device includes a first pixel connected to a first gate line and a data line, a second pixel connected to a second gate line, different from the first gate line, and the data line, the second pixel being pre-charged when the first pixel is charged, a compensation LUT which stores LUT values for compensating a charging rate during a main charging of the second pixel; and an image signal processor which generates a compensated image signal for the main charging of the second pixel. The image signal processor may include a correction value calculating unit which calculates a correction value from the compensation LUT based on first and second input image signal of respective first and second pixels, and a compensated value generating unit which generates a compensated image signal for the second pixel based on the correction value and the second input image signal.

Abstract: A liquid crystal display includes pixels which is disposed in row and column directions, respectively includes pixel electrodes, and arranged along a first pixel column to a sixth pixel column, gate lines including pairs of two adjacent gate lines for each pixel row in the row direction, data lines including a first data line at a left side of the first pixel column, a second data line between the second and third pixel columns, a third data line between the fourth and fifth pixel columns, and a fourth data line at a right side of the sixth pixel column; and common voltage lines including a first common voltage line between the first and second pixel columns, a second common voltage line between the third and fourth pixel columns, and a third common voltage line between the fifth and sixth pixel columns.

Abstract: The drain lines are such that one drain line is formed for every two pixels adjacent to each other within the same pixel row, the gate lines are formed of a first gate line connected to one of the two pixels connected to the same drain line within the same pixel row and a second gate line connected to the other pixel, the pixel electrode is formed of a first linear electrode inclined in a plus direction from the first direction, and a second linear electrode inclined in a minus direction from the first direction, in a region in which the pixel electrode is superimposed over the common electrode, and each pixel has the first and second gate lines and thin film transistor formed in a region between the region of the first linear electrode and the region of the second linear electrode.

Abstract: A threshold voltage sensing circuit applied in a display panel includes a first sensor and a second sensor. The first sensor positioned in the display panel receives an operation signal at a regular time point after start-up and continuously receives multiple driving signals which are the same as those received by the pixel circuits of the display panel and outputs a first output voltage accordingly. The second sensor positioned in the display panel receives the driving signals at a regular time point after start-up and outputs a second output voltage accordingly. When the voltage difference between the first output voltage and the second output voltage is beyond a variation standard, the low level of the gate voltage of the pixel circuit is adjusted.

Abstract: A display device includes a load, a transistor for controlling a current value supplied to the load, a capacitor, a first wiring, a second wiring, and first to fourth switches. Variations in the current value caused by variations in the threshold voltage of the transistor can be suppressed through the steps of: (1) holding the threshold voltage of the transistor in the storage capacitor, (2) inputting a potential in accordance with a video signal, and (3) holding a voltage that is the sum of the threshold voltage and the potential in accordance with the video signal, in the storage capacitor. Accordingly, a desired current can be supplied to the load such as a light emitting element.

Abstract: A liquid crystal display includes a gate driver including stages, and a clock generator which receives a clock generation control signal, generates a clock signal and a clock bar signal based on one or more of the clock generation control signal, a gate-on voltage and a gate-off voltage, and outputs the clock signal and the clock bar signal to the gate driver. The clock generator includes an overcurrent protector unit which intercepts at least one of the clock signal and the clock bar signal when a voltage level of at least one of the gate-on voltage and the gate-off voltage is greater than a reference level.

Abstract: A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a two-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, and a voltage selector. The voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.

Abstract: The purpose of the present invention is to achieve a display device capable of performing an all-selecting drive for gate bus lines without increasing the number of circuit elements more than heretofore and without lowering withstand voltage reliability. In a stage constituent circuit, which constitutes a shift register in a gate driver, an all-selecting signal (ALL-ON) for simultaneously turning all of gate bus lines to a selected state is given, as a low-potential power supply, to a source terminal of a thin film transistor (Tr4) for setting, at a low level, a QB node provided for setting a scanning signal (OUT) at the low level and to a source terminal of a thin film transistor (Tr3) for setting, at the low level, a Q node provided for setting the scanning signal (OUT) at a high level.

Abstract: A voltage compensation circuit and an operation method thereof are provided. The voltage compensation circuit is suitable for a display device. The display device includes a direct-current voltage converter, a voltage level shifter, a panel, and a gate driving circuit. The voltage compensation circuit includes a voltage divider providing a divided voltage form a gate pulse signal, a comparing unit, a time counting unit and a processing unit. The comparing unit receives the divided voltage to provide at least one comparison result. The time counting unit provides a plurality of timing control signals at different time points according to the divided voltage. The processing unit provides a voltage reference signal to the direct-current voltage converter according to the plurality of timing control signals and the comparing result, and accordingly, the direct-current voltage converter adjusts an output voltage relating to the gate driving circuit.

Abstract: There are provided a driving circuit of a semiconductor display device which can obtain an excellent picture without picture blur (display unevenness) and with high fineness/high resolution, and the semiconductor display device. A buffer circuit used in the driving circuit of the semiconductor display device is constituted by a plurality of TFTs each having a small channel width, and a plurality of such buffer circuits are connected in parallel with each other.

Abstract: A transflective liquid crystal display device including, according to one embodiment, a liquid crystal display panel including first and second substrates, a plurality of gate lines and data lines on the first substrate defining a plurality of pixel regions, a thin film transistor at each pixel region, a black matrix and a color filter layer on the second substrate, and a liquid crystal layer between the first an second substrates; a first polarizer and a second polarizer; a backlight unit; a selective reflection film between the liquid crystal display panel and the second polarizer; and a first reflecting layer on at least one of the gate line and the data line of the liquid crystal display panel. The black matrix and the color filter layer include opened areas corresponding to the first reflecting layer so that the light reflected from the first reflecting layer is transmitted through the black matrix and the color filter layer through the opened portions.

Abstract: A display device is provided. The display device includes a pixel driving circuit including a liquid crystal capacitor coupled to a first node, a first storage capacitor, and a first voltage control unit. The first storage capacitor has a first terminal directly connected to a second node and a second terminal coupled to a common electrode. The first voltage control unit has first and second output terminals coupled to the first and second nodes, respectively. In a first period, the first voltage control unit feeds a first data voltage to the first node according to a first scan signal. In a second period later than the first period, the first voltage control unit feeds the first data voltage to the second node according to a second scan signal, such that a voltage level at the first node is changed to a first pixel voltage from the first data voltage.

Abstract: The present disclosure provides a capacitive in-cell touch panel and a display apparatus, wherein touch sensing electrodes are set on a color filter substrate, a common electrode layer connected as a whole plane on a TFT array substrate is divided into strips to be used as touch driving electrodes, and metal driving electrodes directly electrically connected to the corresponding touch driving electrodes are set on the TFT array substrate so as to reduce resistance of the touch driving electrodes. The embodiments of the disclosure can save the production cost and improve the production efficiency. Moreover, the touch function and the display function are driven in a time division manner, and thus the production cost can be further reduced, and the picture quality and touch accuracy can be enhanced.

Abstract: An object is to provide a method for manufacturing a semiconductor device including an oxide semiconductor and having improved electric characteristics. The semiconductor device includes an oxide semiconductor film, a gate electrode overlapping the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The method includes the steps of forming a first insulating film including gallium oxide over and in contact with the oxide semiconductor film; forming a second insulating film over and in contact with the first insulating film; forming a resist mask over the second insulating film; forming a contact hole by performing dry etching on the first insulating film and the second insulating film; removing the resist mask by ashing using oxygen plasma; and forming a wiring electrically connected to at least one of the gate electrode, the source electrode, and the drain electrode through the contact hole.

Abstract: There are provided stage circuits and a scan driver using the same, which can supply scan signals using a simultaneous method or an interlace method. Each of the stage circuits includes a progressive driver and a simultaneous driver. The progressive driver outputs a scan signal to an output terminal, corresponding to a plurality of clock signals supplied simultaneously or progressively, and the coupling between the progressive driver and the output terminal is blocked when a third control signal is supplied. The simultaneous driver outputs a scan signal to the output terminal, corresponding to first and second control signals which do not overlap each other, and the coupling between the simultaneous driver and the output terminal is blocked when a fourth control signal, which does not overlap the third control signal, is supplied.

Abstract: A level shifter circuit has a plurality of channels for providing signals to a capacitive load and has circuits for sharing charge stored in the capacitive load between the channels. A first pair of channel clock generating circuits are coupled respectively to a first pair of channels. A second pair of channel clock generating circuits are coupled respectively to a second pair of channels. A pair of switches couple the first pair of channels together and the second pair of channels together, respectively, for sharing charge between the channels. A single resistor is coupled in circuit with all of the channels for controlling a slope of charge sharing between channels.

Abstract: The present disclosure provides an array substrate and liquid crystal display panel, and a driving method thereof, wherein each pixel unit of the array substrate includes a compensation circuit unit. When proceeding in the direction of scanning and when there is a scanning signal on a scanning line related to a pixel unit in the next row of a present pixel unit, the compensation circuit of the present pixel unit works on a sub electrode of the present pixel unit, such that a ratio of the voltage difference between the sub electrode and a common electrode to the voltage difference between a main electrode and the common electrode during a positive polarity inversion driving period equals a ratio of the voltage difference between the sub electrode and the common electrode to the voltage difference between the main electrode and the common electrode during a negative polarity inversion driving period.

Abstract: A touch substrate includes a base substrate, a common electrode and a wire electrode. The base substrate has a plurality of common electrode areas. A common electrode is disposed in each of the common electrode areas. The common electrode has a plurality of first electrode lines extended in a first direction and arranged in a second direction crossing the first direction and a plurality of second electrode lines arranged in the first direction. The wire electrode is connected to an end of the common electrode to apply a voltage to the common electrode. The common electrode and the wire electrode are simultaneously formed through a same process using a printing substrate.

Abstract: A driving method of an electro-optic device is capable of sufficiently providing a threshold voltage compensation time of a driving transistor and a data writing time. A driving method of an electro-optic device including a first power source, a second power source, data lines, scan lines, signal lines, and pixel circuits, includes: a first step in which a light emitting element is in a non-light-emitting state, and a second transistor is turned on by a change of a pulse applied to a signal line; and a second step in which the scan line is sequentially and exclusively selected after the second transistor is turned on, a third transistor including a gate connected to a selected scan line is turned on, and a corresponding data voltage is written to a first node from the data line through the third transistor.

Abstract: An electrophoretic display includes an electrophoretic panel and a compensation circuit. The electrophoretic panel includes a common electrode, a plurality of scan lines, a plurality of data lines, a plurality of first switches, and a plurality of pixels. Each pixel of the plurality of pixels is coupled to the common electrode and coupled to a corresponding scan line and a corresponding data line through a corresponding first switch of the plurality of first switches. The compensation circuit reduces a voltage drop between a pixel voltage of the pixel and a common voltage of the common electrode when the plurality of first switches are turned off. A capacitor of the compensation circuit is coupled between each scan line and the common electrode. A second switch of the compensation circuit is turned off to float the common electrode before the plurality of first switches are turned off.

Abstract: A Predictive Power Control (PPC) device within a TCON Bias IC that addresses an overdesign inefficiency and enables a low cost solution. A PPC block utilizes the next frame image data and interacts with a pulse width modulation (PWM) control block of internal regulators to proactively prepare the output voltages of a power regulator for the power requirements in one or more future frames, for example.

Abstract: It is an object to provide a semiconductor display device having a touch panel, which can reduce power consumption. The semiconductor display device includes a panel which is provided with a pixel portion and a driver circuit which controls an input of the image signal to the pixel portion, and a touch panel provided in a position overlapping with the panel in the pixel portion. The pixel portion includes a display element configured to perform display in accordance with voltage of the image signal to be input, and a transistor configured to control retention of the voltage. The transistor includes an oxide semiconductor in a channel formation region. The driving frequency of the driver circuit, that is, the number of writing operations of the image signal for a certain period is changed in accordance with an operation signal from a touch panel.

Abstract: A pixel circuit array is disclosed and includes pixel unit circuits, and each of the pixel unit circuit includes a precharge circuit, a compensation circuit, a holding circuit, a driving circuit, a light emitting circuit, a first power supply terminal, a second power supply terminal, a third power supply terminal, a scanning control terminal, a first control terminal and a second control terminal. With the pixel unit circuit, as long as the inputted direct-current reference voltage and the data voltage signal are not varied, the current delivered to the OLED remains constant, thus the uniformity of the OLED can be compensated for.

Abstract: A display device includes a display panel including gate lines, data lines, and pixels each connected to a corresponding gate line and a corresponding data line, a gate driver configured to drive the gate lines, a data driver configured to drive the data lines, and a timing controller configured to generate control signals to control the data driver and to apply a vertical synchronization start signal including a first pulse, a second pulse, a first gate pulse signal, and a second gate pulse signal to the gate driver. The gate driver applies gate driving signals to the gate lines to pre-charge the pixels in response to the first pulse of the vertical synchronization start signal and the first gate pulse signal, and to main-charge the pixels in response to the second pulse of the vertical synchronization start signal and the second gate pulse signal.

Abstract: A display device includes a pixel array section, the pixel array section having pixels arranged in a matrix form, at least one of the pixels including an electro-optical element, a write transistor, a holding capacitance, a drive transistor, and a switching transistor. A write scan line is disposed for each pixel row of the pixel array section and adapted to convey a write signal to be applied to the gate electrode of the write transistor. The wiring structure of the write scan line does not intersect with the wiring pattern connected to the gate electrode of the drive transistor.

Abstract: A liquid crystal optical device includes a liquid crystal optical unit and a drive unit. The liquid crystal optical unit includes a first and second substrate unit, and a liquid crystal layer. The first substrate unit includes a first substrate, a plurality of first electrodes, a second electrode, and a third electrode. The second substrate unit includes a second substrate, a plurality of first opposing electrodes, a second opposing electrode, and a third opposing electrode. The drive unit is configured to implement a first operation including subjecting the first electrodes to a first potential, subjecting the second electrode to a second potential, subjecting the third electrode to a third potential, subjecting the first opposing electrodes to a first opposing potential, subjecting the second opposing electrode to a second opposing potential, and subjecting the third opposing electrode to a third opposing potential.

Abstract: A semiconductor device having a normal function means is provided, in which the amplitude of an output signal is prevented from being decreased even when a digital circuit using transistors having one conductivity is employed. By turning OFF a diode-connected transistor 101, the gate terminal of a first transistor 102 is brought into a floating state. At this time, the first transistor 102 is ON and its gate-source voltage is stored in a capacitor. Then, when a potential at the source terminal of the first transistor 102 is increased, a potential at the gate terminal of the first transistor 102 is increased as well by bootstrap effect. As a result, the amplitude of an output signal is prevented from being decreased.

Abstract: An organic light emitting diode display according to the present invention includes a substrate and a plurality of pixels formed on the substrate. One pixel includes: a scan line formed on the substrate and transmitting a scan signal; a data line and a driving voltage line crossing the scan line and transmitting a data signal and a driving voltage, respectively; a switching thin film transistor connected to the scan line and the data line; a driving thin film transistor connected to a switching drain electrode of the switching thin film transistor; and an organic light emitting diode connected to a driving drain electrode of the driving thin film transistor. The plurality of pixels includes a separation pixel at which the driving voltage line is separated and a connection pixel at which the driving voltage line is connected.

Abstract: A driving circuit electrically coupled between a first data line and a second data line and between a first scan line and a second scan line. The driving circuit includes a first switch, a second switch, a third switch, a fourth switch, a first sub-capacitor, a second sub-capacitor, a fifth switch, a sixth switch, a first voltage dividing unit and a second voltage dividing unit. The first voltage dividing unit is coupled between a second end of the fifth switch and a reference voltage end. The second voltage dividing unit is coupled between a second end of the sixth switch and the reference voltage end, for redistributing stored electric charges.

Abstract: To provide a wireless identification semiconductor device provided with a display function, which is capable of effectively utilizing electric power supplied by an electromagnetic wave. The following are included: an antenna; a power source generating circuit electrically connected to the antenna; an IC chip circuit and a display element electrically connected to the power source generating circuit; a first TFT provided in the power source generating circuit; a second TFT provided in the IC chip circuit; a third TFT provided in the display element; an insulating film provided to cover the first to third TFTs; a first source electrode and a first drain electrode, a second source electrode and a second drain electrode, and a third source electrode and a third drain electrode which are formed over the insulating film; and a pixel electrode electrically connected to the third source electrode or the third drain electrode.

Abstract: A two-stage digital-to-analog converter for outputting an analog voltage in response to a M-bit digital input code includes a one-bit serial charge redistribution digital-to-analog converter having a high reference voltage input node for receiving a high reference voltage and a low reference voltage input node for receiving a low reference voltage, and a voltage selector. The voltage selector sets the high reference voltage and low reference voltage to selected levels depending on at least a portion of the M-bit digital input code.

Abstract: A gate signal line drive circuit and a display using the circuit, which suppress a leak current to reduce a power consumption. A gate signal line drive circuit that supplies a high voltage in a signal high period, and supplies a low voltage in a signal low period, the gate signal line drive circuit including: a high voltage supply switching element that turns on in response to the high period, supplies a voltage of a first basic clock signal to gate signal lines; a high voltage supply off control circuit that supplies a first low voltage to a switch of the high voltage supply switching element in response to the signal low period; and a low voltage supply switching circuit that supplies a second low voltage higher than the first low voltage to the gate signal lines in response to the signal low period.

Abstract: A replica noise generator includes a control logic unit suitable for outputting a capacitance adjusting signal; a replica noise generation unit suitable for generating a replica noise through a coupling of a power voltage used in a pixel array by adjusting a capacitance value in response to the capacitance adjusting signal; and a source follower suitable for inputting the generated replica noise.

Abstract: An electrophoretic display includes an electrophoretic panel, a timing control circuit, a source driver, a gate driver, and a gate line enable circuit. The timing control circuit generates a timing control signal corresponding to a refresh area of a frame according to the refresh area. The gate driver generates output enable signals corresponding to the refresh area according to the timing control signal, and the gate line enable circuit transmits scan signals of first gate lines corresponding to the refresh area to second gate lines corresponding to the refresh area according to the enabled output enable signals. The source driver drives data lines corresponding to the refresh area according to the timing control signal to charge/discharge pixels corresponding to the refresh area.

Abstract: Methods and devices employing circuitry for display turn-off that offsets the effect of kickback voltage are provided. In one example, a method may include determining an amount of kickback voltage that is expected to occur in pixels of the electronic display during shutdown of the display, supplying a common voltage output to a common electrode of a pixel of the electronic display, and supplying an activation signal to the pixel to activate the pixel. The method may also include supplying a data signal to a pixel electrode of the pixel. The data signal may be substantially equal to the sum of the common voltage output and the determined kickback voltage. The method may include removing the activation signal from the pixel to store the data signal in the pixel to reduce the effect of kickback voltage on the pixel electrode of the pixel during shutdown of the electronic display.

Abstract: A display apparatus includes: a display device; a touch detection device; and a driver unit driving the display device so as to sequentially display M horizontal lines in each of plural unit drive periods forming one frame period and driving the touch detection device in N touch detection periods provided in each unit drive period, in which N is lower than M.

Abstract: An electro-optical element may be controlled by a circuit. The circuit may include two transistors having a control capacitor coupled to the common node of the two transistors. The control capacitor may be charged to a value through the selection transistor during the row selection period. The amount of the charge stored in the control capacitor may be used by the charge transistor to properly charge the display capacitance to the intended value after the row selection period and an electric field created from the charge of the display capacitance used to control the electro-optical element.

Abstract: An organic light-emitting display device includes a plurality of organic light-emitting diodes which shares a cathode, a plurality of switching elements which is connected to the cathode, a plurality of capacitors, each comprising a first electrode which is connected to each of the switching elements, respectively, and a second electrode and a power bus line which is connected to the second electrode, wherein each of the plurality of switching elements controls a connection between the cathode and the first electrode.

Abstract: To increase the frequency of input of image signals in terms of design in a field-sequential liquid crystal display device. Image signals are concurrently supplied to pixels provided in a plurality of rows among pixels arranged in matrix in a pixel portion of the liquid crystal display device. Thus, the frequency of input of an image signal to each pixel can be increased without change in response speed of a transistor or the like included in the liquid crystal display device.

Abstract: A display device is disclosed. The display device includes: a pixel array unit and a driving unit which drives the pixel array unit. The pixel array unit includes rows of first scanning lines and second scanning lines, columns of signals, pixels in a matrix state arranged at portions where the scanning lines and the signal lines cross each other and power supply lines and ground lines supplying power to respective pixels. The driving unit includes a first scanner performing line-sequential scanning to pixels by each row by supplying a first control signal to each first scanning line sequentially, a second scanner supplying a second control signal to each second scanning line sequentially so as to correspond to the line-sequential scanning and a signal selector supplying a video signal to rows of signal lines so as to correspond to the line-sequential scanning.

Abstract: The rate of reading from a memory for storing display irregularity correction data is lowered. At the time of display, calculation is carried out in a correction calculation section 12 using an input signal and correction data in RAM 22, and brightness inconsistency correction is carried out. The way in which correction calculation is carried out in the correction calculation section 12 is changed for every frame.

Abstract: A thin film transistor display panel capable of minimizing a bezel and a manufacturing method thereof are provided. The thin film transistor display panel includes: a substrate; a plurality of gate lines and data lines that cross each other on the substrate; a thin film transistor connected to the gate line and the data line; a pixel electrode connected to the thin film transistor; and a plurality of gate voltage supply lines arranged in a parallel direction with the data lines and connected to the plurality of gate lines, respectively, in which one pixel area is defined by two adjacent gate lines and two adjacent data lines, two pixel electrodes are formed in one pixel area, and the gate voltage supply lines pass between the two pixel electrodes formed in the same pixel area.

Abstract: An electronic device may be provided with a display having substrate layers such as a glass color filter layer substrate and a glass thin-film-transistor layer substrate. Display layers such as first and second layers of polymer, a liquid crystal layer interposed between the layers of polymer, color filter elements, and thin-film-transistor circuitry may be formed between the color filter layer substrate and the thin-film-transistor layer substrate. Flexible inactive portions of the display layers may protrude outward from between the color filter layer substrate and the thin-film-transistor substrate. Touch sensor circuitry may be formed from a flexible polymer substrate. The touch sensor circuitry may include conductive touch sensor lines and capacitive electrodes. Each conductive line may be coupled to only a single end of a respective one of the capacitive electrodes.

Abstract: A thin film transistor (TFT) array panel includes: first and second pixel electrodes neighboring each other; a data line extending between the first and the second pixel electrodes; first and second gate lines extending perpendicularly to the data line; a first TFT including a first gate electrode connected to the first gate line, a first source electrode connected to the data line, and a first drain electrode facing the first source electrode and connected to the first pixel electrode; and a second TFT including a second gate electrode connected to the second gate line, a second source electrode connected to the data line, and a second drain electrode facing the second source electrode and connected to the second pixel electrode. The first source electrode has the same relative position with respect to the first drain electrode as the second source electrode with respect to the second drain electrode.

Abstract: The disclosed technical solution relates to an organic light emitting diode driving circuit, and a display panel, a display and a driving method using the same. The organic light emitting diode driving circuit includes a driving unit, a threshold compensation unit and an organic light emitting diode. The preferred threshold compensation unit comprises 5 transistors and a capacitance. The organic light emitting diode driving circuit compensates the threshold voltage Vth of the driving transistor by means of this 6T1C circuit, eliminates the inconsistent operation states of the organic light emitting diode caused by the different threshold voltages of the driving transistor in the entire circuit, thereby solving the problem regarding the brightness and evenness of the organic light emitting diode.

Abstract: A fanout line structure of an array substrate includes a plurality of fanout lines arranged on a fanout area of the array substrate, where resistance value of the fanout line is dependent on length of the fanout line. Each of the fanout lines comprises a first conducting film. Resistance values of a first part of fanout lines are less than resistance values of a second part of the fanout lines, and the first part of fanout lines are covered by an additional conducting film. In the fanout lines covered by the additional conducting film, as the resistance value of the fanout line, increases, area of the additional conducting film covering the fanout line correspondingly decreases. An additional capacitor is generated between the additional conducting film and the first conducting film.