Abstract: Embodiments of the present disclosure are related to a display device, as repairing a disconnection of a gate line by using a driving voltage line and a driving voltage line connection pattern disposed on a pixel where a point that the gate line is disconnected is located, the disconnection of the gate line can be repaired easily while minimizing an arrangement of additional components. Furthermore, as making a pixel where a repaired point is located to be darkened and to be connected to adjacent pixel to be driven, a disconnection defect of the gate line can be repaired while preventing an image abnormality due to the disconnection and the repair of the gate line.

Abstract: A pixel structure and a display device are provided. The pixel structure includes a first metal layer, a transparent electrode layer, and a second metal layer. The first metal layer includes a plurality of first metal lines, a plurality of second metal lines, and a third metal line. The transparent electrode layer is disposed in a space formed by the first metal layer. The second metal layer is disposed over the first metal layer and the transparent electrode layer and disposed on a side of the transparent electrode layer.

Abstract: A method for driving an array substrate includes: charging six sub-pixels of each repeating unit controlled by two gate lines that are coupled to one first control sub-circuit in each of a plurality of charging phases included in a frame period; each charging phase including six charging sub-phases, and one sub-pixel of each repeating unit being charged in each charging sub-phase. In each charging sub-phase, the first control sub-circuit transmits a scanning signal from a scan signal transmission channel to one of two gate lines coupled thereto under control of a scan control signal transmitted by at least one scan control signal line; each second control sub-circuit transmits a data signal from a data signal transmission channel to one data line coupled to a repeating unit under control of a data control signal transmitted by at least one data control signal line.

Abstract: A scan driver includes a plurality of stages, each including a first input part configured to transfer an input signal to a first set node in response to a second clock signal, a second input part configured to transfer a first clock signal to a first reset node in response to the input signal and the second clock signal, a first output part configured to output a third clock signal as a respective scan signal in response to a voltage of a second set node, a second output part configured to output a concurrent driving signal as the respective scan signal in response to a voltage of a second reset node, a first stress relieving transistor connected between the first set node and the second set node, and a second stress relieving transistor connected between the first reset node and the second reset node.

Abstract: A display device includes: a display unit including pixels; a shift register connected to scan signal lines and outputting a pulse signal sequentially, the shift register being divided into shift register segments; a driver generating a clock signal to be supplied to each segment, and a video signal to be input to each pixel; and a controller controlling the driver for generating the clock signal and the video signal, the controller monitoring output of each segment and detecting a malfunction of any of the segments. A shift register unit of a first stage of each segment outputs the pulse signal at a prescribed timing after receiving a start signal. The unit of a stage differing from the first stage outputs the pulse signal at a prescribed timing after receiving a carry signal based on the pulse signal from the unit of a preceding stage.

Abstract: Disclosed are an array substrate and a manufacturing method therefor, a display panel and a display apparatus. The array substrate comprises several pixel units located on a base substrate and arranged in an array, with each of the pixel units comprising a thin-film transistor, and the thin-film transistor comprising a polycrystalline silicon active layer, wherein a length extension direction of a channel of the thin-film transistor is parallel to a pre-set direction; and the pre-set direction is a scanning direction of an excimer laser beam used when forming the polycrystalline silicon active layer.

Abstract: A flat panel display having an improved picture quality is disclosed. In one embodiment, a first pixel electrode and a second pixel electrode are formed in each subpixel area. The electrodes enclose an open space (gap) such that their outer boundary has a substantially rectangular shape. The flat panel display may also include a capacitance electrode coupled to the second pixel electrode to form a coupling capacitor. In use, the coupling capacitor operates such that a magnitude of a voltage applied to the first pixel electrode is lower than an applied data voltage, and a magnitude of a voltage applied to the second pixel electrode is higher than an applied voltage. The different voltages operate such that a tilt direction of LC molecules disposed above the first pixel electrode differs from a tilt direction of LC molecules disposed above the second pixel electrode.

Abstract: The present disclosure relates to a display device including first pixels disposed in a first pixel area, and connected to first scan lines; second pixels disposed in a second pixel area, and connected to second scan lines; a timing controller configured to supply a first clock signal and a second clock signal to a first clock line and a second clock line, respectively; a first scan driver configured to receive the first clock signal through the first clock line, and to supply a first scan signal to the first scan lines; and a second scan driver configured to receive the second clock signal through the second clock line, and to supply a second scan signal to the second scan lines, wherein the second pixel area has a smaller width than the first pixel area.

Abstract: According to one embodiment, a liquid crystal display device includes scanning and video signal lines, pixel electrodes and first and second common electrodes. The pixel electrodes include first and second pixel electrodes with linear electrodes and connection portion. In the first pixel electrodes, the linear electrodes overlap the first common electrode, and the connection portion overlaps first slit between the first and second common electrodes. In the second pixel electrodes, the linear electrodes overlap the second common electrode, and the connection portion overlaps second slit between the second and first common electrodes. Different potentials are applied to the first and second common electrodes.

Abstract: Disclosed are a GOA circuit and a liquid crystal display device. The GOA circuit includes multiple stages of GOA sub-circuits connected in cascade. In a pull-down unit of a GOA sub-circuit, a first thin film transistor and a second thin film transistor are connected in series. Leakage current at Q point in the GOA circuit can be reduced, stability of the GOA circuit can be improved in harsh environments, and reliability of a liquid crystal panel can be enhanced.

Abstract: A drive circuit that has a high production yield is achieved. A unit circuit (50) of a scanning line drive circuit (47) includes a branch wire (61 to 65) and a redundant wire (51 to 55). The branch wire (61 to 65) is formed by a source layer and includes a plurality of connection portions (72). The redundant wire (51 to 55) corresponds to the branch wire (61 to 65), is formed by a redundant wire layer, and includes a plurality of connection portions (57) that allow connection to the connection portions (72) of the branch wire (61 to 65).

Abstract: A pixel array is implemented in a display device. The display device includes a plurality of data lines and a plurality of scan lines. The pixel array includes a first sub pixel row, a second sub pixel row, and a third sub pixel row. The first sub pixel row includes a first sub pixel, a second sub pixel, and a third sub pixel. The second sub pixel row includes a fourth sub pixel, a fifth sub pixel, and a sixth sub pixel. The third sub pixel row includes a seventh sub pixel, an eighth sub pixel, and a ninth sub pixel. The seventh sub pixel is electrically coupled to a first data line. The first sub pixel, the fourth sub pixel, and the fifth sub pixel are electrically coupled to a second data line. The second sub pixel, the third sub pixel, and the eighth sub pixel are electrically coupled to a third data line. The sixth sub pixel and the ninth sub pixel are electrically coupled to a fourth data line.

Abstract: A semiconductor device in which an increase in the degree of wiring congestion due to an increase in the number of output terminals of a driver IC can be reduced is provided. In a shift register of the driver IC, pulse signals are sequentially output in different directions. For example, pulse signal output circuits are provided so as to sequentially output pulse signals in ascending order from right to left and then sequentially output pulse signals in ascending order from left to right. With such a structure, output signals of the driver IC can be output not only from a side opposite to a side along which an input terminal is provided, but also from a side along which the input terminal is provided; thus, the number of output terminals can be increased without an increase in the degree of wiring congestion.

Abstract: A display panel includes a first plurality of pixels in first pixel rows corresponding to a first plurality of gate lines, a second plurality of pixels in second pixel rows corresponding to a second plurality of gate lines, and a gate driver coupled to the first plurality of gate lines and the second plurality of gate lines, the gate driver is configured to in a first display mode, turn on the first plurality of pixels and the second plurality of pixels, and in a second display mode, turn off the first plurality of pixels and turn on the second plurality of pixels. By turning off the pixels in the plurality of rows disposed in the dark areas, the number of the pixels to be driven can be reduced while obtaining a sufficient pixel compensation time, thereby driving the display panel at high speed.

Abstract: A display apparatus includes a first signal pad and a second signal pad on a substrate. The first signal pad receives a first voltage. The second signal pad receives a second voltage less than the first voltage. The at least one conductive pad is between the first signal pad and the second signal pad and receives an alternating current voltage.

Abstract: Disclosed are a pixel structure, an LCD panel and an LCD device. The pixel structure includes scan lines and data lines perpendicularly intersected with each other to form pixel areas in a matrix form. Each pixel area includes a pixel electrode, a first active switch and a second active switch. A gate of the first active switch and a gate of the second active switch are connected to the corresponding scan line, and a drain of the first active switch is connected to the corresponding data line, and a source of the first active switch is connected to the corresponding pixel electrode. A drain of the second active switch is connected to a reference voltage, and a source of the second active switch is connected to the pixel electrode of the next row and disposed together with the corresponding pixel electrode at the pixel electrode of the same column.

Abstract: A display device includes a first substrate, a second substrate, a gate line, a data line, a link line, a driving integrated circuit, a repair line, and a dummy line. The second substrate is spaced apart from the first substrate. The gate line is on the first substrate. The data line is on the first substrate. The link line is connected to one of the gate line and the data line. The driving integrated circuit is connected to the link line. The repair line is in a non-display area of the first substrate. The repair line overlaps, in the non-display area, the link line and the one of the gate line and the data line. The dummy line overlaps the repair line. Shapes of the dummy line and the repair line are substantially equivalent.

Abstract: Disclosed is a timing controller including: a receiving unit configured to receive image data; a buffer memory configured to temporarily store and output the received image data; a timing controller circuit configured to generate a transmission clock signal; and a transmitter configured to receive the transmission clock signal and a transmission data signal, wherein the transmission data signal includes the image data output by the buffer memory, wherein the transmitter is configured to transmit a transmission signal, wherein the transmission clock signal is embedded in the transmission data signal, and wherein the transmission clock signal has a magnitude different from the transmission data signal.

Abstract: The present disclosure relates to a solid-state image sensor and an electronic device enabling prevention of entrance of incident light from adjacent pixels and suppression of color mixture, decrease in resolution, and decrease in sensitivity. In a solid-state image sensor according to one aspect of the present disclosure, each pixel includes: these different photoelectric conversion parts configured to perform photoelectric conversion of light of a first wavelength of light of a second wavelength and a third wavelength respectively. An electrode wiring provided at a boundary of adjacent pixels, horizontally connects an electrode of at least one of the photoelectric conversion parts in one of the adjacent pixels with an electrode of the corresponding one of the photoelectric conversion parts in another of the adjacent pixels and vertically connects with an electrode of at least one of the photoelectric conversion parts of each of the pixels.

Abstract: A display panel driving apparatus includes a data driving part, a comparing part, a data signal controlling part, and a gate driving part. The data driving part generates a dummy data signal in response to dummy image data, outputs the dummy data signal to a dummy data line of a display panel, generates a data signal in response to image data, and outputs the data signal to a data line of the display panel. The comparing part outputs a comparison signal in response to the dummy data signal and a delayed dummy data signal generated due to a load of the dummy data line. The comparison signal indicates how much the delayed dummy data signal is delayed with respect to the dummy data signal. The data signal controlling part controls the data signal using the comparison signal.

Abstract: A plurality of source signal lines extend parallel to each other. Gate signal lines extend parallel to each other while crossing the plurality of source signal lines. A pixel switching element is provided at an intersection of each of the source signal lines and each of the gate signal lines. Driving terminals receive signals to be input to the plurality of source signal lines. Leading lines connect the plurality of driving terminals and the plurality of source signal lines in one to one relationship. A repairing line has a conductive part extending parallel to the plurality of leading lines. An end part of one leading line or each of more leading lines near the source signal line and the driving terminal corresponding to this one or each of these leading lines can become connected through this conductive part.

Abstract: A liquid crystal display includes a pixel electrode which includes a first subpixel electrode and a second subpixel electrode, a first insulating substrate and a second insulating substrate which faces the first insulating substrate, a common electrode which overlaps the pixel region, where the first subpixel electrode includes a first main unit electrode and a first sub unit electrode which is electrically connected to the first main unit electrode and smaller in area than the first main unit electrode, the second subpixel electrode includes a second main unit electrode, and a first opening part which overlaps the first main unit electrode, a second opening part which overlaps the second main unit electrode, and a third opening part which overlaps the first sub unit electrode and has a different shape from those of the first opening part and the second opening part are defined in the common electrode.

Abstract: A display device is disclosed. In one aspect, the display device includes a first wire disposed in the inactive area of the substrate, a first pad overlapping the first wire in the depth dimension of the display device, and a first connecting layer configured to electrically connect the first wire to the first pad. The display device also includes a second wire located on a different layer from the first wire, a second pad overlapping the second wire in the depth dimension of the display device, and a second connecting layer configured to electrically connect the second wire to the second pad.

Abstract: The present examples relate to a liquid crystal display device with a repair function. The present examples repair a defect of a line or a defect of a pixel, using a specialized data signal structure, wherein the data signal structure integrates channel data, which is required for channel driving of a liquid crystal display element, and repair amplifier data, which is used for repairing a defect of a line and/or a pixel. Thus, examples have a better repair function than an alternative liquid crystal display device.

Abstract: The present disclosure discloses a gate driving circuit and a display device, to avoid power consumption arising from overlapping of voltages output by the output ends of gate drivers in the case that the gate driving circuit is configured with a plurality of clock signals. The gate driving circuit includes: a plurality of gate scan lines, and N stages of gate drivers connected in cascade. Each stage of gate drivers includes a reset end and an output end, which provides a gate scan signal to a corresponding gate scan lines. The output end of a m-th stage gate driver is connected provides a reset signal to the reset end of a (m?1)-th stage of gate drivers, N and m are positive integers, and m<N.

Abstract: A liquid crystal display device includes a pixel portion, a selection signal output circuit which outputs a selection signal in the first operation mode and stops outputting the selection signal in a second operation mode, a pixel data signal output circuit which generates and outputs a pixel data signal, and a backlight unit including a cold cathode fluorescent lamp. The pixel portion includes: a transistor which includes a gate electrode supplied with a selection signal and a source electrode and a drain electrode one of which is supplied with a pixel data signal in a first operation mode and which remains off in a second operation mode; a first electrode electrically connected to the other of the source electrode and the drain electrode of the transistor; a second electrode; and a liquid crystal. The transistor includes an oxide semiconductor layer in which a channel is formed.

Abstract: An array substrate is disclosed, and has a substrate. A first metal layer, a first insulation layer, a second metal layer, a second insulation layer, and a pixel electrode layer are disposed on the substrate successively. A plurality of first through holes and a plurality of second through holes are disposed on the position of a link line, so as to expose the first metal line and the second metal line. The first metal line is electrically connected to the second metal line through a conductive line of the pixel electrode layer. Thus, the problem of vertical and parallel light lines of a drain discharge module can be efficiently improved.

Abstract: Provided is a display device. The display device includes: a plurality of gate lines extending in a first direction; a plurality of data lines extending in a second direction that intersects the first direction; and a plurality of pixels connected to the gate lines and the data lines, wherein the pixels include pixels h-th row pixels (h is a natural number) and (h+1)-th row pixels, which are adjacent to each other in the second direction, with a (k+1)-th gate line (k is a natural number) therebetween among the gate lines; and a first pixel displaying a first color and connected to the (k+1)-th gate line among the h-th row pixels and a second pixel displaying the first color and connected to the (k+1)-th gate line among the (h+1)-th row pixels are spaced apart from each other in the first direction and receive different polarities of data voltages.

Abstract: A thin film transistor substrate is provided. The thin film transistor substrate includes a display area including a plurality of pixels, wherein the pixels are connected to gate lines and data lines, a gate driver connected to the gate lines, a plurality of data pads connected to the data lines, a plurality of dummy pattern parts formed of a same layer as the gate lines, and a non-display area in which the gate driver, data pads, and dummy pattern parts are disposed, and the dummy pattern parts are disposed in an area within the non-display area where the gate driver is not disposed, and one of the dummy pattern parts is disposed overlapping with the data pads.

Abstract: A flat panel display having an improved picture quality is disclosed. In one embodiment, a first pixel electrode and a second pixel electrode are formed in each subpixel area. The electrodes enclose an open space (gap) such that their outer boundary has a substantially rectangular shape. The flat panel display may also include a capacitance electrode coupled to the second pixel electrode to form a coupling capacitor. In use, the coupling capacitor operates such that a magnitude of a voltage applied to the first pixel electrode is lower than an applied data voltage, and a magnitude of a voltage applied to the second pixel electrode is higher than an applied voltage. The different voltages operate such that a tilt direction of LC molecules disposed above the first pixel electrode differs from a tilt direction of LC molecules disposed above the second pixel electrode.

Abstract: An array substrate and a display device are provided, and the array substrate, comprising: a substrate; and gate lines (2) and data lines (1), formed on the substrate and configured to defining pixel units, wherein, each data line (1) is located in a middle part of a corresponding pixel unit and configured to dividing each pixel unit into a first sub-pixel unit (7) and a second sub-pixel unit (8), wherein the first sub-pixel unit (7) is connected to one thin film transistor (6) and the second sub-pixel unit (8) is connected to one thin film transistor (6) for independent charging, and the thin film transistors (6) are located in a region corresponding to the corresponding gate line. The data line (1) is arranged in the middle of the corresponding pixel unit, and the first sub-pixel unit (7) and the second sub-pixel unit (8) are connected to two individual thin film transistors (6) to be independently charged, a width of the gate line can be greatly reduced, and the aperture ratio of the pixel can be improved.

Abstract: An organic light emitting display device includes: a display area including a plurality of pixels including organic light emitting diodes, pixel circuits connected to the organic light emitting diodes, and one or more repair circuit units disposed between the pixel circuits of the pixels disposed on adjacent lines, in which the one or more repair circuit units include a plurality of repair circuits arranged to form at least one line within the display area.

Abstract: A scan driving circuit and a liquid crystal display device include a pull-up assembly, a pull-up control assembly that drives the pull-up assembly, a pull-down maintaining assembly, a reference low-level signal, and a down-transmitting assembly. A control end of the down-transmitting assembly is coupled to an output end of the pull-up control assembly and a control end of the pull-up assembly, and a current down-transmitting signal is output from an output end of the down-transmitting assembly.

Abstract: When a first source bus line (SA) or a second source bus line (SB) which is associated with a pixel of one column is electrically connected with a spare wire (AL1), a control circuit (15B) of a liquid crystal display device (100B) according to an embodiment of the present invention is capable of controlling the amplitudes of the oscillation of a first display signal voltage and a second display signal voltage output to the first source bus line (SA) and the second source bus line (SB) so as to be smaller than that achieved when the first source bus line (SA) or the second source bus line (SB) is not electrically connected with the spare wire (AL1).

Abstract: A display device includes a display panel including a plurality of scan lines, a plurality of data lines which crosses the plurality of scan lines, and a plurality of pixels that is connected to the plurality of scan lines and the plurality of data lines, a scan driving unit which provides a plurality of scan signals, each of which includes a scan-on signal and a scan-off signal, to the plurality of scan lines, a data driving unit that provides data voltages to the plurality of data lines, and a timing control unit that determines an order in which the scan signals are provided to the plurality of scan lines, where the scan-on signal is provided to each of the plurality of scan lines based on an order of averages of the data voltages transferred to the pixels connected thereto.

Abstract: A method of manufacturing a light emitting device is provided in which satisfactory image display can be performed by the investigation and repair of short circuits in defect portions of light emitting elements. A backward direction electric current flows in the defect portions if a reverse bias voltage is applied to the light emitting elements having the defect portions. Emission of light which occurred from the backward direction electric current flow is measured by using an emission microscope, specifying the position of the defect portions, and short circuit locations can be repaired by irradiating a laser to the defect portions, turning them into insulators.

Abstract: The present invention discloses a method for repairing a display panel, in which a path for electrically connecting two ends of an opened data line at an opened part thereof is formed by using first line segments and a first common electrode, wherein each of the first line segments is a part of one of common electrode lines in the display panel intersecting the opened data line, and the first common electrode is one of a plurality of common electrodes in a pixel array that is electrically connected with the first line segments. Further, a welding process is performed at an intersecting region between the first line segments and the opened data line to form an electrical connection, and electrical connections between the path and other common electrode lines and other common electrodes outside the path are cut off.

Abstract: A liquid crystal pixel circuit and a driving method thereof are provided. The liquid crystal pixel circuit has a main pixel, a sub pixel and a charge sharing switch. The charge sharing switch is electrically coupled between the main pixel and the sub pixel. The main pixel, the sub pixel and the charge sharing switch are controlled by the same gate line. The provided driving method is used for driving the liquid-crystal pixel circuit mentioned above.

Abstract: The invention provides a liquid crystal display device that includes an IGZO-GDM which can quickly remove a residual charge in a panel when the power supply is turned off, and a driving method of the liquid crystal display device. Each bistable circuit that configures a shift register includes a thin film transistor TI for increasing a potential of an output terminal based on a first clock, a region netA connected to a gate terminal of the thin film transistor TI, a thin film transistor TC for lowering a potential of the region netA, and a region netB connected to a gate terminal of the thin film transistor TC. In such a configuration, a power supply off sequence includes a display off sequence and a gate off sequence. The gate off sequence includes at least a gate-bus-line discharge step (t14 to t15), a netB discharge step (t15 to t16), and a netA discharge step (t16 to t17).

Abstract: An array substrate includes a display area including a plurality of pixels coupled to a plurality of gate lines and a plurality of data lines; a data driving unit, coupled to a fan-out unit and configured to drive the data lines; a first switching circuit between the display area and the data driving unit and configured to control the data lines to share electric charges in an image display mode; and a second switching circuit coupled to the fan-out unit via a fuse unit and configured to be disconnected from the fan-out unit in the image display mode.

Abstract: An organic light-emitting display device includes a plurality of emission pixels aligned in columns and rows, each of the emission pixels including an emission device and a first pixel circuit coupled to the emission device, a dummy pixel including a second pixel circuit in each column of the emission pixels, and a repair line in each column, wherein a same data signal is provided to one of the emission pixels coupled to the repair line and to the dummy pixel coupled to the repair line, and wherein the emission pixels are configured to simultaneously emit light.

Abstract: A driving circuit for a liquid crystal display comprises a light sensitive element configured to be arranged on a liquid crystal panel of the liquid crystal display, and detect an operation state of a backlight source of the liquid crystal display; and a reset signal output device configured to receive an input signal from the light sensitive element in accordance with the operation state of the backlight source, and output a reset signal to a gate line driver of the liquid crystal display so as to turn on all of gate lines on the liquid crystal panel.

Abstract: A display device includes a display portion, a source driver that is connected to a second end of a source signal line to output to the source signal line a first source signal for a first pixel electrode and a second source signal for a second pixel electrode, a gate driver that outputs first and second gate signals to first and second gate signal lines, and a controller that controls the gate driver and the source driver to control output timings of the first and second gate signals relative to output timings of the first and second source signals. The controller sets a first time interval from the output timing of the first source signal to the output timing of the first gate signal to be longer than a second time interval from the output timing of the second source signal to the output timing of the second gate signal.

Abstract: An electrophoretic display system includes an electrophoretic display panel, a timing controller, a data driver, and a gate driver. The data driver includes a first serial-to-parallel converter and a data converter. The first serial-to-parallel converter receives a plurality of first series data and converts the first series data into a plurality of second series data. The quantity of the second series data is more than the quantity of the first series data. The data converter receives the second series data and is electrically connected to the electrophoretic display panel. Besides, the data converter converts the second series data into display voltages, and the quantity of the display voltages is more than the quantity of the second series data. The gate driver is electrically connected to the electrophoretic display panel and the timing controller and controlled by the timing controller to provide gate driving voltages to the electrophoretic display panel.

Abstract: An organic light-emitting display apparatus includes an emission pixel in a display area and a spare pixel circuit in a repair area outside the display area. The emission pixels includes a plurality of sub emission pixels each including a driving unit for generating a driving current corresponding to input data signals and an emission device for emitting light by using the driving current. The spare pixel circuit is coupled to a repair line that is coupled to the emission device of one of the sub emission pixels. The spare pixel circuit includes a plurality of driving transistors corresponding to the plurality of sub emission pixels.

Abstract: A thin film transistor substrate includes: first and second driving chips; a plurality of signal lines respectively connected to the first and second driving chips; a plurality of first and second branch repair lines extended across the plurality of signal lines connected to the first driving chip; a plurality of third and fourth branch repair lines extended across the plurality of signal lines connected to the second driving chip; an insulating layer between the plurality of first and second branch repair lines and the plurality of signal lines connected to the first driving chip, and between the plurality of third and fourth branch repair lines and the plurality of signal lines connected to the second driving chip; a first repair line connecting the first and second branch repair lines to each other; and a second repair line connecting the third and fourth branch repair lines to each other.

Abstract: A three dimensional image display device includes a liquid crystal display panel assembly which includes a first pixel and a second pixel disposed adjacent to each other in a vertical direction. The first pixel comprises a first subpixel and a second subpixel disposed adjacent to each other in the vertical direction, and the second pixel includes a third subpixel and a fourth subpixel which are disposed adjacent to each other in the vertical direction. The first subpixel and the third subpixel, or the second subpixel and the fourth subpixel display black in a three dimensional (3D) display mode and display a normal image in a two dimensional (2D) display mode.

Abstract: The invention provides an image display device capable of reducing the transmission delay of a scanning signal. A plurality of scanning signal lines are wired in one pixel circuit row. Pixel circuits of the pixel circuit row are connected to any of the plurality of scanning signal lines.

Abstract: A ubiquitously mountable image display system includes a shape-reconfigurable display screen component to which is attached a plurality of circuit modules each having at least one light source. The shape-reconfigurable display screen component is formed of a material that accommodates flexing of the display screen component without creating a perceivable aberration in separation distance between two or more picture elements of an image that is rendered upon a viewing plane of the display screen component when light from the plurality of light sources is directed towards the viewing plane.

Abstract: A scan driving device includes: a first node transmitted with a clock signal input to a first clock signal input terminal; a second node transmitted with an input signal according to a clock signal input to a second clock signal input terminal; a first transistor transmitting a power source voltage to an output terminal according to a voltage of the first node; a second transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node; and a dummy transistor formed to transmit the clock signal input to the third clock signal input terminal to the output terminal according to the voltage of the second node. One of the second transistor and the dummy transistor is cut off.