Abstract: A scan driver includes stages including an input block to change a first node voltage to a gate on voltage based on an input signal, a second node control block to control second node voltage based on a first clock signal and the first node voltage, a scan output block to output a second clock signal as a scan signal based on the first node voltage, and to output a first gate off voltage as the scan signal based on the second node voltage, a carry output block to output the second clock signal as a carry signal based on the first node voltage, and to output a second gate off voltage different from the first gate off voltage as the carry signal based on the second node voltage, and a first node control block to transfer the carry signal to the first node based on a next carry signal.

Abstract: A data driving circuit is disclosed that includes an amplifier and an offset control circuit. The amplifier has an offset voltage and is configured to output a data voltage reflecting the offset voltage. The offset control circuit is configured to control, in response to an input control signal, the amplifier to output the data voltage reflecting the offset voltage in a positive direction or a negative direction. The data driving circuit may enhance the display quality of a low grayscale image.

Abstract: A display panel includes a plurality of data lines, a plurality of scan lines, a plurality of share bar groups, and a plurality of pixel units. Each of the share bar groups includes a first share bar and a second share bar. Each of the pixel units includes a first thin-film transistor, a second thin-film transistor, and a share thin-film transistor. The first thin-film transistor and the second thin-film transistor are electrically connected to a same one of the data lines. The first thin-film transistor, the second thin-film transistor, and the share thin-film transistor are electrically connected to a same one of the scan lines. The share thin-film transistor is electrically connected to the second thin-film transistor and one of the share bar groups.

Abstract: The present application discloses a display device and an electronic device. The display device includes a liquid crystal display panel and a driving integrated circuit. An output end of the driving integrated circuit is electrically connected to shared thin-film transistors of subpixels having a same color. By supplying different powers to the shared thin-film transistors of the subpixels having different colors through different output ends of the driving integrated circuit, a power of a load carried by a same power supply loop can be reduced, thereby increasing a uniformity of displayed brightness.

Abstract: A system that can intelligently help a user judge the resolution requirement of the image content. In an example, the display panel can show in different virtual resolutions or the system can automatically judge whether the image content requires high or low resolution using a similarity judgement. The system can then inform the display panel what virtual resolution should be shown or what the optimal resolution is using the similarity judgment and send the image content to the display panel with that resolution.

Abstract: An object of the present invention is to provide a light deflection device having a simple structure suitable for reducing the size and weight where a deflection angle can be increased. The object can be achieved with a light deflection device including: a light deflection element that deflects incident light in one direct to be emitted; a driving unit that drives the light deflection element; and a diffraction element that is disposed on a light emission side of the light deflection element in which a periodic structure pitch gradually changes from a center of deflection from the light deflection element toward an outside.

Abstract: A display apparatus includes a display panel, a driving controller, a gate driver and a data driver. The driving controller is configured to insert a compensation image to first image data including a normal image to generate second image data. The gate driver is configured to shift an output time of a gate signal and to output the gate signal having a shifted output time to the display panel. The data driver is configured to generate a data voltage based on the second image data and to output the data voltage to the display panel. A gate shift amount when the compensation image is applied is substantially the same as a gate shift amount immediately before the compensation image is applied.

Abstract: A display device includes: a display panel which receives a driving voltage and an initialization voltage; a power manager which provides the driving voltage to the display panel; and a voltage generator which receives a feedback driving voltage from the display panel and generates the initialization voltage based on the feedback driving voltage. The feedback driving voltage is a voltage that is fed back to the voltage generator after the driving voltage supplied from the power manager passes through the display panel.

Abstract: A scan driver includes a control unit, a first output unit, a second output unit, and a masking control unit. The control unit outputs a first control signal to a first control node and outputs a second control signal to a second control node. The first output unit is connected to the first control node, a first output terminal, and a first voltage terminal, and operates in response to the first control signal. The second output unit is connected to the second control node, the first output terminal, and a second voltage terminal, and operates in response to the second control signal. The masking control unit is connected between an input terminal, to which a clock signal is input, and the first control node and controls a voltage level of the first control signal in response to a masking enable signal.

Abstract: This display device includes: a grouping processing unit that groups a plurality of drive lines into a plurality of groups each having a set grouped number of adjacent drive lines; a setting processing unit that sets a display magnification of a display screen according to the grouped number; a display processing unit that causes a display panel to display the display screen in the display magnification; and a determination processing unit that determines, in a state where the display screen is displayed on the display panel in the display magnification, a position of a touch operation on the display screen that is displayed in the display magnification based on an output signal that is output from a plurality of sense lines in response to an input signal that is input to each of the grouped number of drive lines.

Abstract: The present disclosure is directed to display circuitry that can be formed on a flexible substrate. The circuitry includes a voltage divider formed from a first and second non-linear resistor device or a first and second transistor coupled in a diode configuration. The circuitry includes a driving thin film transistor coupled to the voltage divider. The non-linear resistor devices may include a lower electrode that is amorphous metal or a crystalline metal. The first and second transistor coupled in a diode configuration may have a lower electrode that is amorphous metal. Upper electrodes may be crystalline metal. The driving thin film transistors may have the lower electrode as amorphous or crystalline metal.

Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.

Abstract: A digital display includes a plurality of pixel rows. For each pixel row, the digital display includes an EM gate driver configured to supply the pixel row with a luminance-controlling signal during each of a plurality of image frames. A luminance controller is configured to instruct the EM gate drivers to supply a pulse-width modulated signal to the plurality of pixel rows. Some pixel rows are supplied with a pulse-width modulated signal starting with an on pulse, and some pixel rows are supplied with a pulse-width modulated signal starting with an off pulse, on the same or different image frames.

Abstract: A display device includes: a display panel including first and second wirings; a control circuit board spaced apart from the display panel and including a power management circuit which provides a driving voltage to the first and second wirings; a first cable coupled to the control circuit board and electrically connecting the power management circuit and the first wiring; a second cable coupled to the control circuit board and electrically connecting the power management circuit and the second wiring; an abnormal coupling detector connected between the first and second wirings and generating first and second protection signals based on a difference between a first voltage of the first wiring and a second voltage of the second wiring; and a voltage supply controller counting the first and second protection signals, and providing a shutdown signal to the power management circuit such that the power management circuit stops providing the driving voltage.

Abstract: Apparatuses, methods, and systems for power supply stacking of an array of devices are disclosed. For an embodiment, each device is specified by a location (i,j), each device includes a Vdd terminal, and a Vss terminal. For an embodiment, the Vss terminal of each of the devices in the first majority of the devices at location (i,j), is connected to the Vdd terminal of the device at location (i?1,j), wherein the potential of the Vss terminal of the each device at any location (1,j+1) is higher than the potential of the Vss terminal for another device at location (1,j) by a voltage Xj, for j=1:M?1, wherein a sum of all Xj voltages for j=1:(M?1) is greater than 0.25*VDD.

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and a driving controller. The display panel including a gate line and a data line displays an image based on input image data. The gate driver outputs a gate signal to the gate line. The data driver outputs a data voltage to the data line. The driving controller includes an area divider dividing the input image data into first and second area data, a first variable frequency driver determining a first driving frequency of the first area data based on a flicker value according to a grayscale value and generating a first data signal of the first driving frequency and a second variable frequency driver determining a second driving frequency of the second area data based on a flicker value according to a grayscale value and generating a second data signal of the second driving frequency.

Abstract: A display device includes: a plurality of first pixels connected to a first scan line; a plurality of second pixels connected to a second scan line; and a plurality of third pixels connected to a third scan line, wherein, from a position in a first frame period, an image portion displayed by the first pixels, the second pixels, and the third pixels, which are connected to first data lines, is shifted in a first direction, in a second frame period next to the first frame period, wherein an image portion displayed by the first pixels and the second pixels, which are connected to second data lines, is shifted in the first direction, in the second frame period, wherein an image portion displayed by the third pixels connected to the second data lines is shifted in a direction different from the first direction, in the second frame period.

Abstract: An image display method includes generating luminance data, applying a special filter to the luminance data, generating luminance setting data, generating gradation setting data, and controlling a backlight based on the luminance setting data and a liquid crystal panel based on the gradation setting data. The luminance data indicates a luminance value for each of light-emitting regions of the backlight based on a maximum gradation value among gradation values of image pixels of an input image that correspond to the light-emitting region. The special filter is applied such that, with respect to each light-emitting region, a difference of the luminance value thereof from the luminance values of neighboring light-emitting regions decreases, and the luminance setting data is generated therefrom. The gradation setting data sets a gradation value of each pixel of the liquid crystal panel, and is generated based on the input image and the luminance setting data.

Abstract: The present disclosure provides a device and a method for detecting a screen freeze error of a display of a vehicle. The method comprises monitoring a drive pattern of at least one pixel in a porch area during a time period corresponding to a plurality of image frames, wherein the porch area including at least one of a front porch area and a back porch area of a display panel driven according to the plurality of image frames; and determining occurrence of a screen freeze error by comparing the drive pattern of the at least one pixel with a preset drive pattern.

Abstract: A display device that includes a plurality of scanning lines, a plurality of data lines, and a pixel unit in which a pixel is specified by the scanning line and the data line, in which image data of one line is simultaneously displayed for a plurality of adjacent scanning lines, image data to be simultaneously displayed is made different between an N frame and an (N+1) frame that are temporally consecutive, and the image data is shifted by one line, and the image data of a last scanning line of at least one of the N frame or the (N+1) frame is hidden.

Abstract: The present application discloses a cross voltage compensation method for a display panel, a display panel and a display device. The cross voltage compensation method includes steps of transmitting a preset voltage signal to in-plane data lines after scan of scanning lines of a last row of a current frame is completed and before scanning lines of a first row of a next frame are started, keeping all the scanning lines at a close state while transmitting the preset voltage signal to in-plane data lines, and keeping all the scanning lines at a close state after scan of scanning lines of a last row of a current frame is completed and before scanning lines of a first row of a next frame are started, that is, V-blank time.

Abstract: A pair of eyeglasses may include one or more adjustable lenses that are each configured to align with a respective one of a user's eyes. The adjustable lenses may each include electrically modulated optical material such as one or more liquid crystal cells, each having a phase profile that is adjusted using patterned electrodes. Analog voltages may be provided to the patterned electrodes through variable-resistance conductive paths that are each coupled to a subset of the patterned electrodes. Digital voltage selection circuitry may be used to select which analog voltage to apply to each of the variable-resistance conductive paths from a predetermined set of analog voltages that are generated off of the lens. The digital voltage selection circuitry may include an array of multiplexers, each of which selects a desired voltage based on control signals received from digital control circuitry such a shift register and/or a decoder.

Abstract: Disclosed are a display panel, a driving method therefor, a display device. The display panel includes pixel circuits, data lines, write control lines, compensation control lines, a first driving circuit connected to compensation control lines, a second driving circuit connected to write control lines. Each column of pixel circuits corresponds to one data line, each row of pixel circuits corresponds to one write control line, one compensation control line. The first driving circuit outputs compensation control signals to pixel circuits by compensation control lines, second driving circuit outputs write control signals to pixel circuits by write control lines. The pulse width of compensation control signals is N times pulse width of write control signals, write control signals on two adjacent write control lines do not overlap, an overlap time of compensation control signals on two adjacent compensation control lines is (N?1)/N of pulse width of compensation control signals.

Abstract: In an electro-optical device, pixel circuits are provided corresponding to an intersection between a scanning line in an i-th row and a data line in a k-th column in a display region, and an intersection between a scanning line and data line. The pixel circuit is brought into an optical state in accordance with a voltage of a data line when a scanning line is selected. In an odd frame period, in the i-th row selection period and the (i+1)-th row, a data signal of a voltage corresponding to the i-th row and k-th column of data of the top image is output, and in an even frame period, in the i-th row selection period and the (i+1)-th row, a data signal of a voltage corresponding to the (i+1)-th row and the k-th column of data of the bottom image is output.

Abstract: A direct current-to-direct current (“DC-DC”) converter includes: a first converter which outputs a first power voltage in a normal mode or a power saving mode based on a inductor current generated therein, where the first converter operates in a first driving manner in the normal mode, and operates in a second driving manner in the power saving mode; a second converter which outputs a second power voltage based on a inductor current generated therein, where the second converter operates in a third driving manner in the power saving mode, and a magnitude of the second power voltage in the power saving to mode is different from that in the normal mode; and a mode selector which supplies a mode control signal to the first and second converters, where the first and second converters are driven in the normal mode or the power saving mode based on the mode control signal.

Abstract: A display device includes a display control circuit. The display control circuit includes: an arithmetic unit obtaining a video signal, and calculating, in accordance with the video signal, an average voltage value of a source signal in a display period; and a controller and a signal synthesizer supplying, in the display period, a source signal, based on the video signal, from a source drive circuit to a plurality of source lines, and supplying, in a suspension period, a source signal, having the average voltage value, from a source drive circuit to each of the source lines.

Abstract: The display apparatus includes a data generation circuit, a source driver circuit, and a pixel. The source driver circuit is electrically connected to the pixel through first and second wirings. The pixel includes a display device that is a liquid crystal device, a potential of one electrode of the display device can be a potential of the first wiring, and a potential of the other electrode of the display device can be a potential of the second wiring. The image data generation circuit has a function of generating digital image data including first and second data. One of the first and second wirings is made to have a potential corresponding to first data, and the other of the first and second wirings is made to have a potential corresponding to the second data. The potential of the first wiring and the potential of the second wiring are interchanged.

Abstract: A light emitting display device includes a display panel configured to display an image, a data driver configured to supply a data voltage to data lines of the display panel, and a sensing circuit configured to obtain a sensing voltage through sensing lines of the display panel after reflecting a negative impedance value canceling impedance differences of the sensing lines.

Abstract: An embodiment of the present disclosure is directed to a method of determining a charging time. The method includes: obtaining frame images corresponding to at least three grayscales; determining a luminance and a corresponding charging time of at least one test position in each of the frame images; obtaining a charging time luminance variance curve corresponding to the test position according to the luminance of the at least one test position in each of the frame images and the corresponding charging time; and determining the charging time corresponding to a highest luminance in the charging time brightness change curve as an optimal charging time.

Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.

Abstract: A signal obtained through sampling a gate start pulse signal GSP by using one of a plurality of gate clock signals is supplied as a shift pulse for a forward shift action (a forward shift start pulse signal) to the first stage of a plurality of stages constituting a bidirectional shift register, and a signal obtained through sampling the gate start pulse signal GSP by using another one of the plurality of gate clock signals is supplied as a shift pulse for a backward shift action (a backward shift start pulse signal) to the last stage of the plurality of stages constituting the bidirectional shift register.

Abstract: An electrical driver can be used to provide electrical drive signals to a first and second electrically controllable optical privacy glazing structures. A first electrical drive signal can be applied to the first privacy glazing structure and a second electrical drive signal can be applied to the second privacy glazing structure. Applying the first and second electrical drive signal can comprise temporally staggering delivery of the first and second electrical drive signals such that a peak power draw and/or a peak current draw from the first privacy glazing structure is temporally offset from a peak power draw and/or a peak current draw from the second privacy glazing structure. Staggering can include delaying the application of one electrical drive signal relative to the other, phase shifting one electrical drive signal relative to the other, or a combination thereof.

Abstract: The disclosure provides a display device including a first display panel and a second display panel. The second display panel is disposed above the first display panel. The first display panel includes a first pixel unit. The first pixel unit includes a first sub-pixel and a second sub-pixel, where the first sub-pixel and the second sub-pixel are connected in parallel. The display device of the disclosure has better yield.

Abstract: Apparatus comprises an image processor configured to provide output video images to a head mountable display, HMD, having one or more display elements to display video images to a wearer of the HMD, for display by the one or more display elements in response to input video images, in which each output video image corresponds to a respective input video image; in which: the image processor comprises a detector configured to detect whether an input image brightness at image locations in the input video images exceeds a threshold image brightness; and the image processor is configured to vary a relationship between the display properties at a given image location in a given output video image and the input image display properties at the given image location in the corresponding input video image in response to a detection that image brightness at the given image location in one or more input video images preceding that corresponding input video image exceeded the threshold image brightness.

Abstract: This application discloses a display device driving method and a display device. The driving method includes steps of: synchronously starting a backlight circuit, a timing control circuit and a power circuit; outputting a first signal after the timing control circuit is initialized; outputting a second signal after the power circuit is started; and controlling a gate driver to output a drive signal according to the first signal and the second signal.

Abstract: The present disclosure provides a display panel, a display device and a driving method. The display panel includes a display substrate and a driving chip. The display panel is configured to write a data signal to a corresponding pixel circuit at a pre-writing phase and a target data writing phase. The driving chip includes a voltage compensation module configured to obtain a compensation voltage value for the pixel circuits in each row in accordance with the quantity of pre-writing phases. Each pixel circuit is configured to write a pre-writing voltage stored in a parasitic capacitor to a gate electrode of a driving transistor in response to a pre-scanning signal at the pre-writing phase, and write a target writing voltage stored in the parasitic capacitor to the gate electrode of the driving transistor in response to a target scanning signal at the target data writing phase.

Abstract: A system, circuit, and method for implementing a low power common electrode voltage for a display (e.g., LCoS display) having transistors with low to moderate breakdown voltages may include a first and a second low voltage amplifier, wherein the first amplifier generates a pixel voltage and the second amplifier generates a predetermined voltage. The circuit may include a common electrode circuit coupled to the first and second amplifier to generate a common electrode voltage. Particularly, the circuit may include a control circuit coupled to the common electrode circuit, wherein, during a first phase, the control circuit selectively controls the common electrode circuit to generate a low common electrode voltage based upon a negative value of the predetermined voltage. Further, during a second phase, the control circuit selectively controls the common electrode circuit to generate a high common electrode voltage based upon the sum of the predetermined voltage and the pixel voltage.

Abstract: A scan-type display apparatus includes an LED array, a display module, a control module and a driver module. The LED array has a common anode configuration. The control module generates a synchronization control (SC) signal. Based on the SC signal, the driver module outputs an input voltage to scan lines of the LED array sequentially without overlapping in time so as to drive LEDs of the LED array to emit light in a line scan manner, and generates an image refresh signal that is related to the output of the input voltage to one of the scan lines which corresponds to a last line of the line scan in each line scan cycle and that is further related to refreshing of images on a display constituted by the LED array and the display module.

Abstract: The display control circuit includes a drive signal generation circuit that generates a gate drive signal, a scanning line drive circuit that supplies the gate drive signal to the scanning line, and a first wire through which the gate drive signal from the drive signal generation circuit is supplied to the scanning line drive circuit. The drive signal generation circuit includes a first potential supply circuit that supplies, to the first wire, a first potential equal to or lower than an off-potential of the pixel transistor, a second potential supply circuit that supplies, to the first wire, a second potential lower than the first potential, a third potential supply circuit that supplies, to the first wire, a third potential higher than the first potential, and a fourth potential supply circuit that supplies, to the first wire, a fourth potential equal to or higher than an on-potential of the pixel transistor.

Abstract: A clock data recovery circuit includes the following elements: a phase detector for outputting a phase adjustment signal by comparing a clock signal of a first node and an input signal; a charge pump for adjusting a charge amount of a second node according to the phase adjustment signal; a first switch including one end coupled to the second node and including another end coupled to a third node; a second switch including one end which receives a bias voltage and including another end coupled to the third node; a capacitor including a first electrode coupled to the third node; third switches; and voltage control oscillators including control terminals coupled to the third node and including output terminals coupled to the first node through the third switches.

Abstract: The present invention provides a display panel and a control method thereof, and a display device. The display panel includes a display unit and a backlight module. The display unit includes a main display region and a function additional region. The backlight module includes a first light source block providing a light source for the main display region and a second light source block providing a light source for the function additional region. The first light source block and the second light source block are independently driven and controlled.

Abstract: The present disclosure provides a method, a device, a system, and a display device for adjusting a luminance viewing angle of a liquid crystal display panel. The method obtains an actual value of a luminance viewing angle corresponding to a current image, adjusts a positive and negative polarity driving voltage when the actual value is less than a threshold value to obtain a relational expression between the positive and negative polarity driving voltage and the luminance viewing angle, processes a difference value between the actual value and the threshold value to obtain a target driving voltage value, and adjusts the positive and negative polarity driving voltage according to the target driving voltage value, thereby realizing adjustment of the luminance viewing angle.

Abstract: The present disclosure provides a pixel structure, a method of driving the same and a display device. The pixel structure includes gate lines, data lines, and a plurality of subpixels arranged in an array form. Subpixels in each row correspond to two gate lines. Each data line corresponds to the subpixels in two adjacent columns, and each data line is arranged between the two adjacent columns of subpixels. Among the subpixels in each row, three adjacent subpixels are in different colors and forms a complete pixel unit. Among the subpixels in each column, three adjacent subpixels are in different colors and forms the complete pixel unit. Among the subpixels in two adjacent columns, the subpixels in two adjacent rows form two complete pixel units each including three subpixels, and two of the three subpixels are shared by the two pixel unit.

Abstract: A display device may include a timing controller, a level shifter, a gate driver, and a display panel. The timing controller may generate a first on-clock signal, a first off-clock signal, and a first output control signal. The level shifter may generate a first-type gate clock signal. A rising edge of the first-type gate clock signal and a falling edge of the first-type gate clock signal may be respectively synchronized with a rising edge of the first on-clock signal and a falling edge of the first off-clock signal. The gate driver may output first-type gate signals based on the first-type gate clock signal. The display panel may include pixels. The pixels may emit lights in response to the first-type gate signals. The level shifter may partially block a pulse of the first-type gate clock signal based on the first output control signal to generate sub-pulses.

Abstract: A driving controller of a display device includes a timer which counts an operation time and outputs a count signal, a memory which stores compensation data, a control signal generation part which receives the compensation data from the memory in response to the count signal and outputs a compensation data signal corresponding to the compensation data, and an image processor which converts an image signal into a data signal and outputs the data signal, where the data signal is obtained by combining the image signal and the compensation data signal. The compensation data includes first compensation data corresponding to a first operation time and second compensation data corresponding to a second operation time which is different from the first operation time.

Abstract: Disclosed is an organic light-emitting diode display device including: a display panel in which pixels adjacent to each other are paired and arranged to share a single data line in pixel areas defined by gate and data lines; a gate driver configured to drive the plurality of gate lines; a data driver configured to output a data voltage to data voltage output channels on the basis of an arrangement of pixels; a data switcher configured to alternately select a data line and to electrically connect the data line with the data voltage output channel of the data driver; and a timing controller configured to control the data switcher and the gate and data drivers, thereby making it possible to drive a data driving circuit at high driving frequency and to reduce a deterioration of image quality and image distortion even in a simplified structure of the data driving circuit.

Abstract: A scan driver includes: a plurality of first stages configured to sequentially output a plurality of intermediate scan signals based on a scan start signal; a plurality of masking transistors respectively connected to a plurality of output terminals of the plurality of first stages, and configured to selectively transfer the plurality of intermediate scan signals in response to a masking signal, respectively; and a plurality of second stages including a plurality of input terminals respectively connected to the plurality of masking transistors, and configured to selectively output a plurality of scan signals based on the plurality of intermediate scan signals selectively transferred by the plurality of masking transistors.

Abstract: An apparatus for driving an electro-optic display may comprise a first switch designed to supply a voltage to the electro-optic display during a first driving phase, a second switch designed to control the voltage during a second driving phase and a resistor coupled to the first and second switches for controlling the rate of decay of the voltage during the second driving phase.

Abstract: A display device includes a display panel, a data driving circuit which drives a plurality of data lines, a scan driving circuit which drives a plurality of scan lines, and a driving controller which controls the data driving circuit and the scan driving circuit such that the display panel is divided into a first display region and a second display region during a multi-frequency mode and the first display region and the second display region are respectively operated at different frequencies, where the driving controller changes an operation mode to a normal mode when a still image and a moving image are simultaneously displayed in the first display region during the multi-frequency mode and the duration of the still image reaches a predetermined time.

Abstract: A liquid crystal display device includes: a first electrode layer provided on a display surface side to prevent noise from being emitted from a display element to the outside; a second electrode layer provided outside the first electrode layer to perform position detection; a hover signal generation unit that generates a detection signal to be input to the second electrode layer and the first electrode layer for detection of an indicator approaching the display surface; a common electrode that applies a common voltage to derive the display element; a cancellation signal generation unit that generates a cancellation signal which cancels a signal component leaking from the first electrode layer to the common electrode; and a voltage addition unit that superimposes a cancellation signal on the common voltage.