Abstract: This application is directed to driving methods for electrophoretic displays. The driving methods comprise grey level waveforms which greatly enhance the pictorial quality of images displayed. The driving method comprises: (a) applying waveform to drive each pixel to the full first color then to a color state of a desired level; or (b) applying waveform to drive each pixel to the full second color then to a color state of a desired level.

Abstract: A liquid crystal display device of the present invention has a vertical scanning period in which the polarity of a display signal is positive and a vertical scanning period in which the polarity of a display signal is negative.

Abstract: In a semiconductor device in which a reference voltage is generated by a reference voltage generation circuit, and the same reference voltage generated is used in a plurality of circuit units for the purpose of generating a voltage, a sampling and holding circuit of the reference voltage is provided in order to provide a standard voltage to the circuit units. A sampling and holding control circuit that controls the sampling and holding circuit instructs the sampling and holding circuit to perform a sampling operation of the reference voltage in case that the semiconductor device operates in a state where power supply noise of the reference voltage generation circuit falls within a predetermined range, and instructs the sampling and holding circuit to perform a holding operation of the reference voltage in case that the semiconductor device operates in a state where the power supply noise exceeds the predetermined range.

Abstract: The present disclosure provides a power saving method for a LCD comprising a plurality of scan lines. The power saving method comprises segregating the scan lines into a plurality of scan line groups; and individually performing a waveform-shaping function on each of the scan-line groups at different time points.

Abstract: The invention provides an image display device capable of reducing the transmission delay of a scanning signal. A plurality of scanning signal lines are wired in one pixel circuit row. Pixel circuits of the pixel circuit row are connected to any of the plurality of scanning signal lines.

Abstract: A look-up table unit converts input video signal data of N bits into (M+F+D) bit data by performing inverse gamma correction and linear interpolation. An error diffusion unit converts the (M+F+D) bit data into (M+F) bit data by error diffusion processing. A frame rate control unit converts the (M+F) bit data into M bit data by frame rate control. A sub-frame data conversion unit, by using a gradation driving table and the M bit data, generates sub-frame data in which all sub-frames include a step-bit pulse respectively, and in which the number of sub-frames to be in a drive state every time the drive gradation increases by one, is increased one by one.

Abstract: A liquid crystal display having adaptive pulse shaping control mechanism includes a first gate driver for providing a first gate signal based on a first modulation voltage, a second gate driver for providing a second gate signal based on a second modulation voltage, a first pixel array unit for illustrating image according to the first gate signal, a second pixel array unit for illustrating image according to the second gate signal, a timing controller for performing a pulse compare operation over the first and second gate signals so as to generate a first shaping control signal and a second shaping control signal, a first gate pulse modulation unit for providing the first modulation voltage according to the first shaping control signal, and a second gate pulse modulation unit for providing the second modulation voltage according to the second shaping control signal.

Abstract: A liquid crystal display (LCD) drive circuit and a driving method thereof are disclosed. The driving method comprises: a. dividing scan lines into a plurality of groups each comprising a plurality of scan lines; b. during displaying of a current image frame, using a scan driver to scan each group of scan lines sequentially, c. during displaying of a next image frame, using the scan driver to scan each group of scan lines sequentially; and d. if each scan line in the group has been scanned once simultaneously with an adjacent scan line within a predetermined time interval, then the step b is executed; otherwise, the step c is executed. The LCD drive circuit and the driving method thereof according to the present disclosure can increase an average charging time of pixel units without compromising the accuracy of image frames.

Abstract: A driving circuit includes a power supply, a plurality of conductive paths and a plurality of driving controller. The power supply is configured for providing a predetermined voltage. The conductive paths are connected to the power supply to receive the predetermined voltage. The driving controllers are connected to the conductive paths correspondingly. A first driving controller of the driving controllers has a first internal circuit configured for employing an internal voltage to perform functions provided by the first driving controller, and a resistance adjustment unit. The resistance adjustment unit is connected between a special conductive path and the first internal circuit. The second driving controller has a second internal circuit configured for employing a second internal voltage to perform functions provided by the second driving controller. A resistance value of the resistance adjustment unit is adjustable to make the first internal voltage same to the second internal voltage.

Abstract: To suppress deterioration of quality of a still image displayed with a reduced refresh rate. A liquid crystal display device includes a display portion that is controlled by a driver circuit and includes normally white mode (or normally black mode) liquid crystals, and a timing controller for controlling the driver circuit. The timing controller is supplied with an image signal for displaying a moving image and an image signal for displaying a still image. The absolute value of a voltage applied to the liquid crystals in order to express black (or white) in an image corresponding to the image signal for displaying the still image is larger than that of a voltage applied to the liquid crystals in order to express black (or white) in an image corresponding to the image signal for displaying the moving image.

Abstract: A ubiquitously mountable image display system includes a shape-reconfigurable display screen component to which is attached a plurality of circuit modules each having at least one light source. The shape-reconfigurable display screen component is formed of a material that accommodates flexing of the display screen component without creating a perceivable aberration in separation distance between two or more picture elements of an image that is rendered upon a viewing plane of the display screen component when light from the plurality of light sources is directed towards the viewing plane.

Abstract: It is an object of the present invention to enhance detection accuracy during a touch operation in a capacitance coupling type input device. The input device includes a plurality of driving electrodes and a plurality of detection electrodes crossing each other, and capacitive elements formed in respective crossed portions between the driving electrodes and the detection electrodes. During a touch detection period, a driving signal is applied to the driving electrodes on a line block basis of scanning signal lines, and touch is detected based on a detection signal output from each of the detection electrodes, and the touch detection period is provided in a display update period in a horizontal scanning period of a display apparatus. Further, a driving signal to be applied to the driving electrodes is applied to a selected line block of the display apparatus to which the scanning signal is not being applied.

Abstract: A display unit includes: a display section; a barrier section including a plurality of liquid crystal barriers switching an open state and a closed state; and a barrier driving section driving the barrier section with one or a plurality of barrier drive signals. Each of the barrier drive signals is a signal including a first waveform portion being configured of a series of waveforms allowing the liquid crystal barriers to be held in an open state over a plurality of frames, or a second waveform portion being configured of a series of waveforms to allowing the liquid crystal barriers to be switched between an open state and a closed state, and a third waveform portion being located just before the first or second waveform portion and having an average pulse height value smaller than a maximum value of a pulse height value of the first or second waveform portion.

Abstract: An LCD device is discussed in which a level shifter generates two switching signals, and transmits the generated signals to a gate driver of a liquid crystal display panel by the use of one voltage signal transmitted from a timing controller. The LCD device according to an embodiment includes a liquid crystal display panel in which a gate driver for alternately driving two transistors is formed; a data driver which drives data lines of the liquid crystal display panel; a timing controller which generates one voltage signal for switching the two transistors, and outputs the one voltage signal; and a level shifter which generates two of first and second switching signals to switch the two transistors by using the one voltage signal, and outputs the generated switching signals to the gate driver.

Abstract: The present invention provides a LCD device including: a timing control unit; an oscillator which is included in the timing control unit and generates a clock frequency; a frequency divider which is included in the timing control unit and reduces the clock frequency supplied from the oscillator by dividing the clock frequency by at least 2; and a mode selection part which is included in the timing control unit and changes at least one driving mode of internal logic circuits by using the divided clock frequency supplied from the frequency divider.

Abstract: A method of processing three-dimensional (3D) stereoscopic image data is provided that includes comparing the polarity of image data of a present frame with the polarity of image data of a previous frame. The image data of the present frame are compensated according to the result of the comparison. The image data of the present frame is compensated to generate first compensation data, when the polarity of the image data of the present frame is opposite to the polarity of the image data of the previous frame, with respect a reference voltage.

Abstract: A device for reducing flickers of a liquid crystal display panel is disclosed. The liquid crystal display panel is divided into a plurality of blocks. The device includes a memory, a common voltage generation unit, and a controller. The memory is used for storing a plurality of initial codes. Each initial code corresponds to a block of the plurality of blocks and a common voltage. The controller is used for generating a control signal to the common voltage generation unit when the controller starts to count scan start signals corresponding to the block. The common voltage generation unit is used for reading the initial code from the memory according to the control signal, and generating the common voltage to the block according to the initial code.

Abstract: A display apparatus includes a display panel including a display area in which gate lines and data lines are disposed to display an image and a peripheral area which is disposed around the display area and includes fan-out lines having different lengths, and a driving part configured to output driving signals having different levels to channels respectively connected to the fan-out lines according to the different lengths of the fan-out lines.

Abstract: A display panel and a display device are provided. The display panel includes a substrate, multiple data line groups which are arranged on the substrate sequentially and adjacently, and multiple gate line groups which are arranged on the substrate sequentially and adjacently. The display panel further includes multiple pixel electrode array units which are arranged in an array on the substrate. The pixel electrodes in the pixel electrode array unit are electrically connected with the data lines and the gate lines via switch elements. Data driving signals received by any two adjacent pixel electrodes in a same column have opposite polarities. The pixel electrode array unit includes a first pixel electrode, a second pixel electrode, a third pixel electrode, and a fourth pixel electrode. Data driving signals received by any two adjacent pixel electrodes of a same type in the same row have opposite polarities.

Abstract: The present invention relates to a method for driving a ferroelectric liquid crystal panel. A liquid crystal display device according to the present invention includes a ferroelectric liquid crystal panel having a ferroelectric liquid crystal provided between a pair of substrates, a plurality of scanning electrodes and a plurality of drive electrodes, and a plurality of pixels constituted by intersections between the plurality of scanning electrodes and the plurality of signal electrodes, and a controller for applying driving pulses to the plurality of scanning electrodes and the plurality of signal electrodes. The controller applies to the plurality of pixels first reset pulses, first selection pulses for switching the plurality of pixels, second reset pulses having a voltage or pulse width different from that of the first reset pulses, and second selection pulses having a voltage or pulse width different from that of the first selection pulses and for switching the plurality of pixels.

Abstract: Embodiments of the invention relate to a stereoscopic image display and a method for driving the same. Stereoscopic image display includes a data display unit including a first scan transistor, an active black stripe unit including a second transistor and a third transistor, and a shift register sequentially supplying the gate pulse to each of (2n?1)th gate lines and (2n)th gate lines, where n is a natural number. The first scan transistor supplies a data voltage to a pixel electrode in response to a gate pulse of a (2n?1)th gate line, the second transistor supplies the data voltage to the pixel electrode in response to the gate pulse of the (2n?1)th gate line, and the third transistor supplies a low logic level voltage or a common voltage to the pixel electrode in response to a gate pulse of a (2n)th gate line.

Abstract: A liquid crystal display having common voltage compensation mechanism includes a liquid-crystal capacitor common electrode for receiving a liquid-crystal capacitor common voltage, a storage capacitor common electrode for receiving a storage capacitor common voltage, a common voltage generator for providing the liquid-crystal capacitor common voltage according to a preliminary common voltage, a common voltage compensation circuit electrically connected to the liquid-crystal capacitor common electrode and the storage capacitor common electrode, and a timing controller electrically connected to the common voltage compensation circuit. The common voltage compensation circuit is utilized for generating the storage capacitor common voltage through performing a ripple inverting operation according to the liquid-crystal capacitor common voltage, the preliminary common voltage and a compensation control signal.

Abstract: A liquid crystal display having adaptive pulse shaping control mechanism includes a first gate driver for providing a first gate signal based on a first modulation voltage, a second gate driver for providing a second gate signal based on a second modulation voltage, a first pixel array unit for illustrating image according to the first gate signal, a second pixel array unit for illustrating image according to the second gate signal, a timing controller for performing a pulse compare operation over the first and second gate signals so as to generate a first shaping control signal and a second shaping control signal, a first gate pulse modulation unit for providing the first modulation voltage according to the first shaping control signal, and a second gate pulse modulation unit for providing the second modulation voltage according to the second shaping control signal.

Abstract: A display driving circuit is configured to select one of application of a pair of pixel driving signals to a pair of output terminals and charge sharing between the pair of output terminals by using charges discharged from a display panel.

Abstract: Provided is a display device capable of switching a refresh rate while suppressing deterioration in display quality and degradation in liquid crystal. In the case of switching the refresh rate from 60 Hz to 7.5 Hz, a transition period for gradually changing the refresh rate from 60 Hz to 7.5 Hz is provided between a 60-Hz period and a 7.5-Hz period. This transition period is configured by sequentially arraying a 30-Hz period, a 20-Hz period, a 15-Hz period, a 12-Hz period and a 10-Hz period from a start point of the transition period. Hence the refresh rate gradually changes from 60 Hz to 7.5 Hz sequentially through 30 Hz, 20 Hz, 15 Hz, 12 Hz and 10 Hz. The number of positive-polarity frames and the number of negative-polarity frames are respectively 20 in the whole of the transition period, and are equal to each other.

Abstract: A method of driving a bi-stable chiral splay nematic mode liquid crystal display device including first and second substrates, a liquid crystal layer between the first and second substrates, first and second reset electrodes on one of inner surfaces of the first and second substrates, a pixel electrode on the inner surface of the first substrate and a common electrode on the inner surface of the second substrate includes: applying a data voltage and a common voltage to the pixel electrode and the common electrode, respectively, such that a vertical electric field is generated and the liquid crystal layer transitions from a splay state to a ?-twist state during a writing period; and floating the pixel electrode and the common electrode such that the liquid crystal layer keeps the ?-twist state and displays a present image during a memory period.

Abstract: A shift register for an LCD display includes N shift register units. Each shift register unit outputs a shift signal. An Nth shift register unit includes a waveform-shaping unit electrically coupled to an shift signal output terminal of the Nth register to perform a waveform-shaping operation on the Nth shift signal according to the (N+1)th shift signal output by an (N+1)th shift register, to reduce the feed-through effect which causes display flicker.

Abstract: In the liquid crystal display device, image signals are concurrently supplied to pixels provided in a plurality of rows among pixels arranged in matrix in a pixel portion where input of image signals is controlled by transistors including polycrystalline semiconductors or single crystal semiconductors in channel formation regions. Thus, the image quality of the liquid crystal display device can be improved.

Abstract: Provided is a gate signal line drive circuit including a shift register basic circuit for applying a high voltage for a signal high period and a low voltage for a signal low period to a gate signal line at the time of a screen display. The shift register basic circuit includes a gate line high voltage applying circuit applying a high voltage for the signal high period to the gate signal line, and a gate line low voltage applying circuit applying a low voltage to the gate signal line, wherein in the shift register basic circuit, the off-voltage is applied to the switch of the gate line low voltage applying circuit for a predetermined period at the time of a screen non-display.

Abstract: In an active matrix display apparatus including: pixels provided in a matrix pattern, the pixels each including a memory circuit which retains data while refreshing the data, a data signal electric potential which is supplied from a source line in a period t1 and written to a node which is connected to a liquid capacitor is higher than a data electric potential of the node, the data electric potential being obtained in a period t14 after a refresh operation of the memory circuit.

Abstract: A liquid crystal optical element having a crystal liquid optical element adapted to positively function as a diffraction element and an optical pickup apparatus including the liquid crystal optical element are disclosed. A transparent electrode having a diffraction pattern is arranged on one of a pair of transparent substrates. A liquid crystal panel has a transparent opposed electrode arranged on the other one of the pair of the transparent substrates. A driving unit generates a phase difference distribution in the liquid crystal layer by generating a potential difference between the transparent electrode and the transparent opposed electrode and causes the liquid crystal panel to function as a diffraction element for diffracting the incoming light beam transmitted therethrough. The diffraction pattern or the transparent opposed electrode is divided into a plurality of regions. The driving unit adjusts the potential difference for each of the regions.

Abstract: A display panel and its gate driving circuit are provided. The gate driving circuit includes a plurality of shift registers. Each of the shift registers includes a first scan signal generator for generating a first scan signal, a second scan signal generator for generating a second scan signal, a first control unit for generating a first control signal, and a second control unit for generating a second control signal. Here, the first control signal and the second control signal are shared by the first scan signal generator and the second scan signal generator. Based on the above, the abatement of signal intensity of the first scan signal and the second scan signal caused by circuit sharing can be precluded, and a chip area occupied by each of the shift registers can be reduced.

Abstract: In a method of driving a display panel, a voltage of a first polarity with respect to a reference voltage is outputted to an n-th data line and an (n+1)-th data line (‘n’ is a natural number), respectively, and a voltage of a second polarity with respect to the reference voltage is outputted to an (n+2)-th data line and an (n+3)-th data line, respectively, during an N-th frame (‘N’ is a natural number). Then, a voltage of the first polarity is outputted to the n-th data line, a voltage of the second polarity is outputted to the (n+1)-th data line and the (n+2)-th data line, respectively, and a voltage of the first polarity is outputted to the (n+3)-th data line, during an (N+1)-th frame.

Abstract: A field-sequential display is operated in one of a color mode or a grayscale mode. In the color mode, a video source provides image content in the form of multiple-color image data having a frame rate of X Hz and a display controller uses the multiple-color image data to drive the field-sequential display so as provide multiple-color image content at the field-sequential display. In the grayscale mode, the display controller generates grayscale image data from the multiple-color image data and the display controller then drives the field-sequential display with the grayscale image data at a lower frame rate of Y Hz. While in the grayscale mode, the display controller can take advantage of the enhanced contrast provided by the grayscale image content to reduce or disable backlighting at the field-sequential display. The reduced timing requirements afforded by the lower frame rate, as well as the reduction or elimination of backlighting, can reduce power consumption compared to the color mode.

Abstract: A display apparatus includes a display device and a display driving system having a data input connected to a distributor for providing signals for driving image regions. Each image region has an active display state in which it is driven with an active voltage signal including a first signal level which sets the image region to the active display state and a second signal level applied for a shorter duration than the first signal level. Operation includes (1) applying the first signal level to an image region in response to receiving data on the data input indicating that the image region is to be set to the active display state, (2) applying the second signal level to the image region after said first signal level has been applied, and (3) reapplying the first signal level before receipt of further data for said image region on the data input.

Abstract: A display apparatus disclosed herein includes a plurality of pixel circuits, each having a plurality of switches configured to receive a driving signal of a predetermined period and to be controlled for opening and closing operation by the driving signal, a drive circuit configured to control the open/closed state of the switches, being operable to scan the pixel circuits and open and close the switches in periods independent of each other.

Abstract: A liquid crystal display having common voltage compensation mechanism includes a liquid-crystal capacitor common electrode for receiving a liquid-crystal capacitor common voltage, a storage capacitor common electrode for receiving a storage capacitor common voltage, a common voltage generator for providing the liquid-crystal capacitor common voltage according to a preliminary common voltage, a common voltage compensation circuit electrically connected to the liquid-crystal capacitor common electrode and the storage capacitor common electrode, and a timing controller electrically connected to the common voltage compensation circuit. The common voltage compensation circuit is utilized for generating the storage capacitor common voltage through performing a ripple inverting operation according to the liquid-crystal capacitor common voltage, the preliminary common voltage and a compensation control signal.

Abstract: At least one embodiment of a liquid crystal display device including: scanning signal lines provided in a display area; and a dummy scanning signal line provided in a non-display area, the scanning signal lines being divided into groups each of which includes a plurality of scanning signal lines, the groups being sequentially selected, signal electric potentials of an identical polarity being sequentially supplied to a data signal line while scanning signal lines belonging to a selected group are sequentially scanned horizontally, the polarity of the signal electric potentials being inverted when the selected group is changed from a preceding group to a succeeding group which is selected immediately after the preceding group, a dummy scanning period being inserted between a horizontal scanning period corresponding to last horizontal scanning in the preceding group and a horizontal scanning period corresponding to first horizontal scanning in the succeeding group, and the dummy scanning signal line being subje

Abstract: In at least one embodiment a ripple, generated in an electric potential of data signal lines even in long-term reversal driving, is reduced and display quality is improved. In at least one example embodiment, the liquid crystal display apparatus of the present invention includes scanning signal lines and data signal lines, in which one scanning pulse is outputted to select one scanning signal line, each of the data signal lines receives data signals whose polarities are reversed per one vertical scanning period while in one horizontal scanning period, one of two data signal lines receives a data signal having a polarity and the other of the two data signal lines receives another data signal having another polarity, the two data signal lines being arranged adjacent to each other, scanning pulses are successively outputted in sets of two, and at a timing in which two scanning pulses fall, two scanning pulses rise.

Abstract: A liquid crystal display apparatus includes a liquid crystal display panel having gate lines and source lines, a GIP circuit which drives the gate lines and a source driver IC3 which drives the source lines. The source driver IC3 includes a gate control signal generator which generates gate control signals SOUT1-SOUTn which control the GIP circuit. The gate control signal generator is configured so that it is possible to control the waveforms of the gate control signals SOUT1-SOUTn in software.

Abstract: The driving circuit of the liquid crystal display device according to the present invention classifies a combination of a displayed gray-scale level of a previous vertical scanning period and a regular gray-scale level corresponding to an input image signal in a current vertical scanning period into either a first group or a second group. The driving circuit is capable of supplying the gray-scale voltage corresponding to the regular gray-scale level for any combination belonging to the first group, and supplying a gray-scale voltage corresponding to an alternative gray-scale level which is different from the regular gray-scale level for any combination belonging to the second group.

Abstract: A display device having a pixel section including a plurality of pixel circuits arrayed in a matrix, a plurality of scan lines, a plurality of capacity lines, a plurality of signal lines, a drive circuit, and a generation circuit generating a small amplitude common voltage signal switching in level at a predetermined cycle, wherein each pixel circuit arranged at the pixel section contains a display element having a first pixel electrode and a second pixel electrode and a storage capacitor having a first electrode and a second electrode, the first pixel electrode of the display element, the first electrode of the storage capacitor, and one terminal of the switching element are connected, the second electrode of the storage capacitor is connected to the capacity lines arrayed in a corresponding row, and the common voltage signal is applied in a second pixel electrode of the display element.

Abstract: A memory liquid crystal display device includes a transistor (N1), a transistor (N2), a transistor (N3), a transistor (N4), a first storage capacitor (storage capacitor of an overlapping part of a capacitor electrode 37a and a CS line CSL(i)) connected to a pixel electrode (7), and a second storage capacitor (storage capacitor of an overlapping part of a capacitor electrode 37b and a CS extension section 10bb) connected to the pixel electrode (7) via the transistor (N2), the pixel electrode (7) being connected to (a) a source line (SL(j)) via the transistor (N1), (b) a data transfer control line (DT(i)) via the transistor (N4) and the third transistor, (c) a drain electrode (9a) of the transistor (N1) via a contact hole (13), and (d) a source electrode (8b) of the transistor (N2) and to a drain electrode (9c) of the transistor (N4), via a contact hole (14).

Abstract: Present techniques involve methods and systems for reducing edge discoloration in a display. In one embodiment, the first and last columns of a display are dimmed by adjusting a black mask or reducing transmittance of the relevant pixels. Further, the first and last columns of a display may be entirely covered by the black mask. In some embodiments, using a coupling extrusion on a neighboring sub-pixel can be used to control the coupling between the neighboring sub-pixels to reduce edge discoloration. Display software may also be used to reduce edge discoloration. For example, software may automatically reduce the brightness of the first and last column. In some embodiments, software may be used to detect edges of objects within the display area. Edges of an object are detected, and the last sub-pixel of the background and/or the first sub-pixel of the object are compensated.

Abstract: A tangent angle circuit is connected to a plurality of scan line driving circuits and comprises: a charging module integrated on a control board to receive input of a direct current (DC) driving voltage and output a cut-in voltage to charge the scan line driving circuits; and a plurality of discharging modules integrated on the scan line driving circuits respectively to control the corresponding scan line driving circuits to discharge. In the present invention, by distributing the discharging modules on each of the scan line driving circuits respectively, the burden of load discharged charges on the discharging modules is reduced to avoid occurrence of an overhigh temperature; and the discharging modules are spatially separated, which is further favorable for reducing the temperature, releasing the space of the control board and reducing the area of the control board.

Abstract: A LCD driving method is described. The driving method includes the steps of: (a) applying first scan voltage to first scan line for switching on first TFT, wherein data voltage of data line is transmitted to first pixel electrode via first drain electrode and first source electrode; (b) discharging first scan voltage, wherein first pixel voltage of first pixel electrode decreases first feed-through voltage; (c) applying second scan voltage to second scan line for switching on second TFT, wherein data voltage of data line is transmitted to second pixel electrode via second drain electrode and second source electrode for charging second LC capacitor in a second pixel voltage; and (d) discharging second scan voltage, wherein second pixel voltage of second pixel electrode decreases a second feed-through voltage, and first and second scan voltages are positively relative to the first and second feed-through voltages respectively.

Abstract: For each display line cycle, inputs to a pair of differential input terminals of a driving circuit are alternately switched in a cycle shorter than the display line cycle between a gradation voltage and a reference voltage. According to this, a chopping operation of switching polarities of offset appearing at the output of the driving circuit within one display line is performed for a plurality of times, and accordingly, a pixel of each display line maintains brightness information in which the chopping operation is already performed. As a result, although a frame cycle is lengthened, it is difficult to visually recognize a brightness difference caused by the offset.

Abstract: A digitally controlled voltage generator is disclosed for use in applications requiring fine resolution voltage control, such as generating a common voltage for a liquid crystal display. A constant resistance digital to analog converter (DAC) is configured to provide appropriate voltage steps by tuning bias resistors to generate desirable reference voltages for the DAC. The bias resistors are configured to be tuned after placement and routing steps in an integrated circuit design.

Abstract: The present invention provides a display device which is arranged so that when an image is scrolled, a noise pattern does not easily overlap the image. The display device includes a display region that includes a region in which an arrangement pattern (U1) including X i-th pixels arranged next to one another in the row direction for each data color, the arrangement pattern being repeated in the row direction, the X being represented by X=A/2+A·Q, where Q is an integer of 0 or greater, and is defined for each row.

Abstract: An inverter of driving a light source for a display device is provided. The inverter includes a temperature sensor sensing a temperature and generating an output voltage based on the sensed temperature, a buffer generating an output signal having a state depending on the output voltage of the temperature sensor, an oscillator generating an oscillating signal having a frequency depending on the state of the output signal of the buffer, and an inverter performing a switching operation in response to the oscillating signal from the oscillator. Therefore, the inverter increases the voltage applied to the light source when the temperature near the light source is lower than a predetermined temperature since the frequency of the oscillating signal is increased.