Abstract: Techniques for reducing image artifacts on a display s may include receiving image data, such that the image data includes pixel luminance data for a frame of image data. The technique may also include determining an emission duration for a pixel of the plurality of pixels during a sub-frame of the frame of image data based on the pixel luminance data. The technique may also include determining an emission duration extension to apply to the emission duration associated with the sub-frame based on a luminance baseline associated with the sub-frame, a luminance level associated with the sub-frame, and a time period associated with the sub-frame. The technique may then involve sending an emission signal to the pixel, such that the emission signal is configured to cause the pixel to emit light for a duration that correspond to the emission duration and the emission duration extension.

Abstract: A display device (1) includes a display panel (10), a first gate drive circuit (11), a second gate drive circuit (12), a first gate slope formation unit (21), and a second gate slope formation unit (22). A plurality of pixels (3) is arranged in a matrix in the display panel. A plurality of gate lines (GL) for selecting pixel groups arranged along rows (X) is arranged along columns (Y) in the matrix. The first gate drive circuit supplies each gate line with a first gate drive signal from each end of the plurality of gate lines. The second gate drive circuit supplies each gate line with a second gate drive signal from each opposite end of the plurality of gate lines. The first gate slope formation unit forms a gate slope which is a falling slope in the signal waveform of the first gate drive signal. The second gate slope formation unit forms a gate slope of the second gate drive signal independently of the first gate slope formation unit.

Abstract: A bistable cholesteric liquid crystal switchable window has two stable states in the absence of an applied voltage. A first stable state is a planar state which is transparent or reflective for visible light. A second stable state is a focal conic state which is opaque for visible light. The window can be switched from the first stable state to the second stable state via a first voltage pulse and from the second stable state to the first stable state via a second voltage pulse. The first voltage pulse and the second voltage pulse may have the same frequency.

Abstract: According to one embodiment, a display driver configured to control a display operation of an active-matrix display device, wherein the display device includes a display area in which liquid crystal pixels are arranged in a matrix form, a plurality of scanning lines arranged along rows, a plurality of signal lines arranged along columns, a plurality of switching elements arranged in the vicinities of positions at which the scanning lines and the signal lines intersect each other, and a backlight, and the display driver controls preparatory write of writing a signal of a predetermined gradation to the liquid crystal pixels, thereafter controls sequential write of an image signal to the liquid crystal pixels, and at the time after an elapse of a predetermined time from the preparatory write, makes the backlight light up.

Abstract: A pixel structure includes a substrate and a thin-film transistor having a first top surface and disposed above the substrate. The first top surface has a first projection area. A data line has a data line adjoining area connected to the thin-film transistor. A pixel electrode has a second top surface and disposed above the thin-film transistor. The second top surface has a second projection area that is greater than the first projection area. The second projection area has a first part and a second part; the first part corresponding to the first projection area is removed by at least 50%; and the second part corresponding to the data line adjoining area is at most 70% removed. The pixel structure omits an insulation layer under the pixel electrode to lower the cost of production and speed up the manufacturing process.

Abstract: The present disclosure provides an organic light emitting display device including a display panel in which a plurality of Sub Pixels defined by a plurality of Data Lines and a plurality of Gate Lines are arranged, and a control method thereof. The organic light emitting display device includes a temperature sensor configured to detect a temperature of the display panel, and a gate pulse modulator configured to modulate a voltage in a falling section of a scan signal provided to the plurality of GLs, in real time in accordance with the temperature. Accordingly, it is possible to prevent data from being mixed with each other, so that a clearer image can be realized, thereby improving the image quality.

Abstract: An electro-optical device includes a first pixel provided corresponding to intersection of a first data line and a scanning line, a second pixel provided corresponding to intersection of a second data line and the scanning line, a data signal circuit configured to supply a first data signal to the first pixel via the first data line in a first period and supply a second data signal to the second pixel via the second data line in a second period that is started after completion of the first period, and a pre-charge circuit configured to supply a second pre-charge signal to the second data line in the first period after supplying a first pre-charge signal to the second data line in the first period.

Abstract: A driving method of a display panel, a display panel and a display device are disclosed. The method includes: for a first row of sub-pixels and a second row, adjacent to the first row, of sub-pixels, during a display period of a first frame image, inputting data signals to the first row of sub-pixels in a first order, and inputting data signals to the second row of sub-pixels in a second order opposite to the first order; and during a display period of a second frame image adjacent to the first frame image, inputting data signals to the first row of sub-pixels in the second order and inputting data signals to the second row of sub-pixels in the first order.

Abstract: A driving method for a display apparatus is provided. The display apparatus includes data lines, scan lines and pixel units. Each pixel unit includes a pixel electrode and a common electrode. The driving method includes the following steps: when the display apparatus enters from a first frame period into a second frame period, switching a voltage level of a common voltage from a first common voltage level to a second common voltage level, and simultaneously changing a voltage level of the pixel electrode; during a data period of the second frame period, driving the scan lines according to a scanning sequence so as to write display data transmitted by data lines into the pixel units; and during a reset period of the second frame period, driving the scan lines according to the scanning sequence so as to write reset data transmitted by the data lines into the pixel units.

Abstract: The present disclosure provides display panel and display device. By adjusting positions of the input signal line and the output signal line of the force sensor, the problem that output signal of the force sensor in the existing display panel is interfered by signal transmitted on the peripheral circuit wirings. Non-display area of the display panel is provided with force sensor and driving circuit; the distance between an orthographic projection of the first output signal line of the force sensor on the display panel and an orthographic projection of the driving circuit input line on the display panel is at least 30 ?m; and the distance between an orthographic projection of the second output signal line of the force sensor on the display panel and the orthographic projection of the driving circuit input line on the display panel is at least 30 ?m.

Abstract: An electronic modulating device is provided. The electronic modulating device includes a substrate, a plurality of first modulating electrodes disposed on the substrate, and a plurality of second modulating electrodes disposed on the substrate. The area of one of the first modulating electrodes is greater than the area of one of the second modulating electrodes. The ratio of the number of first modulating electrodes to the number of second modulating electrodes is in a range from 0.5 to 2.0.

Abstract: There is provided a liquid crystal driving apparatus which includes a first substrate and a second substrate, a first counter electrode that is provided on the first substrate so as to face the second substrate, a second counter electrode that is provided on the second substrate so as to face the first substrate, a polymer network liquid crystal layer that is enclosed between the first substrate and the second substrate, and a drive circuit configured to ON-drive the first counter electrode and the second counter electrode by applying a rectangular wave voltage for driving the second counter electrode upon inverting a phase and shifting forward or backward by a minute time ?t with respect to a rectangular wave voltage for driving the first counter electrode.

Abstract: A display device includes a display panel, and drive circuits sequentially scanning gate lines and supplied with any of M-phase (M: three or greater) drive signals having different phases and a first potential or a second potential (lower) at predetermined cycles. The drive circuit includes netA(n) whose potential changes by drive signal with the first/second potential as reference, and an output circuit switching a corresponding gate line to a selected/unselected state and including first output switch including a gate connected to netA(n+1) of a first drive circuit different from the drive circuit, a drain supplied with the drive signal, and a source connected to the gate line. Difference between the potential of netA(n+1) in case of switching the gate line to the unselected/selected state and the reference potential in netA(n+1) is equal to difference between the first and second potentials or greater.

Abstract: A display apparatus includes a display panel and a driving circuit. The display panel includes signal lines extending in a column direction, scanning lines extending in a row direction, and lead-out lines extending in the column direction. Each of the lead-out lines intersects with corresponding one of the scanning lines at an intersection and is electrically coupled to the corresponding one of the scanning lines at a node. The node is disposed at the intersection or in a region surrounding the intersection. The driving circuit supplies corresponding one of the signal lines with a signal pulse corresponding to an image signal, and supplies corresponding one of the lead-out lines with a selection pulse having a peak value based on a distance from one end of the corresponding one of the lead-out lines to the corresponding node, after increasing the peak value with an increase in the distance.

Abstract: A target image can be analyzed determine a respective level of visual saliency for each of a plurality of information presented in the target image. At least a first sub-frame update for a display panel can be determined, the at least first sub-frame update providing at least a partial rendering of the target image on the display panel, the at least partial rendering of the target image providing the information presented in the target image that is determined to have a highest level of visual saliency from among the plurality of information. The at least first sub-frame update can be applied to the display panel.

Abstract: The scan line drive circuit outputs selection signals GV3 and GV4 to select scan lines in the display panel. Assuming that a period in which a data voltage SV1 after being subjected to inversion of the polarity thereof is supplied to a data line in the display panel is a first period TSD, and that a period in which the data voltage SV1 after not being subjected to inversion of the polarity thereof is supplied to the data line is a second period TSC, the period TPD from the start of the first period TSD until the selection signal GV4 is activated is longer than the period TPC from the start of the second period TSC until the selection signal GV3 is activated.

Abstract: A display apparatus includes a first pixel connected to a first scan line, a second scan line, and a first data line, a second pixel connected to the first scan line and a second data line, and a selection circuit configured to electrically connect a first channel to one of the first data line and the second data line in response to selection signals. A pulse width of a first scan signal configured to be provided to the first scan line and a pulse width of a second scan signal configured to be provided to the second scan line are longer than one horizontal period.

Abstract: An electro-optical device includes a control circuit that controls the timing of output of a precharge voltage to a data line, and changes an elapsed time from start of transition of a voltage of a scanning signal G from a selection voltage to a non-selection voltage until an output of the precharge voltage to the data line according to a polarity of a data voltage, the voltage of the scanning signal for selecting one of multiple scanning lines, the selection voltage causing a pixel transistor to turn on, the non-selection voltage causing a pixel transistor to turn off.

Abstract: An EL display device includes a display screen; a first gate signal line; a second gate signal line; gate driver ICs (circuits); a current generating circuit which supplies a current to EL elements; a current amount obtaining circuit which obtains a magnitude of a current flowing through a plurality of pixels; and an on-voltage generating circuit which generates a control voltage output by the gate driver IC (circuit) to the first gate signal line. Each of the pixels includes a first switching transistor. The control voltage is a voltage which causes the first switching transistor to be in a conducting state. The on-voltage generating circuit varies a first control voltage based on an output result from the current amount obtaining circuit.

Abstract: A special-shaped display panel having a display area and a peripheral area, including: a peripheral light-shading layer at least partially located in the peripheral area and defining the display area; and a plurality of edge pixels, each of the edge pixels comprising an aperture portion located in the display area, and a light-shading portion located in the peripheral area and covered by the peripheral light-shading layer an area of the aperture portion of each edge pixel is defined as S, a transmittance of each edge pixel is defined as T, it is further defined that M=S*T, and the M values of the edge pixels are identical. Such solution improves the edge color cast problem of special-shaped display panel, makes the color displayed at the edge of the special-shaped display panel uniform, and improves the visual effect of the edge of the display panel.

Abstract: A liquid crystal display device includes a display panel, a signal generator, a plurality of wires, and a controller. The display panel has a plurality of pixels. The signal generator supplies data signal to the pixels. The wires connect output ends of the signal generator to input ends of the pixels, respectively. The controller varies voltage waveform corresponding to the data signal at the output ends by varying both a voltage level at a rising edge of the voltage waveform and a voltage level at a falling edge of the voltage waveform.

Abstract: A data driver which drives a display panel including a data line, a gate line and a common voltage line. The data driver includes a digital-to-analog converter configured to convert a data signal to a data voltage and an output buffer configured to amplify the data voltage. The output buffer includes an output channel through which an amplified data voltage is output to the data line and a dummy channel through which a feedback voltage corresponding to a common voltage from the common voltage line is received.

Abstract: The present inventive concept relates to a display device improving a bright difference. An exemplary embodiment of the inventive concept provides a display device, including a panel including a plurality of pixel areas having different widths, and a data driver supplying data signals having different voltages to the plurality of pixel areas in response to a same grayscale.

Abstract: A data transfer circuit that can suppress a voltage drop in a start signal without narrowing a process margin. The data transfer circuit includes N stages of register sections that are connected in series. A register section at an nth stage includes: a first transfer gate that transfers an analog signal; a second transfer gate that transfers one clock out of a clock signal, thereby generating an (n+1)th start signal for a register section at an (n+1)th stage; a control signal generation circuit that generates control signals for the first transfer gate and the second transfer gate; and a holding capacitor. The control signal generation circuit includes a third transfer gate that transfers an nth start signal that is input from a register section at an (n?1)th stage, and the third transfer gate is formed as a CMOS logic circuit.

Abstract: A display screen assembly includes: a gate driving circuit connected to n rows of gate lines, a display screen configured to include n pixel rows sequentially arranged, and a driving integrated circuit (IC) connected to the gate driving circuit via at least two signal lines. Each pixel row corresponds to a gate line of the n rows of gate lines. A first connection position at which a first signal line of the at least two signal lines and the gate driving circuit are connected corresponds to an i-th row of gate line. A second connection position at which a second signal line of the at least two signal lines and the gate driving circuit are connected corresponds to a j-th row of gate line. The at least two signal lines are configured to transmit frame initializing signals, and i, j, and n are positive integers.

Abstract: A display device includes a display unit including a plurality of pixels, a plurality of gate lines and a plurality of data lines which are connected to the plurality of pixels, a data driver applying data voltages to the plurality of data lines, and a gate driver delaying and outputting first gate signals applied to gate lines among the plurality of gate lines in a first sub-frame included in one frame and advancing and outputting second gate signals which are applied to remaining gate lines among the plurality of gate lines in a second sub-frame.

Abstract: An analog-to-digital converter (ADC) includes a split-capacitor digital-to-analog converter (DAC) having a Most Significant Bits (MSBs) sub-DAC with one or more MSBs encoded with one or more binary capacitors and one or more MSBs encoded with one or more thermometer capacitors, a Least Significant Bits (LSBs) sub-DAC, a termination capacitor coupled to the LSBs sub-DAC, and a scaling capacitor coupled between the LSBs and MSBs sub-DACs, and coupled to receive an analog input voltage, a high reference voltage, and a low reference voltage, and to provide an output voltage.

Abstract: A signal generation circuit, a voltage conversion device, and a computer program are provided wherein the minimum increment of a value to be set for a generating portion, can be made substantially smaller than an actual increment with a relatively small processing load. A CPU specifies a set value Y (closest to a target value X) and a second closest set value Z in every N periods of a first signal, determines N set values for the first signal by combining Y and Z based on the result of comparison between the values of Y and Z and the value of X, sets one set value for a generating portion for each period of the first signal, calculates a value for setting off-time of the second signal in a first period in N periods as an additional value, and sets the calculated value for the generating portion.

Abstract: A display driver includes a driving voltage generation part that generates a voltage as a pixel driving voltage by inverting a polarity of a voltage representing a luminance level of each pixel based on a video signal according to a polarity inversion signal received via a transmission line, the polarity inversion signal alternately indicating either one of positive and negative polarities, and a polarity inversion abnormality detection part that generates an abnormality detection signal indicating an abnormality of the transmission line when the polarity inversion signal indicates only one constant polarity for a period of N frames (N is an integer greater than or equal to 2) of the video signal.

Abstract: A scan driver includes a plurality of scan driving blocks. Each of the scan driving blocks includes a first shift register including a plurality of driving transistors, the first shift register being configured to provide a first driving signal to a first driving node and to provide a second driving signal to a second driving node, a second shift register including a plurality of masking transistors, the second shift register being configured to provide a masking signal to a masking output node, and a buffer circuit including a plurality of buffer transistors, the buffer circuit being configured to provide scan signals. The buffer circuit outputs the scan signals that include the first pulse or the scan signals that include the first pulse and the second pulse based on the masking signal.

Abstract: An example of display apparatus includes: a display panel in which unit pixels each constituted by at least a first subpixel displaying a first pattern and a second subpixel displaying a second pattern are alternately arranged in a row or column direction; and a signal processing unit modulating, for image data including the first pattern and image data including the second pattern, a difference in maximum gradation values in the image data, and controlling synchronization or non-synchronization of a rise or fall between bit signals of a coupled image signal input to the display panel.

Abstract: According to an aspect, a display device comprising: a display unit; a plurality of electrodes arranged side by side in a first direction along a display surface of the display unit; a detecting unit that detects one of an electric resistance of the electrodes, a voltage, and a current; and a specifying unit that specifies temperature distribution of the display surface based on the one of the electric resistance of the electrodes, the voltage, and the current. The electrodes are tapered in a second direction along the display surface and orthogonal to the first direction, and the electrodes include a first electrode tapered toward one side in the second direction and a second electrode tapered toward the other side opposite to the one side. The first and second electrodes are alternately arranged side by side in the first direction.

Abstract: The present disclosure discloses a driving circuit of display panel and the quality test method thereof. The driving circuit comprises a control circuit and a gate driving circuit. The control circuit comprises a first control output terminal used to output a first control signal and a second control output terminal used to output a second control signal. The gate driving circuit comprises a driving input terminal. In normal display mode, the driving input terminal receives the first control signal from the first control output terminal; in test mode, the driving input terminal receives the second control signal from the second control output terminal.

Abstract: A method of controlling an output voltage of an apparatus is provided. The method includes comparing an input voltage of the apparatus with a reference voltage, activating the output voltage when the input voltage is greater than or equal to the reference voltage, comparing the input voltage with a first low limit voltage or a first high limit voltage, comparing a first elapse time with a reference time when the input voltage is less than or equal to the first low limit voltage, comparing a second elapse time with the reference time when the input voltage is greater than or equal to the first high limit voltage, and deactivating the output voltage when the first elapse time or the second elapse time is longer than or equal to the reference time.

Abstract: A unit (10; 11; 12; 13) used to control a segment liquid crystal display (15; 16). The segment liquid crystal display (15; 16) includes at least a backplane electrode (20) and at least a front plane electrode (25) both associated with a same segment of the segment liquid crystal display (15; 16). The unit (10; 11; 12; 13) includes a controller (30; 40; 50) in order to generate a pulse-width-modulated control signal (35) that has two voltage levels and a variable duty cycle. The unit (10; 1; 12; 13) further includes an integrator (60; 61) to integrate the pulse-width-modulated control signal (35) and to provide an integrated control signal (90) which has more than two discrete voltage levels corresponding to different variable duty cycle values.

Abstract: A polarity inversion driving method and apparatus for a liquid crystal display panel, and a liquid crystal display, is provided in order to solve the technical problem in the prior art that the interference strips are concentrated in one line, without increasing the power consumption of the liquid crystal display panel. The method comprises the steps of: generating N polarity control signals of different timings, wherein N is an integer and N?2, and each polarity control signal is used to control a polarity voltage for sub-pixels in one or more columns of a liquid crystal display panel; and outputting the N polarity control signals to polarity control lines in the liquid crystal display panel, wherein each polarity control line corresponds to one polarity control signal.

Abstract: A method for driving a thin film transistor (TFT) liquid crystal display (LCD) panel during a display-off period is provided for avoiding image flickering when the panel resumes image display. Flickering when resuming image display is due to charge accumulated on liquid crystals (LCs) during the display-off period. For a cell having a TFT and a LC, the method releases the accumulated charge by driving a gate electrode with a VGH voltage to turn on the TFT for a short pre-determined duration regularly over the display-off period. Over the pre-determined duration, a VCOM electrode and a source electrode of the cell are also driven with a GND voltage, thereby releasing the accumulated charge from the LC as the TFT is turned on. The remaining time in the display-off period may be advantageously used for touch sensing while avoiding flickering after image display is resumed.

Abstract: Disclosed are a display device and a method of driving the same. The display device includes: a panel on which pixels, defined by intersections of a plurality of gate lines and a plurality of data lines, are alternately connected to one side and another side of the data line and the gate line; a data driver which supplies a data voltage having a different polarity to the data lines in odd columns even columns; and, a gate driver which supplies a gate voltage, which has first polarity and corresponds to a data voltage having the first polarity, to gate lines in odd rows, and supplies a gate voltage, which has a second polarity, and corresponds to a data voltage having the second polarity, to gate lines in even rows.

Abstract: A display device according to an embodiment includes switches. Low and high voltages of a selection control signal applied to each of gate electrodes of the switches are varied according to whether one of positive and negative data voltages is applied to each of the source electrodes of the switches. As such, the swing width of the selection control signal can be maintained regardless of the positive and negative data voltages. In accordance therewith, undesired power consumption can be prevented.

Abstract: A display device is provided. A display device comprising, a gate voltage generator outputting a gate-on voltage and a gate-off voltage, a clock generator receiving the gate-on voltage and the gate-off voltage and outputting a clock signal, a gate driver receiving the clock signal and outputting a gate signal, the gate driver including a plurality of stages which are connected to a plurality of gate lines respectively, and a pixel unit comprising a plurality of pixels which are turned on or turned off by the gate signal to display an image, wherein the gate voltage generator comprises, a direct current (DC) converter connected to a sub-gate node and receiving a sub-gate signal which is one of outputs of the plurality of stages gate driver and outputting a compensation voltage using the received sub-gate signal.

Abstract: A display apparatus including: gate lines extending in a first direction; data lines extending in a second direction intersecting the first direction; pixels connected to corresponding ones of the gate lines and data lines; a gate driver to drive the gate lines in response to a gate clock signal; a data driver to drive the data lines; a memory to store charge share signals corresponding to the gate lines; a timing controller controlling the data driver and the gate driver, in response to an externally input control signal and an image signal, and to output a gate pulse signal to the gate lines; and a clock generator configured to generate the gate clock signal in response to the gate pulse signal. The timing controller is configured to output the gate pulse signals according to the charge share signals.

Abstract: A liquid crystal display includes: a substrate; a gate line disposed on the substrate; a storage voltage line disposed on the substrate and extending substantially parallel to the gate line; a data line disposed on the substrate; a reference voltage line disposed on the substrate and extending substantially parallel to the data line; first and second subpixel electrodes disposed in a pixel area; a first switching element connected to the gate line, the data line, and the first subpixel electrode; a second switching element connected to the gate line, the data line, and the second subpixel electrode; and a third switching element connected to the second subpixel electrode and the reference voltage line, wherein the storage voltage line and the reference voltage line are not connected to each other.

Abstract: The present invention relates to a display panel, having a display area and a fan-out area, and a GOA circuit. The GOA circuit includes a plurality of stage pre-charge modules, arranged for connecting output terminals of two adjacent gates in the GOA circuit in the fan-out area to two corresponding adjacent gate line outputs in the display area respectively. Each of the stage pre-charge modules includes a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor and a sixth thin film transistor.

Abstract: A display apparatus includes gate lines configured to receive gate signals, data lines arranged to cross the gate lines and configured to receive data voltages, and pixels grouped into first pixel groups and second pixel groups and connected to the gate lines and the data lines. The gate signals are configured to be applied to the gate lines in a predetermined order while skipping at least one gate line without being sequentially and consecutively applied to two gate lines adjacent to each other among the gate lines.

Abstract: An integrated circuit accesses a first storage section that stores a plurality of pattern groups of voltage application for changing an optical state of a pixel to a designated gray level, and outputs a control signal for applying a voltage to a single target pixel of a plurality of pixels as defined above, the voltage being indicated by a pattern that is contained in a pattern group of the plurality of pattern groups that is selected in accordance with the position of the single pixel and the gray level value of the single pixel, the gray level value being indicated by image data acquired by an acquiring section.

Abstract: A driving voltage generating device, a display device including the same, and a method of generating a driving voltage are provided. The driving voltage generating device includes a driving voltage setting unit receiving initially set data on a driving voltage and a feedback voltage and outputting a control signal, a driving voltage trimmer receiving finely adjusted data on the driving voltage and adjusting the feedback voltage, and a DC to DC converter generating the driving voltage based on the control signal and an input voltage.

Abstract: For each display line cycle, inputs to a pair of differential input terminals of a driving circuit are alternately switched in a cycle shorter than the display line cycle between a gradation voltage and a reference voltage. According to this, a chopping operation of switching polarities of offset appearing at the output of the driving circuit within one display line is performed for a plurality of times, and accordingly, a pixel of each display line maintains brightness information in which the chopping operation is already performed. As a result, although a frame cycle is lengthened, it is difficult to visually recognize a brightness difference caused by the offset.

Abstract: Provided are a sensor device and a sensing method using the same. The sensor device according to the present invention includes: a sensing voltage generating unit outputting different voltage values depending on an external environment; a pulse generating unit generating a pulse having a period which is proportional to an input voltage; a divider dividing an output of the pulse generating unit; and a counter unit measuring a length of an output pulse of the divider in a clock unit. As a result, the sensor device including an analog-digital converter (ADC) using a pulse width modulation technology is a miniature device and has high resolution.

Abstract: The present disclosure provides a voltage calibration circuit. The voltage calibration circuit includes a coupling voltage detection circuit and a common voltage circuit. The coupling voltage detection circuit is used for detecting a coupling voltage in an initial phase and generating a compensation voltage according to the coupling voltage. The common voltage circuit is used for adjusting a common voltage according to the compensation voltage and outputting the common voltage to a display module in a display phase.

Abstract: A display apparatus includes a display panel, a gate driver and a data driver. The display panel includes gate lines, data lines and pixels electrically connected to the gate lines and the data lines. The gate driver is disposed adjacent to a first side of the display panel, and outputs a gate signal to the gate line. The data driver is disposed adjacent to the first side of the display panel, and outputs a data voltage to the data line. A gate signal applied to a position having a low resistance-capacitance (“RC”) delay of the gate line has a kickback slice greater than a kickback slice of a gate signal applied to a position having a high RC delay of the gate line. The kickback slice is defined as a portion having a level lower than a gate-on voltage level in a gate pulse of the gate signal.