Abstract: In the liquid crystal display device adjacent source lines may be short-circuited during horizontal scanning periods. A gate driver sequentially may apply a pixel data write pulse to gate lines in each frame period and may apply a black voltage application pulse during the horizontal scanning periods which is after the lapse of a period of the order of a 2/3 frame from the application of the pixel data write pulse to each gate line. A source driver may connect each source line to a charge sharing voltage fixing power supply during the horizontal scanning periods where the adjacent source lines are short-circuited, and thereby brings a charge sharing voltage to the same value regardless of display gradation.

Abstract: Provided is an electro-optical device including: pixel electrodes provided in intersections of gate lines and data lines; counter electrodes provided to face the pixel electrodes with an electro-optical material interposed therebetween; and storage capacitors each of which one end is connected to each of the pixel electrodes, wherein, if data line signals supplied to the pixel electrodes via the data lines correspond to writing of a positive polarity with respect to the potential of the counter electrodes, the potential of the other end of each of the storage capacitors is changed to a high potential side after the data line signals are written and, if the data line signals correspond to writing of a negative polarity with respect to the potential of the counter electrodes, the potential of the other end of each of the storage capacitors is held at a constant level before and after the data line signals are written.

Abstract: An impulse-type driving method for a liquid crystal display (LCD) is used for driving a pixel array of an LCD panel. The method includes providing a set of impulse control signals to a source driver. The source driver, according to the set of impulse control signals, drives the pixel array. The set of impulse control signals includes a command signal. The command signal includes a field of determining data voltage polarity and a command field. According to a time sequence, the field of determining data voltage polarity provides a polarity data for determining a voltage polarity output by the source driver. The command field and the field of determining data voltage polarity are consecutively and alternatively output, in which the command field allows to add a dynamic command in accordance with a desired action.

Abstract: A liquid crystal display device includes a liquid crystal display panel including a plurality of data lines, a plurality of gate lines, and a plurality of liquid crystal cells, the plurality of liquid crystal cells associated to a first and second liquid crystal cell groups, a data drive circuit to supply a data voltage to the data lines in response to a polarity control signal, a gate drive circuit to supply a scan pulse to the gate lines, and a polarity control circuit to generate different polarity control signals for each frame period and to control data voltage frequencies of the first and second liquid crystal cell groups to be different from each other.

Abstract: A pixel structure includes a first scan line, a second scan line, a third scan line, a data line, a first thin film transistor (TFT), a second TFT, a third TFT, a first pixel electrode and a second pixel electrode. Particularly, the second scan line and the third scan line are electrically connected with each other. The first TFT is electrically connected with the first scan line and the data line. The second TFT is electrically connected with the first TFT and the second scan line. Furthermore, the third TFT is electrically connected with the third scan line and the data line. In addition, the first pixel electrode and the second pixel electrode are respectively electrically connected with the second TFT and the third TFT.

Abstract: A device is provided for setting a voltage applied to each of data signal lines so as to correct a voltage, applied to the pixel, which corresponds to a gradation data signal in each of sub-frames of a single frame. As such, voltage drop, caused by a combination of voltages of the gradation data signal in each of the sub-frames, may be partially or even fully compensated. On this account, it is possible to provide a liquid crystal display device which can lessen or even avoid an influence of the voltage drop caused by, for example, gate-drain capacitance of the thin film transistor in case of adopting time-division driving, and/or a method for driving the liquid crystal display device.

Abstract: An exemplary liquid crystal display (300) includes a liquid crystal panel (301) receiving reference voltages; and a polarity resetting circuit (354) receiving display signals from external circuit and resetting the received display signals to attain resetted display signals, which makes the voltage difference between the resetted display signals and the previous frame display signals smaller than that between the corresponding received display signals and the previous frame display signals.

Abstract: A source driver and a source line driving method capable of removing the offset effect of an amplifier for every two frames. The source driver includes an amplification unit, an input controller and an output controller. The amplification unit includes a positive amplifier outputting an output voltage having a positive deviation relative to an input voltage applied thereto and a negative amplifier outputting an output voltage having a negative deviation relative to an input voltage applied thereto. The input controller transfers a first gray-level voltage corresponding to a driving voltage of a first source line and a second gray-level voltage corresponding to a driving voltage of a second source line adjacent to the first source line to the amplification unit in response to input positive control signals or input negative control signals.

Abstract: A display device and driving method are provided. A display device includes a display area that includes a plurality of pixel cells in respective pixel regions defined by a plurality of gate and data lines crossing each other. A data driver is operable to supply data signals to the pixel cells. The pixel cells are connected with the first data line and are divided into a plurality of pixel-cell groups. The data driver is operable to supply the data signal of first polarity to the pixel cells included in the odd-numbered pixel-cell groups, and to supply the data signal of second polarity to the pixel cells included in the even-numbered pixel-cell groups. The first polarity is opposite to the second polarity. A shift register that is operable to drive the gate lines to supply the scan pulses of different amplitudes to neighboring pixel cells included in the different pixel-cell groups.

Abstract: An exemplary method for driving a liquid crystal panel includes: defining the array of pixels as comprising an array of dithering units; providing a predetermined inversion driving pattern for each dithering unit; providing a series of predetermined dithering patterns for each dithering unit; driving the sub-pixel units according to a sequence of frames, a predetermined plurality of the frames defining a cycle of frames. For all the first, second, and third color sub-pixels in a same row of pixels of each dithering unit, summations of the polarities of the first, second, and third color sub-pixels cancel each other out, respectively.

Abstract: A liquid crystal device includes a plurality of pixels disposed in the shape of a matrix of n rows×m columns (where n and m are natural numbers equal to or larger than two), n scanning lines, 2m data lines including pairs of a first data line and a second data line for each column of the plurality of pixels, and a data line driving circuit that generates a first gray scale voltage corresponding to higher bits acquired by dividing gray scale data of plural bits into the higher bits and lower bits and generates a second gray scale voltage corresponding to the lower bits. Each one of the plurality of pixels includes a first switching element and a second switching element which are controlled to be turned on or off by the common scanning lines, a first pixel electrode to which the first or second gray scale voltage is supplied from the first data line through the first switching element, and a second pixel.

Abstract: An embodiment of the present invention aims to allow a display device employing the dot-sequential drive system and the line common inversion system to suppress reduction of visual quality when pixel defects are corrected by source-drain short-circuiting or any TFTs with poor properties are present. A display control circuit outputs a video signal, such that the video signal is inputted to a source driver with the input order of the video signal being alternately switched every horizontal scanning period between the order from the first to the n'th source bus line and the n'th to the first source bus line. In accordance with this, the source driver reverses the order of applying the video signal to the source bus lines every horizontal scanning period.

Abstract: In a method of driving a dot matrix display panel using bistable nematic liquid crystal, a “blur” due to a parasitic signal is prevented from being caused. In a method of driving a dot matrix display panel using bistable nematic liquid crystal which may select white/black only by positive polarity driving or negative polarity driving, a direct current component due to a parasitic signal (40) caused at the time of non-selection is canceled by a cancel pulse (41) having a pulse width that is the same as that of the parasitic signal (40) and a polarity that is opposite to that of the parasitic signal (40). The cancel pulse (41) is generated by adding an additive pulse (35) to a common selection signal (25) and by adding an additive pulse (36) to a common non-selection signal (26).

Abstract: A gradation voltage adjustment section for increasing a positive gradation voltage VHX of an X-th gradation and a negative gradation voltage of the X-th gradation so that the increment corresponds to a charge pull-in amount ?V is provided in a gradation voltage generation circuit of each source driver. In at least one embodiment, a center value between the positive and negative gradation voltages is adjusted for each driver in accordance with a slant of the charge pull-in amount ?V in a direction of a gate signal line, thereby suppressing a flicker without varying a gradation characteristic. Further, a center value between the positive and negative gradation voltages is adjusted for each horizontal line or for every plural lines in a single frame in accordance with a horizontal direction deviation and a vertical direction deviation of the charge pull-in amount ?V in a transfer block, thereby suppressing a flicker without varying a gradation characteristic.

Abstract: A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a liquid crystal display panel, a data drive circuit, a gate drive circuit, and a timing controller. The data drive circuit generates a pre-charge data voltage during pre-charge time and generates a real-charge voltage to be displayed on the liquid crystal display panel during real-charge time. The gate drive circuit supplies a first gate pulse synchronized with the pre-charge data voltage to the gate lines during the pre-charge time while shifting a gate pulse in a downward direction and an upward direction depending on an up/down signal, and then supplies a second gate pulse synchronized with the real-charge data voltage to the gate lines from a falling edge of the first gate pulse at intervals equal to or longer than scanning time of 1 line during the real-charge time.

Abstract: A driver circuit which drives a source line of an electro-optical device includes a source line driver section which supplies a grayscale voltage corresponding to grayscale data to the source line, a source output switch section which short-circuits the source line and a common line connected with a capacitor before the source line driver section drives the source line, and a charge recycle control section which controls the source output switch section. The charge recycle control section determines whether or not to short-circuit the source line and the common line in source line units based on the grayscale data and polarity of a common electrode voltage supplied to a common electrode opposite to a pixel electrode of the electro-optical device. The source output switch section short-circuits the source line and the common line based on the determination result of the charge recycle control section.

Abstract: An array substrate includes a base substrate, a plurality of gate lines, a plurality of data lines and a pixel matrix. The plurality of gate lines and the plurality of data lines define pixel areas. The pixel matrix is formed on each pixel area, and includes a plurality of pixel columns and pixel rows. Each pixel column has a first pixel group and a second pixel group. The first pixel group is electrically connected to a first gate line adjacent to the pixel column. The second pixel group is electrically connected to a second gate line adjacent to the pixel column. Each pixel row is electrically connected to one data line adjacent to the pixel column.

Abstract: Pixels include liquid crystal capacitors and holding capacitors having first ends connected to pixel electrodes and second ends connected to common electrodes corresponding to the first to 320th rows. A common electrode driving circuit includes TFTs for individual rows. In a partial mode, when a period in which a level of a scanning signal is high is long, a control signal Vg-c is brought to a high level during the period so that the TFTs are turned on. Since gate voltages are applied to the TFTs, a problem in that the gate voltages are reduced due to voltage leakage and the common electrodes are brought into high-impedance states is avoided. Alternatively, potentials of the common electrodes are fixed to a voltage of a common signal, which is a low-level when positive-polarity writing is specified to all the rows and a high-level when negative-polarity writing is specified to all the rows.

Abstract: A pixel structure and a method for generating drive voltages in the pixel structure are disclosed. The pixel structure comprises a first sub-pixel electrode, a first com-line, and second com-line. The first sub-pixel electrode is applied with a first drive voltage. The first com-line transmits a first com-voltage signal. The second com-line transmits a second com-voltage signal. The first drive voltage is derived by combining the first com-voltage signal and the second com-voltage signal.

Abstract: A method for driving an LCD device having a plurality of sets of gate lines is disclosed. The method includes sequentially enabling odd gate lines of a first set of gate lines in ascending order for writing first-polarity data into corresponding pixels based on a first common voltage during a first interval, sequentially enabling even gate lines of the first set of gate lines in ascending order for writing second-polarity data into corresponding pixels based on a second common voltage during a second interval, sequentially enabling even gate lines of a second set of gate lines in descending order for writing second-polarity data into corresponding pixels based on the second common voltage during a third interval, and sequentially enabling odd gate lines of the second set of gate lines in descending order for writing first-polarity data into corresponding pixels based on the first common voltage during a fourth interval.

Abstract: An LCD driving circuit includes a first buffer configured to have a terminal for a first voltage, a terminal for a second voltage and a terminal for an intermediate voltage between the first voltage and the second voltage, and be driven in a range from the first voltage to the intermediate voltage; and a second buffer configured to have a terminal for the first voltage, a terminal for the second voltage and a terminal for the intermediate voltage, and be driven in a range from the intermediate voltage to the second voltage. The terminal for the intermediate voltage of the first buffer and the terminal for the intermediate voltage of the second buffer are connected with each other, and the first voltage is a highest voltage, the second voltage is a lowest voltage, and the intermediate voltage is in a range from the first voltage to the second voltage.

Abstract: A liquid crystal display apparatus includes a liquid crystal display panel having a data line and a source driver for supplying a data signal to the data line based on a polarity signal. A polarity of the data signal is determined based on the polarity signal. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an output amplifier used to generate the data signal. The output amplifier is constructed so as to invert a polarity of an offset voltage based on the offset cancel control signal. The offset cancel control signal is generated based on the polarity signal.

Abstract: A liquid crystal display apparatus includes a liquid crystal modulation element having a liquid crystal layer and first and second electrodes, and a controller performs control for an electric potential difference applied between the electrodes such that an electric field applied to the liquid crystal layer is inverted between positive and negative. The controller switches the control between first control and second control. The first control controls the electric potential difference such that one of an absolute value of a time-integrated value of the positive electric field applied to the liquid crystal layer and an absolute value of a time-integrated value of the negative electric field applied thereto is larger than the other, and the second control controls the electric potential difference such that the other absolute value of the time-integrated value is larger than the one absolute value of the time-integrated value.

Abstract: An electro-optical device includes pixels that are provided to correspond to intersections of a plurality of rows of scanning lines and a plurality of pairs of first and second data lines; a scanning line driving circuit that selects the plurality of rows of scanning lines according to a predetermined sequence; and a data line driving circuit that supplies a data signal having a voltage according to a gray-scale level of each of pixels corresponding to the selected scanning line to the first data line, and supplies an inverted data signal obtained by inverting the data signal on the basis of a predetermined potential to the second data line.

Abstract: An electrooptic device is driven so that row groups of the pixels that are made black in a first precharge period and a row group of the pixels that are made black in a second precharge period are next to each other.

Abstract: A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a data drive circuit that supplies a data voltage, whose a polarity is periodically inverted, to the data lines, a gate drive circuit, and a timing controller. The gate drive circuit sequentially supplies a first gate pulse synchronized with a first data voltage to gate lines, and sequentially supplies a second gate pulse synchronized with a second data voltage having a polarity opposite a polarity of the first data voltage, to the gate lines. The timing controller generates a pre-gate start pulse for controlling an output of the first gate pulse during a blank period, and then generates a real gate start pulse for controlling an output of the second gate pulse during an initial period of a frame period following the blank period.

Abstract: A source driver which can control the spatial cycle of inverting the polarity of offset voltage in response to the spatial cycle of inverting the polarity of data signal. The liquid crystal display device according to the present invention has an LCD panel, having data lines, and source drivers for supplying data signal to the data lines. The source driver includes an offset cancel control circuit for generating an offset cancel control signal and an amplifier used for generating the data signal, which is configured so as to invert the polarity of the offset voltage in response to the offset cancel control signal OCC. The offset cancel controller circuit receives the pattern select signal PSEL specifying the cycle of inverting the polarity of the offset voltage of the amplifier to generate the offset cancel control signal in response to the pattern select signal PSEL.

Abstract: An object of one embodiment of the present invention is to provide a liquid crystal display device using the common inversion driving that allows the amplitude voltage of a scan signal on a scan line to be low. The device including a first transistor having a gate, a first terminal, and a second terminal electrically connected to a scan line, a signal line, and a first electrode of a liquid crystal element, respectively; and a second transistor having a gate, a first terminal, and a second terminal electrically connected to the scan line, a common potential line, and a second electrode of the element, respectively. An image signal is supplied from the signal line to the first electrode to subject the element to inversion driving. A common potential is supplied from the common potential line to the second electrode in synchronization with supply of the image signal.

Abstract: A flat panel display device and a picture quality controlling method thereof is provided. The flat panel display device includes a display panel. A memory stores location information about a panel defect location on the display panel and a compensation value to be dispersed for a plurality of frame periods. A compensating part detects the data to be displayed at the panel defect location and adjusts the data to be displayed at the panel defect location with the compensation value from the memory.

Abstract: Embodiments of the present invention generally provide m Methods and apparatus for reducing power consumption of backlit displays are described. Power consumption is reduced by dimming backlighting by a first scale factor and boosting pixel values by a second scale factor to compensate for the dimming. The scale factors may be constant values. Alternately, one or both of the scale factors may be determined based on pixel values for one or more frames to be displayed and/or one or more frames that have been displayed. For example, scale factors may be calculated based on an average linear amplitude of one or more frames of pixel values or from a maximum pixel value of one or more frames of pixel values. A graphical processing system is described including an integrated circuit capable of transforming a pixel value from a gamma-compensated space to a linear space.

Abstract: An exemplary liquid crystal display (20) includes a plurality of pixel units (240) each including a pixel electrode (26) and a common electrode (22), a data driving circuit (33) providing a plurality of data voltages to each pixel electrode, a common voltage generating circuit (34) providing a common voltage to each common electrode, and a gamma voltage generating circuit (35) providing gamma voltages to the data driving circuit. The plurality of pixel units are arranged in a matrix. The voltage difference between the data voltage and the common voltage in each pixel unit is a sum of a main voltage and an auxiliary voltage with periodical change. An absolute value of the main voltage is constant. An absolute value of the auxiliary voltage is less than the absolute value of the main voltage. A sum of the auxiliary voltage is zero in a minimum period.

Abstract: An exemplary liquid crystal display device includes a liquid crystal panel configured for displaying images according to external image data. The liquid crystal panel comprising a plurality of sub-pixel regions and a controlling circuit. The sub-pixel regions are arranged regularly, each of the sub-pixel regions having either a positive polarity or a negative polarity when displaying images. The controlling circuit is configured to adjust a common voltage applied to the liquid crystal panel according to a relationship between variations of the common voltage and polarity information of at least a plurality of the sub-pixel regions during operation of the liquid crystal display device.

Abstract: In one embodiment of the present application, a memory stores a lookup table storing, in accordance with a combination of a value of a video signal of a current frame and a value of a video signal of a previous frame, each of correction values, the correction values in each of which a temporal change of a video signal is enhanced. A correcting circuit carries out, with respect to a correction value selected from the lookup table, a predetermined correcting operation in accordance with a polarity of a voltage to be applied to each of data signal lines S1 through Sm, with the use of a correction coefficient which is set based on properties of liquid crystal. Thus found is a corrected video signal in accordance with a positive or negative polarity. This makes it possible to find, with less memory capacity, an optimum corrected video signal in accordance with a polarity of a voltage to be applied to a data signal line.

Abstract: A liquid crystal display includes a liquid crystal display panel including a plurality of data lines, a plurality of gate lines crossing the plurality of data lines, and a plurality of liquid crystal cells, a timing controller to determine gray levels of input digital video data and a time when a polarity of a data voltage to be supplied to the data lines is inverted, and to generate a dynamic charge share control signal when the gray level of the data voltage is changed from a white gray level to a black gray level and the polarity of the data voltage is inverted, a data driving circuit to convert the digital video data from the timing controller into the data voltage, changing the polarity of the data voltage, and supplying any one of a common voltage and a charge share voltage to the data lines in response to the dynamic charge share control signal, and a gate driving circuit to sequentially supply scan pulses to the gate lines under the control of the timing controller.

Abstract: A liquid crystal display includes a timing controller to activate a dynamic charge share control signal to indicate a time at which the gray level of the data voltage is changed from a white gray level to a black gray level and a time at which the polarity of the data voltage is inverted, and to activate a dot inversion control signal for widening a horizontal polarity inversion period of data voltages to be supplied to the data lines when a weakness patterns are input, and a data driving circuit supplying one of a common voltage and a charge share voltage to data lines only when the gray level of data is changed from the white gray level to the black gray level and when the polarity of the data voltage in response to the dynamic charge share control signal.

Abstract: A liquid-crystal display apparatus comprising, a liquid-crystal display device driven by an AC voltage, an image divider configured to temporally divide input image data into N (N?2) for each frame, a correction unit configured to correct a driving voltage for driving the liquid-crystal display device based on a difference between adjacent divided image data obtained by the N division, a polarity inverter configured to invert a polarity to make drive polarities of adjacent divided image data different, out of the divided image data obtained by the N division including the divided image data for which driving voltage is corrected by the correction unit, a driver configured to drive the liquid-crystal display device using the polarity-inverted divided image data, and an inversion order alteration unit which alters an inversion order for the drive polarities.

Abstract: The present invention provides a method for driving a backlight module of a liquid crystal display. The backlight module includes three light sources, a first light source, a second light source, and a third light source, that illuminate different color light respectively. The method includes sequentially turning on the three light sources, wherein the first light source and the second light source are turned on twice and the third light source is turned on once.

Abstract: A source driving circuit includes a source driver circuit, an intermediate voltage generator, and a switching control unit. The source driver circuit receives display data and generates a source driving voltage corresponding to the received display data The intermediate voltage generator generates an intermediate source driving voltage. The switching control unit receives a plurality of control signals for selectively applying the source driving voltage and the intermediate source driving voltage to data lines of a display as a driving voltage and controls an order of transition to final levels of a common electrode voltage and the driving voltage. The common electrode voltage may be applied to a common electrode of a liquid crystal capacitor coupled to the data line of the display.

Abstract: A liquid crystal display (LCD) device and a method for driving the LCD device are disclosed. The LCD device includes a frame rate adjusting circuit for controlling a frame rate to be maintained at a 1-fold rate in frame periods other than an Nth frame period (“N” is a multiple of 8 or more), while being increased to an “i”-fold-accelerated rate (“i” is a positive integer of 2 or more) in the Nth frame period, to output reference timing signals in the frame periods other than the Nth frame period, and to output accelerated timing signals in the Nth frame period, a timing controller for generating data and gate timing control signals, based on at least one of each reference timing signal and each accelerated timing signal, and a logic circuit for accelerating a frequency of a polarity control signal in the Nth frame period.

Abstract: A display apparatus according to the present invention is provided with a matrix-type liquid crystal panel and a switching liquid crystal panel, the matrix-type liquid crystal panel and the switching liquid crystal panel assembled together. In the display apparatus, a polarity of a voltage applied on an electrode pair of the switching liquid crystal panel is inverted once in substantially one vertical period or in one or more vertical period. With this arrangement, it is possible to reduce a number of bright line or dark line. This attains display quality improvement and power consumption reduction.

Abstract: A 2D/3D image display device including a display unit with a plurality of gate lines, a plurality of data lines, and a plurality of pixels, the plurality of gate lines crossing the plurality of data lines, and the plurality of pixels being coupled to the plurality of gate lines and the plurality of data lines; and a controller for receiving an input signal and setting a first driving frequency or a second driving frequency according to the input signal. An image of one frame operating according to the second driving frequency receives and displays the same image data for each of a first period and a second period, a video signal transmitted to one of the plurality of pixels for the first period has first polarity, and a video signal transmitted to one of the plurality of pixels for the second period has second polarity.

Abstract: An output enable signal transformation device for a gate driver in an LCD device includes a reception terminal coupled to a timing generator of the LCD device for receiving an enable synchronization signal, an enable clock signal and a plurality of enable control signals generated by the timing generator, a shift register module coupled to the reception terminal for shifting the enable synchronization signal according to the enable clock signal, a multiplexer module coupled to the shift register module and the timing generator for generating a plurality of output enable signals according to the enable synchronization signal and the plurality of enable control signals, and an output terminal coupled to the multiplexer module and a logic circuit of the gate driver for outputting the plurality of output enable signals to the logic circuit.

Abstract: A display is disclosed having crossover connections effecting polarity inversion. The display includes a panel comprising a subpixel repeating group having an even number of repeating subpixels in a first direction. The display also includes a driver circuit coupled to the panel to provide image data signals effecting polarity inversion to the panel. The display also includes a plurality of crossover connections from the driver circuit to the columns of the panel such that polarities of same color subpixels in the first direction alternate at a spatial frequency sufficient to abate undesirable visual affects on the panel when an image is displayed thereon; each crossover connection applying the same polarity to each subpixel in the column.

Abstract: A display device includes a processor for outputting a most-significant m-bit data from an n-bit data and one of a plurality of patterns indicative of first and second locations of a first modulation data in first and second consecutive frames, respectively, in accordance with least significant (n?m) bits of the n-bit data, and a data driver for generating a gray scale value corresponding to the most significant m-bit data and modulating the gray scale value in accordance with the one of the plurality of the patterns, wherein the number of the first location increases at different ratios based on the gray scale.

Abstract: A device for driving data used for a liquid crystal display includes: a first latch circuit and a second latch circuit for forming first latched data and second latched data; a first regulating circuit and a second regulating circuit for regulating the first latched data or the second latched data; a first switch, a second switch, a third switch and a fourth switch respectively coupled between the first latch circuit or the second circuit and the first regulating circuit or the second regulating circuit. The first and the second latched data become a first pair of differential signals when the first switch and the fourth switch are turned on. The first and the second latched data become a second pair of differential signals which are opposite to the first pair of differential signals when the second switch and the third switch are turned on.

Abstract: The present invention relates to an active matrix display device including a plurality of pixels and a source driver (23) which supplies image data (VIDEO), which has been externally supplied, to the plurality of pixels. Each of the plurality of pixels has: a data storing section (30) for storing the image data supplied from the source driver (23); a latch circuit (40) which latches, at a predetermined timing (LP signal), the image data which is stored in the data storing section (30); and a polarity reversing circuit (50) for reversing a polarity of the image data which is latched by the latch circuit (40). The image data, whose polarity is reversed by the polarity reversing circuit (50), is written into the each of the plurality of pixels. This makes it possible to improve a display quality by eliminating a difference of write time per pixel between frames.

Abstract: A display panel is scanned every two lines during a period of binary writing area in the first half of one frame period in partial display (or in small gradation display) and a steady-state current of an output amplifier for buffering gradation signals supplied to the display panel in a non-scanning period in the second half of one frame period is reduced.

Abstract: An electrooptic device includes 1) row groups of pixels that are made black during successive first precharge periods that are next to row groups of pixels to which a voltage corresponding to the gray level is written during successive first writing periods, 2) row groups of pixels that are made black during successive second precharge periods that are next to row groups of pixels to which a voltage corresponding to the gray level is written during successive second writing periods, and 3) row groups of pixels that are made black during successive first precharge periods that are next to row groups of pixels that are made black during successive second precharge periods.

Abstract: A liquid crystal display for changing a supply sequence of a scanning pulse with which a plurality of gate lines are supplied to realize a one dot inversion, and a driving method thereof are disclosed. In the liquid crystal display, a liquid crystal display panel has a plurality of data lines and a plurality of gate lines, which are crossed each other, and pixels, which are defined by the lines. A gate driver supplies scanning pulses to the gate lines, and changes a supply sequence of the scanning pulses for each frame. A data driver converts digital video data into data voltages and periodically inverts a polarity of the data voltages to supply the data voltages in accordance with a supply sequence of the scanning pulses.

Abstract: A liquid crystal display includes a liquid crystal display panel, a timing controller to generate a dynamic charge share control signal to indicate a time at which the gray level of a data voltage is changed from a white gray level to a black gray level and a time at which the polarity of the data voltage is inverted, and to detect weakness patterns and generate a dot inversion control signal for widening a horizontal polarity inversion time of data voltages when the weakness patterns are input, wherein the liquid crystal display panel includes first and second liquid crystal cell groups whose polarity is inverted every 2 frame periods, and a polarity inversion time of the first liquid crystal cell group and a polarity inversion time of the second liquid crystal cell group overlap.