Abstract: A shift register driven by two complementary clock signals is integrated on an active-matrix substrate of a flat screen for controlling selection of rows of image points of the flat screen is disclosed. The shift register includes a control transistor driven by one of the clock signals, and connected between this clock signal and an output node connected to a corresponding row. The shift register also includes a capacitor connected between an internal node connected to the gate of the control transistor. The output node is discharged each time the flat screen starts.

Abstract: A display device, including a substrate; an array of pixels arranged in rows and columns forming a light-emitting area over the substrate, each pixel including a first electrode, one or more layers of light-emitting material located over the first electrode, and a second electrode located over the one or more layers of light-emitting material; a first serial buss having a plurality of electrical conductors, each electrical conductor connecting one chiplet in a first set of chiplets to only one other chiplet in the first set in a serial connection, the chiplets being distributed over the substrate in the light-emitting area, each chiplet including one or more store-and-forward circuits for storing and transferring data connected to its corresponding electrical conductor; and a driver circuit in each chiplet for driving at least one pixel in response to data stored in the store-and-forward circuit.

Abstract: A display device includes a plurality of shift register sections, each being configured to sequentially generate a sampling pulse for writing a video signal into a pixel, wherein each of the plurality of shift register sections includes an even number of shift registers, and wherein one sampling pulse is generated by each of the plurality of shift register sections, and substantially all of the sampling pulses are generated on the basis of either the rising edges of a clock signal or the falling edges of a clock signal, whichever is selected in advance.

Abstract: The present invention aims to reduce flickers of the liquid crystal display device and enable the use of liquid crystal material exhibiting a high response speed, and to enhance light usage efficiency of the field sequential type liquid crystal display device. After writing the video signal to all the pixels in each sub-frame period, a correction voltage signal or an alternating signal having a frequency of greater than or equal to a certain frequency is input to the data line, so that the magnitude of the leakage current of each pixel TFT caused by the difference in polarity of the video signal with respect to the opposing electrode written to the pixel electrode is equalized, and the flickers are greatly reduced.

Abstract: A liquid crystal display (LCD) device includes a data drive circuit that inverts polarities of data every 2k horizontal periods (k is an integer not less than 2); and an LCD panel including a plurality of data lines and a plurality of gate lines crossing each other to define a plurality of pixels, each pixel including a switching device, wherein source electrodes of the switching devices in the pixels arranged in a vertical direction are connected to two different data lines.

Abstract: A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a liquid crystal display panel including data lines and gate lines crossing each other and liquid crystal cells, a timing control signal generating unit, a data drive circuit supplying a data voltage to the data lines, and a gate drive circuit. The timing control signal generating unit generates a first gate timing control signal for controlling a scan direction of the liquid crystal display panel in a sequential direction and a second gate timing control signal for controlling the scan direction in a reverse sequential direction. The gate drive circuit supplies a gate pulse to the gate lines while a shift direction of the gate pulse changes in response to the first and second gate timing control signals.

Abstract: A liquid crystal display device includes a display portion having a first substrate, a second substrate opposing to the first substrate, a liquid crystal layer held between the first and second substrates, and a plurality of pixels arranged in a delta shape. A plurality of pixel electrodes are respectively connected to signal lines extending in a first direction via a switch. The switch is controlled by scanning lines extending in a second direction which orthogonally crosses the first direction. The signal lines extend in a space between the pixel electrodes in a meandering shape in the second direction, and two kinds of color pixels are connected with a common signal line in turn via the pixel switch.

Abstract: In a liquid crystal display device according to one embodiment of the present invention, when the polarities of the source signal voltages do not change over a plurality of horizontal scanning periods, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row rises before the source signal voltages change to values that correspond to pixels along the jth row. Next, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row falls, and then the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row (j?k) rises. The polarities of the storage capacitor signal voltages applied to storage capacitor bus lines that correspond to sub-pixels of pixels along the jth row are inverted after the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row rises.

Abstract: A scan driving apparatus includes a first driving apparatus connected to a plurality of scan lines and a second driving apparatus connected to the plurality of scan lines. Wherein when one of the first driving apparatus and the second driving apparatus is in a scan enable state such that the plurality of scan lines are applied with a scan signal, the other is in a floating state such that the output terminal is floated. The scan driving apparatus according to the present invention has the function of a shift register for sequentially applying the scan signals and may apply a scan signal of a different waveform which is additionally required. The output terminal of the scan driving apparatus is floated in a period in which a different waveform is necessary such that a scan signal having the different waveform may be applied without influence of the scan signal, thereby realizing a complicated scan signal.

Abstract: A display apparatus includes a first sub-pixel and a second sub-pixel. The first sub-pixel and the second sub-pixel are electrically and respectively connected to a first gate line and a second gate line adjacent to each other and are electrically connected to a data line. The display apparatus further includes a connection line disposed between sub-pixel electrodes of the first and second sub-pixels. The connection line has two ends connected to the data line and serves as an additional or alternative path for transmitting a data signal that is transmitted by the data line.

Abstract: A display panel includes at least twelve sub-pixels, arranged continuously in a row. In a scanning time of the display panel, sub-pixels respectively disposed at a 2nd, 3rd, 5th, 8th, 10th and 12th column have a first polarity, and sub-pixels respectively disposed at a 1st, 4th, 6th, 7th, 9th and 11th column have a second polarity. The first polarity is opposite to the second polarity.

Abstract: A liquid crystal display and a driving method thereof are provided. The liquid crystal display includes: a liquid crystal display panel including a plurality of data lines, a plurality of gate lines crossing the data lines, and pixels arranged in m×n matrix; a register for defining polarity pattern information, frame rotation information, and line rotation information to determine a polarity of a data voltage charged in N lines, wherein N is a positive integer less than n; a timing controller for generating a polarity control signal to control polarities of data voltages charged in n lines of the liquid crystal display panel based on the information read from the register; and source drive ICs for converting the polarities of the data voltages supplied to the data lines in response to the polarity control signal.

Abstract: In a liquid crystal display device performing multi-picture element driving, gate OFF timing of a switching element connected between each sub picture element and a signal line is matched with phase timing when all the subsidiary capacity wires are at the same potential. This prevents the occurrence of uneven luminance appearing in a lateral streak.

Abstract: A liquid crystal display device includes a liquid crystal display panel (LCD panel), an area light source device which illuminates the LCD panel, a driving unit which drives the LCD panel and the area light source device, and a control unit which controls the driving unit. The LCD panel includes display pixels. The area light source device includes plural kinds of light sources which are successively turned on in one frame period. The control unit includes means for controlling the driving unit in a manner to execute video signal write and reset signal write after the video signal write, in a period in which one of the plural kinds of light sources is turned on in the one frame period. The video signal write and the reset signal write are executed with the same polarity, and a polarity of potential of the display pixels is reversed between frame periods.

Abstract: A liquid crystal display device includes a liquid crystal display panel including a plurality of data lines to which a data voltage is supplied, a plurality of gate lines to which a gate pulse is supplied, and a plurality of liquid crystal cells, a data drive circuit to invert a polarity of the data voltage in response to a polarity control signal and to output the data voltage to the data lines in response to a source output enable signal, a gate drive circuit to supply the gate pulse to the gate lines, and a POL/SOE logic circuit to invert the polarity control signal for every frame period except at Nth-multiple frame period (where N is a positive integer), wherein the POL/SOE logic circuit controls the polarity control signal at every Nth-multiple frame period such that the polarity of the data voltage is the same as the previous frame period and controls a pulse width of the source output enable signal at every Nth-multiple frame period to be longer than for the other frame periods.

Abstract: A method of removing offsets between channels of a liquid crystal panel is provided. The method includes: alternately arranging first type output buffers and second type output buffers for driving the pixels in units of at least two rows of the pixels; and arranging the first type output buffers and the second type output buffers in units of at least two columns of the pixels so that the output buffers with types opposite to those of previous two columns are arranged. The second type output buffers are embodied by switching connections among the differential transistors and connections among the load transistors in the first type output buffers.

Abstract: A display device includes: a display area including a plurality of pixels, where each of the pixels includes m subpixels; and a plurality of data lines connected to the pixels, where 2n pixels of the pixels define an inversion reference group, where 2mn subpixels in the inversion reference group are applied with data voltages of a same polarity, and where each of n and m is a natural number.

Abstract: Systems and methods are disclosed to correct for image degraded signals on a liquid crystal display panel are disclosed. Panels that comprise a subpixel repeating group having an even number of subpixels in a first direction may have parasitic capacitance and other signal errors due to imperfect dot inversion schemes thereon. Techniques for signal correction and localizing of errors onto particular subpixels are disclosed.

Abstract: A circuit and method for driving a line repair amplifier includes a line repair amplifier which can be driven by using a single side input which can use an amplifier which drives a gray high side only and an amplifier which drives a gray low side only separately in a liquid crystal display device which uses a line repair amplifier.

Abstract: A liquid crystal display for automatically adjusting a swing of a gamma reference voltage which is used for determining a gray scale level of a frame that is driven with a doubled frame frequency in real time is disclosed. In the liquid crystal display, a frequency converter doubles a frame frequency of an inputted frame to generate a doubled odd numbered frame and a doubled even numbered frame. A timing controller generates a gamma swing control signal which controls a swing of a gamma reference voltage which is used for determining gray scale levels of the doubled odd numbered frame and the doubled even numbered frame.

Abstract: In one embodiment of the present invention, a display for receiving m-bit display data includes a display driver including a switched capacitor digital/analogue converter including an n-bit input, where m is not greater than n. The upper plates of the capacitors of the switched capacitor digital/analogue converter may be connected, in the zeroing phase, to one of a plurality of reference voltages. The choice of which reference voltage is connected to the upper plates of the capacitors of the switched capacitor digital/analogue converter in the zeroing phase is independent of the input n-bit digital code, and is determined by a signal internal to the display. The output voltage range from the converter in a decoding phase may be a first range in which output voltages are above and below one reference voltage or it may be a second range in which output voltages are above and below another reference voltage, depending on which reference voltage was selected in the preceding zeroing phase.

Abstract: A timing controller of an LCD panel is provided. The timing controller, for controlling a plurality of source drivers and a plurality of gate drivers of the LCD panel, includes a data processing module for generating a data signal carrying image data and black data, and a control signal generating module for generating a plurality of horizontal start signals, a first gate enable signal and a second gate enable signal. The horizontal start signals are for controlling the inputting of the data signals into the source drivers. The first and second gate enable signals correspond to different enable timings, and are selectively outputted to the gate drivers.

Abstract: A method is arranged to process a frame for an LCD with a modified polarity pattern. The pattern employs a polarity reversal scheme that results in line inversion and/or dot inversion patterns that are observable by pixel locations within the frame. The drive polarity for the column drivers in the LCD is toggled according to the modified polarity pattern. The scanning sequence for each row on the display is modified for cooperation with the pattern. A first subframe is scanned during a first interval while applying a first set of drive polarities. A second subframe is scanned during a second interval that is non-overlapping with the first time interval. The application of the method enables the column drivers in the LCD to operate with reduced power while retaining the benefits of line and dot inversion techniques.

Abstract: An exemplary liquid crystal display (1) includes a first substrate assembly (11), a second substrate assembly (12) parallel to the first substrate assembly (11), a liquid crystal layer (13) sandwiched between the first substrate assembly and the second substrate assembly, and a discharging circuit (120). The first substrate assembly includes common electrodes (110) formed thereat. The common electrodes are parallel to each other. The second substrate assembly includes scanning lines (1211) that are parallel to each other and that each extends along a first direction, and signal lines (1212) that are parallel to each other and that each extends along a second direction orthogonal to the first direction. The discharging circuit is electrically connected with the common electrodes.

Abstract: The liquid crystal display device includes a liquid crystal panel including a common voltage correction unit that obtains predominant-polarity data based on polarities of image data to be supplied to pixel cells arranged in an nth one of pixel rows, obtains predominant-polarity data based on polarities of image data to be supplied to pixel cells arranged in an (n+1)th one of the pixel rows adjacent to the nth pixel row, obtains a sum of the two predominant-polarity data, and selects and outputting any one of a plurality of predetermined correction values based on the sum, and a common voltage output unit that corrects a common voltage based on the correction value from the common voltage correction unit and supplies the corrected common voltage to a common electrode.

Abstract: A liquid crystal display device comprises a display area including a plurality of pixels arranged in a matrix. A driving unit to drive the plurality of pixels each having a pixel switch is connected to signal lines and scan lines. An auxiliary capacitance voltage is interposed to a pixel electrode connected to the pixel switch through auxiliary capacitance lines arranged along the pixels in a row direction. The driving unit includes an auxiliary capacitance line driving circuit to supply a first voltage, a second voltage smaller than the first voltage and a third voltage smaller than the second voltage to the auxiliary capacitance lines. The voltage difference between the first voltage and the second voltage is smaller than that between the second voltage and the third voltage.

Abstract: A liquid crystal display is disclosed.

Abstract: A liquid crystal display device and a method of driving the same are disclosed. The liquid crystal display device includes a liquid crystal display panel including data lines, gate lines crossing the data lines, and liquid crystal cells arranged in a matrix format at each of crossings of the data lines and the gate lines; a data drive circuit that converts digital video data into a positive/negative data voltage using gamma reference voltages to supply the positive/negative data voltage to the data lines; and a gamma voltage adjusting unit that increases a potential of each of the gamma reference voltages during a blanking period when a polarity of the positive/negative data voltage is inverted.

Abstract: The present invention discloses a transmitted/received data decoding method and apparatus, which achieve effects of decoding performance improvement and synchronous detection. The decoding method includes setting a coded edge pattern, and filtering a received data by using the set coded edge pattern as a window; respectively computing absolute values of filtered values filtered by using the coded edge pattern windows; detecting a maximum absolute value from the computed absolute values; determining a sign (+/?) for the detected maximum absolute value; outputting an intermediate bit value of the corresponding original data as a resultant decoded value according to the determined sign and a window type (i.e. coded edge patter) with the selected maximum absolute value.

Abstract: In a method of the invention for driving a display device including (i) a scanning line driving circuit for line sequentially selecting scanning signal lines and (ii) a signal line driving circuit including an output circuit for supplying electric currents, the signal line driving circuit configured to sequentially supply data signals to corresponding pixels on a selected scanning signal line via the output circuit and data signal lines, the method includes (i) outputting, in response to horizontal synchronization and vertical synchronization signals, a horizontal synchronization control signal shorter in cycle than the horizontal synchronization signal and outputting a vertical synchronization control signal, (ii) performing scanning for supplying the data signals to all pixels on the scanning signal lines within one vertical period defined by the vertical synchronization control signal and (iii) performing capacity control lowering capacity of the output circuit after the scanning has finished within the si

Abstract: A drive circuit of a liquid crystal display device performs line inversion drive based on a correction video signal V. A look-up table (12) includes two types of tables having stored therein correction values for use in overshoot drive. Based on a current-frame video signal X, a previous-frame video signal Y stored in a frame memory (11), and a polarity-reversing signal REV, a correction process portion (13) reads a correction value from the look-up table (12), and outputs the correction value being read as the correction video signal V. In such a manner, a correcting circuit (10) is used to control the degree of overshoot in accordance with the polarity-reversing signal REV. Thus, it is possible to suitably control the change in pixel brightness regardless of the polarity of the applied voltage, thereby preventing any fringes from being generated while displaying moving images.

Abstract: A liquid crystal display including a liquid crystal display panel including a plurality of data lines, a plurality of gate lines intersecting the data lines, and liquid crystal cells respectively formed at intersections of the data lines and the gate lines, and divided into a first area, a second area and a third area, a first data integrated circuit (IC) that drives the first area, a second data IC that drives the second area, a third data IC that drives the third area, and a timing controller that analyzes an input digital video data, generates a first selection signal and a second selection signal for controlling whether charge sharing is used, and independently controls the first, second, and third data ICs using the first and second selection signals, wherein the second area is divided into a first block adjoining the first area, a third block adjoining the third area and a second block located between the first block and the third block; and the first selection signal controls whether the charge sharing

Abstract: A driving device that outputs signals of different polarities from plural output terminals includes: a first power source wire that connects power terminals of some of plural first output circuits each outputting a signal of one polarity and power terminals of some of plural second output circuits each outputting a signal of the other polarity; and a second power source wire that connects power terminals of the rest of the plural first output circuits and power terminals of the rest of the plural second output circuits, the second power source wire being different from the first power source wire.

Abstract: A drive circuit for driving a display panel includes a first operation amplifier for operating using a first power source voltage and a second power source voltage; a second operation amplifier for operating using a third power source voltage and a fourth power source voltage; a control unit for supplying a first control voltage and a second control voltage; and a switch circuit for switching the first operation amplifier and the second operation amplifier. The switch circuit includes an n-channel type field effect transistor. The control unit applies the first control voltage to the n-channel type field effect transistor, so that the n-channel type field effect transistor transits from a non-conductive state to a conductive state.

Abstract: A clock signal, a data signal, and a latch signal are commonly supplied from a controller to a plurality of the data drivers. The data signal and the latch signal are synchronized with the clock signal. In each of the data drivers, an internal latch signal is generated in synchronization with the clock signal in response to the latch signal. Timing of a rising edge of the internal latch signal is independently controlled in each data driver in accordance with position information where each data driver is arranged.

Abstract: A pixel circuit is disclosed that includes a video mode, a memory mode and an inversion mode of operation. The pixel circuit includes a pixel storage node for storing data to be output by a liquid crystal cell, a pixel write circuit configured to receive display data and provide the display data to the pixel storage node for storage thereon. Further, the pixel circuit includes a hold circuit operatively coupled to the pixel write circuit and configured to minimize leakage of charge from the pixel storage node through the pixel write circuit, and an internal inversion circuit operatively coupled to the hold circuit and the pixel storage node and configured to invert a voltage of the data stored on the pixel storage node and a voltage applied to a liquid crystal cell that receives data stored on the pixel storage node.

Abstract: This document relates to a liquid crystal display capable of improving picture quality by compensating for difference in charge between liquid crystal cells. The liquid crystal display comprises a liquid crystal display panel; a gate driving circuit; a charge difference compensation circuit configured to generate, in a specific gray level range, analog positive gamma voltages having a first reference level and analog negative gamma voltages having a second reference level in synchronization with a first scan time at which a first gate line is driven, and generate the analog positive gamma voltages having a first compensation level that is lower than the first reference level and the analog negative gamma voltages having a second compensation level that is higher than the second reference level in synchronization with a second scan time at which a second gate line is driven; and a data driving circuit.

Abstract: Display bright in contrast can be obtained without discrination and flicker in the display device of the direct vision type whose pixel pitches are short to 20 ?m or less. A liquid crystal panel is driven through the frame inverse driving method, and the vertical frame frequency is set to 120 Hz or more. Also, each of the pixels is arranged to correspond to one of R, G and B of color filters disposed on a TFT substrate side.

Abstract: It is possible to implement impulse display in a hold type display device while suppressing an increase in complexity of a drive circuit and an increase in operation frequency. In an active matrix type liquid crystal display device of a dot-inversion drive scheme which is configured such that adjacent source lines are short-circuited during a predetermined period Tsh every horizontal scanning period, a gate driver applies a pulse for turning on a TFT in a pixel forming section, as a scanning signal G(j) (j=1 to m) to be provided to each scanning signal line as follows. In each, frame period, a pixel data write pulse Pw is sequentially applied to gate lines GL1 to GLm and a black voltage application pulse Pb is applied during the above-described predetermined period Tsh which is after the lapse of a period (Thd) of the order of a ? frame from the application of the pixel data write pulse Pw to each gate line GLj. The present invention is suitable for use in an active matrix type liquid crystal display device.

Abstract: The present invention is applied to, for example, a liquid crystal display in which a driving circuit is integrally formed on an insulating substrate, and after a sampling capacitor C3 is charged with a reference current I1 and a gate-source voltage Vgs of a transistor Q14 due to the reference current I1 is set in the sampling capacitor C3, the transistor Q14 is driven to function as a constant current circuit, by the voltage Vgs of the sampling capacitor C3.

Abstract: The liquid crystal display device includes a liquid crystal display panel including first sub-pixels for charging a data of a polarity opposite to a prior horizontal period, and second sub-pixels for charging a data of a polarity identical to a prior horizontal period; a data driver for driving a plurality of data lines of the liquid crystal display panel; and a timing controller for dividing a charging period of the data into a plurality of charging periods, generating at least one compensation data for compensating a data on at least one of the plurality of charging periods, and supplying the at least one compensation data to the data driver.

Abstract: A method for driving a display panel includes generating data signals to drive pixels in the display panel. The pixels in the display panel are arranged in a matrix. In addition, the voltage values of the data signals are adjusted to render a sum of voltage values of the data signals in a unit area as zero.

Abstract: A backlight unit, with a parallel configuration of plural lamps, having improved reliability is disclosed. The backlight unit driver includes: first and second lamps connected parallel to each other; a DC/AC inversion portion inverting a DC voltage into an AC voltage to apply the AC voltage to the lamps; a transformer transforming the AC voltage from the DC/AC inversion portion; a positive polarity AC signal compensator compensating an electric current difference between the first and second lamps using positive polarity AC signals from the first and second lamps; and a negative polarity AC signal compensator compensating the electric current difference between the first and second lamps using negative polarity AC signals from the first and second lamps.

Abstract: A display device for displaying an image may include display and control sections. The display section, provided by a liquid crystal display (LCD), may be configured to display the image with a luminance in accordance with a display signal voltage, the display section including pixels, each pixel in the LCD including first and second subpixels connected to same source and gate lines. The control section may be configured to divide each frame into first to m-th subframe periods, m being an integer greater than or equal to two, the control section configured to generate first to m-th display signals for the subframe periods for output to the display section such that dividing each frame into the subframe periods does not change a sum luminance output of the display section within each frame. The control section may create a difference between luminances of the first and second subpixels.

Abstract: A display panel with half source driver structure and a display data supplying method thereof are disclosed. The display panel includes a plurality of gate driving circuits, a data line, a plurality of first gate lines and second gate lines, a plurality of first pixels and second pixels. The first pixels are arranged along the data line and form two columns. The first pixels are disposed at one side of the data line and electrically coupled to the respective first gate lines. The second pixels are arranged along the data line and form two columns. The second pixels are disposed at an opposite side of the data lines and electrically coupled to the respective second gate lines. The data line has a bending portion between each two sequentially connected first pixels. The gate driving circuits are electrically coupled to the first gate lines and the second gate lines.

Abstract: A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a liquid crystal display panel including data lines, gate lines crossing the data lines, and liquid crystal cells and having a quad type pixel structure in which red, green, blue, and white subpixels constitute one pixel, a logic circuit sequentially outputting polarity control signals, a data drive circuit that inverts a polarity of a data voltage in response to the polarity control signals to supply the data voltage with the inverted polarity to the data lines, and a gate drive circuit sequentially supplying gate pulses to the gate lines. A logic level of each of the polarity control signals is inverted every three horizontal periods, and phases of the polarity control signals are different from one another.

Abstract: A liquid crystal display comprising: a receiver for receiving power and differential signal; a backlight power supply which supplies the power to a backlight unit; a power-off sensor which senses power-off of the backlight power supply and distorts one of the differential signals; and a controller which senses the distortion of the differential signal and generates an after-image removing gray-scale signal.

Abstract: A method of driving an electro-optical device having scanning lines, data lines, a switching transistor and a pixel electrode. The device also has an electro-optical layer interposed between the pixel electrode and a counter electrode. The method includes: supplying a data signal alternate between a positive and a negative voltage to the pixel electrode. The positive voltage has a potential greater than a counter electrode potential applied to the counter electrode and the negative voltage is a potential lower than the counter electrode potential; setting the counter electrode potential to reduce a flicker; supplying a first voltage that is either the positive or negative voltage to the pixel electrode in a first period; the other voltage to the pixel electrode in a second period. A ratio of the first period to the second period is variable.

Abstract: A method for improving an image quality of a liquid crystal display (LCD) device includes receiving an input image, generating a plurality of consecutive pictures of a predefined period number according to the input image, wherein a gray level of the input image is greater than a gray level of the plurality of contiguous pictures, setting a number of pixels required for adding a value among the plurality of contiguous pictures for every display element according to a least significant bits (LSB) of a pixel of the input image, and enforcing the number of add-value pixels of a positive polarity closes the number of add-value pixels of a negative polarity according to the number of add-value pixels in each of the plurality of consecutive pictures and the polarity of the corresponding display element.

Abstract: A liquid crystal drive device (200) is configured so that a source driver (20) or a common driver (30) performs voltage application using a power voltage VDDH prior to voltage application using a boosted voltage 2VDDH upon application of a source voltage VS and high-level transition of a common voltage VCOM.