With Amplifier Patents (Class 348/300)
  • Patent number: 9723240
    Abstract: A computational sensing array includes an array of sensing elements. In each sensing element, a first signal is generated from a transducer. A second signal is produced by a collection unit in response to receiving the first signal. The second signal may be modified, in a conditioning unit. A sensing element preprocessing unit generates a word representing the value of the modified second signal, and may produce an indication of change of the first signal. A current value of the word may be stored in a state holding element local to the sensing element, and a previous value of the word may be retained in a further state holding element local to the sensing element.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: August 1, 2017
    Assignee: The Johns Hopkins University
    Inventors: Charbel G. Rizk, Philippe O. Pouliquen, Andreas G. Andreou, Joseph H. Lin
  • Patent number: 9716848
    Abstract: Provided is an imaging apparatus including an imaging element including a pixel unit having first and second photoelectric conversion units configured to generate image signals by photoelectrically converting optical fluxes passing through different regions into which an exit pupil of an imaging optical system is divided for one micro-lens. The imaging apparatus controls each of the timing of a first removal operation of removing a noise component from a first image signal read from the first photoelectric conversion unit and the timing of a second removal operation of removing a noise component from a second image signal read from the first and second photoelectric conversion units to have a predetermined relationship with a frequency of a noise source occurring during an operation of reading the image signals.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: July 25, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yasuhiro Harada
  • Patent number: 9661249
    Abstract: An image capturing apparatus includes: plural pixels arranged in matrix, each outputting a signal from a photoelectric conversion element; and plural readout circuits each provided for a corresponding column of the pixels, signals from the pixels being input to the readout circuits. The readout circuit includes an amplifier unit configured to amplify the signal from the pixel, and have a variable gain, and a hold capacitance connected to an output terminal of the amplifier unit via a sampling switch, and having a variable capacitance value. When the variable gain of the amplifier unit is set to be a first gain, the variable capacitance value of the hold capacitance is set to be a first capacitance value. When the variable gain is set to be a second gain larger than the first gain, the variable capacitance value is set to be a second capacitance value smaller than the first capacitance value.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: May 23, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hideo Kobayashi
  • Patent number: 9635298
    Abstract: An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the inverting input terminal and having the other terminal connected to the output terminal; a first capacitor which has one end connected with the inverting input terminal; a first signal input terminal which is another end of the first capacitor; and a second signal input terminal which selectively inputs either one of a fixed voltage and a comparing signal into the non-inverting input terminal.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: April 25, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hideo Kobayashi, Hiroki Hiyama, Kazuo Yamazaki
  • Patent number: 9627428
    Abstract: An image sensor includes a first semiconductor chip, a second semiconductor chip and connecting portions configured to connect the first semiconductor chip and the second semiconductor chip. The first semiconductor chip includes a photoelectric conversion portion, a capacitor, a reset transistor, and an amplification transistor. The second semiconductor chip includes a transfer transistor, and a row selecting transistor. The connecting portions connect the photoelectric conversion portion to the transfer transistor, the transfer transistor to the capacitor, and the amplification transistor to the row selecting transistor respectively.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: April 18, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiyuki Takada
  • Patent number: 9601536
    Abstract: A solid-state image capturing apparatus, comprising a plurality of photoelectric conversion portions disposed in a first semiconductor region of a first conductivity type, a first portion of the first conductivity type disposed in the first semiconductor region and configured to supply a first potential to the first semiconductor region, and a second semiconductor region of a second conductivity type configured to receive a second potential, wherein the first portion is disposed between first and second photoelectric conversion portions neighboring each other, and the second semiconductor region is disposed between the first portion and each of the first and second photoelectric conversion portions.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: March 21, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventor: Michiko Johnson
  • Patent number: 9549158
    Abstract: A single pixel sensor is provided, comprising a photo sensor configured to convert light into proportional signals; a charge storage configured to accumulate, repeatedly, a plurality of the signals converted by the photosensor; a first transistor coupled between a pixel voltage terminal and the photosensor; a second transistor coupled between the photosensor and the charge storage; and a readout circuit coupled between the charge storage and an output channel, wherein: the single pixel sensor is configured to carry out the repeated accumulations of signals multiple times per each readout by the readout circuit, the single pixel sensor is configured to synchronously convert reflections of light emitted by an associated illuminator or to convert light emitted by non-associated flickering light sources, and wherein the single pixel sensor is backside illuminated by the light.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: January 17, 2017
    Assignee: BRIGHTWAY VISION LTD.
    Inventors: Yoav Grauer, David Ofer, Eyal Levi
  • Patent number: 9542302
    Abstract: A system includes an intervening server, an information processing apparatus, and an image forming apparatus. The information processing apparatus i) sends debug command information including a debug command and a first identifier to the intervening server, ii) periodically requests for operation log information including an operation log and a second identifier to the intervening server, iii) receives the operation log information, and iv) stores the operation log associated with the debug command, if the first identifier matches with the second identifier. The image forming apparatus i) periodically requests for the debug command information to the intervening server, ii) receives the debug command information, iii) acquires the operation log of an application in response to the debug command, and iv) sends, to the intervening server, the operation log information including the operation log and the second identifier included in the debug command information.
    Type: Grant
    Filed: February 22, 2014
    Date of Patent: January 10, 2017
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Changsong Sun
  • Patent number: 9521351
    Abstract: Signals representative of total photocharge integrated within respective image-sensor pixels are read out of the pixels after a first exposure interval that constitutes a first fraction of a frame interval. Signals in excess of a threshold level are read out of the pixels after an ensuing second exposure interval that constitutes a second fraction of the frame interval, leaving residual photocharge within the pixels. After a third exposure interval that constitutes a third fraction of the frame interval, signals representative of a combination of at least the residual photocharge and photocharge integrated within the pixels during the third exposure interval are read out of the pixels.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: December 13, 2016
    Assignee: Rambus Inc.
    Inventors: Jay Endsley, Thomas Vogelsang, Craig M. Smith, Michael Guidash, Alexander C. Schneider
  • Patent number: 9501712
    Abstract: Device for edge detection and quality enhancement in an image which comprises a grouping of identical and locally interconnected elementary processing cells. Each processing cell is characterized in turn by a comparator which carries out in parallel the comparison of each pair of neighboring pixels. The threshold voltage which establishes the difference in voltage between pixels considered to be part of an edge is determined by means of a temporary adjustment of a control signal. This adjustment, along with that of the filtering control signal, also temporary in nature, are the only ones necessary for configuring the required processing. No external analog control signals are required making it easier to program the hardware by the device which is used and reducing the number of digital/analog converters of the final system.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: November 22, 2016
    Assignees: Universidad de Sevilla, Consejo Superior de Investigaciones Cientificas
    Inventors: Jorge Fernandez Berni, Angel Rodrigez Vazquez, Ricardo Carmona Galan
  • Patent number: 9401118
    Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: July 26, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung-Man Kim, Hong-Woo Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Jong-Hyuk Lee
  • Patent number: 9374539
    Abstract: An image pickup circuit including a plurality of circuit blocks. Each of the plurality of circuit blocks includes a plurality of comparing elements, a single counter, and a plurality of storage units. Each of the comparing elements compares a pixel signal supplied through a vertical signal line connected to vertically aligned pixels in a plurality of pixels arranged in a matrix, and a slope signal whose voltage is changed from an initial voltage at a constant slope. The counter counts an elapsed time since a voltage of the slope signal starts to change from the initial voltage. Each of the storage units stores a count value obtained by the counter in accordance with a comparison result of the comparator, the count value corresponding to an elapsed time until the voltage of the slope signal is changed from the initial voltage to a voltage coinciding with the pixel signal.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: June 21, 2016
    Assignee: Sony Corporation
    Inventor: Shigetaka Kudo
  • Patent number: 9356056
    Abstract: A solid-state imaging device including a semiconductor substrate; plural photoelectric conversion units formed side by side on the semiconductor substrate to form a light receiving unit; a peripheral circuit formed in a portion on an outside of the light receiving unit on the semiconductor substrate; a wiring section formed on the light receiving unit and formed for connecting the plural photoelectric conversion units and the peripheral circuit; and a dummy wiring section formed on an opposite side of the wiring section for at least one photoelectric conversion unit among the plural photoelectric conversion units on the light receiving unit and formed for functioning as a non-connected wiring section not connected to the photoelectric conversion units and the peripheral circuit, wherein the dummy wiring section has a predetermined potential.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: May 31, 2016
    Assignee: Sony Corporation
    Inventor: Kimihiko Sato
  • Patent number: 9305946
    Abstract: A photoelectric conversion apparatus includes a plurality of pixels arranged in a matrix, a plurality of signal processing units each corresponding to a column of the matrix, and a signal line. Each of the plurality of signal processing units includes a first capacitance and a second capacitance that hold a signal, a switch provided between the signal line and the first capacitance, a capacitance adjustment unit electrically connected to the second capacitance, and a connection unit configured to electrically connect the first capacitance provided to one of signal processing units to the second capacitance provided to another one of the signal processing units.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: April 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tatsuya Ryoki, Kazuki Ohshitanai
  • Patent number: 9287148
    Abstract: A system and method for dynamic heating of a workpiece during processing is disclosed. The system includes an ion source and a plurality of LEDs arranged in an array, which are directed at a portion of the surface of the workpiece. The LEDs are selected so that they emit light in a frequency range that is readily absorbed by the workpiece, thus heating the workpiece. In some embodiments, the LEDs heat a portion of the workpiece just before that portion is processed by an ion beam. In another embodiment, the LEDs heat a portion of the workpiece as it is being processed. The LEDs may be arranged in an array, which may have a width that is at least as wide as the width of the ion beam. The array also has a length, perpendicular to its width, having one or more rows of LEDs.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: March 15, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan D. Evans, Kevin Anglin, D. Jeffrey Lischer, William T. Weaver, Jason M. Schaller, Robert Brent Vopat
  • Patent number: 9282271
    Abstract: A solid-state imaging apparatus comprising a plurality of pixels generating a photoelectric conversion signal, a column amplifying unit corresponding to columns of the pixels, for outputting a first and second signals generated by amplifying the photoelectric conversion signal at a smaller first gain and larger second gain respectively, an analog to digital converter (21) for converting the first and second signals from an analog signal to a digital signal, a comparing unit (224) for inputting the digital signal from the analog to digital converter, level-shifting into the same gain level the first and second signals converted by the analog to digital converter, and thereafter detecting a gain error between the level-shifted first and second signals, and a correction unit (226) for correcting the first and second signals based on the gain error.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: March 8, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiji Hashimoto, Kazuyuki Shigeta
  • Patent number: 9277113
    Abstract: An image pickup apparatus includes an image pickup unit including a plurality of photoelectric conversion elements provided correspondingly to each of microlenses arranged two-dimensionally, reads out a first signal through addition from the photoelectric conversion elements corresponding to the microlense, reads out a second signal from one of the photoelectric conversion elements corresponding to the microlense, and sets one of a first and second read-out modes to read signals from the image pickup unit in accordance with a photographing condition, wherein the first and second read-out modes differ in read-out density of the second signal in a read-out area in accordance with one of a thinning-out rate and an addition rate of a area from which the second signal is read out being different as compared to a area from which the first signal is read out.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: March 1, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideki Ikedo, Takafumi Kishi
  • Patent number: 9270894
    Abstract: An imaging apparatus disclosed herein includes: a solid-state imaging device in which pixels are arranged in a matrix; a mechanical shutter; and a signal processing unit, wherein the signal processing unit: resets charge stored in all the pixels by closing the mechanical shutter and applying a voltage V2 to a photoelectric conversion unit; starts first exposure by opening the mechanical shutter and applying a voltage V1 to the photoelectric conversion unit; finishes the first exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a first still image; resets all the pixels; starts second exposure by applying the voltage V1 to the photoelectric conversion unit with the mechanical shutter open; finishes the second exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a second still image.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takahiro Yamamoto, Yoshiyuki Matsunaga, Takayuki Ota
  • Patent number: 9270912
    Abstract: A solid state imaging device with (a) an amplifier transistor; an input node for the amplifier transistor; or both the amplifier transistor and the input node for the amplifier transistor; (b) a plurality of photoelectric conversion elements; (c) a like plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and (d) a like plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to a common output, the common output being either the amplifier transistor or the input node for the amplifier transistor.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: February 23, 2016
    Assignee: SONY CORPORATION
    Inventor: Toshiyuki Nishihara
  • Patent number: 9231021
    Abstract: An image pickup apparatus includes a semiconductor substrate, and multiple pixels. Each of the multiple pixels includes a photoelectric-conversion unit disposed in the semiconductor substrate, a first conductive first semiconductor region disposed in the semiconductor substrate, which holds charge generated by the photoelectric-conversion unit at a place different from the photoelectric-conversion unit, a first transfer unit which transfers charge to the first semiconductor region, and a second transfer unit which transfers charge held at the first semiconductor region. The first semiconductor region includes a first portion, a second portion, and a third portion. At the depth where the third portion is disposed, the first portion is disposed between the third portion and first transfer unit, and the second portion is disposed between the third portion and second transfer unit. Impurity concentration of the third portion is lower than that of the first and second portions.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: January 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Masahiro Kobayashi, Yuichiro Yamashita
  • Patent number: 9222838
    Abstract: A detection device includes a heat sensing element, a detection circuit connected to a detection node of the heat sensing element, and a read circuit connected to a read node of the detection circuit, wherein the detection circuit includes a drive transistor whose gate is controlled by the detection node. In a program period the detection node is programmed to a voltage value corresponding to the threshold voltage of the drive transistor, and in a read period following the program period the read circuit reads the detection result of the detection circuit.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: December 29, 2015
    Assignee: Seiko Epson Corporation
    Inventor: Hiroshi Horiuchi
  • Patent number: 9224767
    Abstract: In a photoelectric conversion apparatus including a plurality of pixels arranged in a matrix, each pixel including a photoelectric conversion unit, first and second holding units that hold electric charge, a first transfer unit that connects the photoelectric conversion unit and the first holding unit, a second transfer unit that connects the first and second holding units, and a third transfer unit that connects the photoelectric conversion unit and a power supply, each pixel is controlled so that the potential of the third transfer unit for electric charge held in the photoelectric conversion unit is higher than that of the first transfer unit at least during a charge accumulation period of the pixel, and thereafter, the potential of the third transfer unit is higher than that of the photoelectric conversion unit while the potentials of the first and second transfer units are lower than that of the photoelectric conversion unit.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: December 29, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Ginjiro Toyoguchi, Yuichiro Yamashita, Takeshi Kojima
  • Patent number: 9210348
    Abstract: A solid-state imaging device including a semiconductor substrate; plural photoelectric conversion units formed side by side on the semiconductor substrate to form a light receiving unit; a peripheral circuit formed in a portion on an outside of the light receiving unit on the semiconductor substrate; a wiring section formed on the light receiving unit and formed for connecting the plural photoelectric conversion units and the peripheral circuit; and a dummy wiring section formed on an opposite side of the wiring section for at least one photoelectric conversion unit among the plural photoelectric conversion units on the light receiving unit and formed for functioning as a non-connected wiring section not connected to the photoelectric conversion units and the peripheral circuit, wherein the dummy wiring section has a predetermined potential.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: December 8, 2015
    Assignee: Sony Corporation
    Inventor: Kimihiko Sato
  • Patent number: 9179084
    Abstract: According to one embodiment, a pixel array unit has pixels for accumulating photoelectric-converted charges arranged in a matrix in a row direction and a column direction; a column ADC circuit calculates, based on results of comparison between pixel signals read from the pixels and a reference voltage, AD-converted values of the pixel signals in each of columns; vertical signal wires transmit the pixel signals read from the pixels in each of the columns to the column ADC circuit; and a load circuit is dispersed in the row direction and forms source follower circuits with the pixels to read pixel signals from the pixels in each of the columns to the vertical signal wires.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: November 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroaki Yamaoka
  • Patent number: 9116040
    Abstract: A pixel comprises a photodetector and a control circuit. The pixel is provided with an output terminal designed to connect an analysis circuit. The photodetector is configured to have two different operating modes associated with different biasing conditions. A switch connecting the photodetector to the output terminal of the pixel and a circuit for a connecting/disconnecting the control circuit with the output terminal of the pixel and with the photodetector allow to switch between the two operating modes. A comparator compares the voltage across the capacitive load with respect to a threshold value and outputs first and second signals according to the comparison. The comparator is connected to the circuit for connecting/disconnecting the control circuit and to the switch.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: August 25, 2015
    Assignee: SOCIETE FRANCAISE DE DETECTEURS INFRAROUGES—SOFRADIR
    Inventors: Alexandre Maltere, Laurent Rubaldo
  • Patent number: 9100597
    Abstract: A multi-spectrum photosensitive device and method for sampling the same, the method includes a first combining process for combining-and-sampling two adjacent pixels in same row different column, or in different row same column, or in different row different column in the pixel array to obtain a sampling data of a first combined pixel; a second combining process for combining-and-sampling the sampling data of the first combined pixel obtained from the first combining unit to obtain a sampling data of a second combined pixel; and a third combining process, a sampling data of a third combined pixel is obtained by a method for color conversion and image scaling in a digital space. The application is applied for a multi-pixel sharing reading and amplifying circuit of a single-layer color photosensitive chip, a single-sided multi-layer photosensitive chip, and a double-sided double-layer photosensitive chip.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: August 4, 2015
    Assignee: BOLY MEDIA COMMUNICATIONS (SHENZHEN) CO., LTD.
    Inventor: Xiaoping Hu
  • Patent number: 9094629
    Abstract: An image pickup apparatus includes a pixel generating a signal by photoelectric conversion, a comparator comparing the signal based on the pixel with a reference signal varied with time, a counter performing counting until the comparator outputs a signal indicating that a relationship in magnitude between the signal based on the pixel and the reference signal is reversed, and a control unit. The comparator includes a first amplifier receiving the reference signal at a first input portion and the signal based on the pixel at a second input portion to compare the signal based on the pixel with the reference signal. The control unit sets a bandwidth of the comparator to a first bandwidth when the reference signal varies at a first rate of change and to a second bandwidth when the reference signal varies at a second rate of change.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: July 28, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Koji Ishibashi
  • Patent number: 9083908
    Abstract: A solid-state imaging apparatus including a plurality of pixels each including: a first holding portion for holding signal carriers from a photoelectric conversion portion; an amplifying portion for amplifying and reading a signal based on the signal carriers generated in the photoelectric conversion portion; and a carrier discharging control portion for discharging charge carriers in the photoelectric conversion portion to an OFD region, and having a carrier path between the photoelectric conversion portion and the first carrier holding portion, in which the solid-state imaging apparatus further includes a second carrier holding portion electrically connected with the first carrier portion in parallel through a first transfer unit, when viewed from an output node of the photoelectric conversion portion, thereby smoothing an movie imaging without causing discontinuous frame while suppressing generation of noise mixing into the charge carrier holding portion.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuichiro Yamashita, Masahiro Kobayashi, Takanori Watanabe, Shinsuke Kojima, Takeshi Ichikawa, Yusuke Onuki
  • Patent number: 9046614
    Abstract: An X-ray detector contains a layer of photosensitive material and an N×M array of photo-detector diodes disposed in the photosensitive material. Each of the diodes has a bias potential interface and a diode output interface. The bias potential interface is connected to a bias potential. The X-ray detector further has an N×M array of high gain, low noise readout unit cells, one readout unit cell for each diode. Each cell contains an input interface connected to the diode output interface, a high-gain voltage amplifying device having an integration capacitor, a first switch in parallel to the integration capacitor and a sample/hold capacitor disposed between a second switch and third switch. The sample/hold capacitor is connectable to the voltage amplifying device via the second switch and is connectable to a signal output line. A multiplexer contains a row select and a column select circuit allowing access to each readout cell unit.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: June 2, 2015
    Assignee: Paul Scherrer Institut
    Inventor: Bernd Schmitt
  • Publication number: 20150146060
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 28, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi SUZUKI, Yasutoshi AIBARA
  • Publication number: 20150138410
    Abstract: A method of controlling a pixel array includes reading out image data from pixel cells of a row i of the of the pixel array with second transfer control signals that are coupled to be received by transfer transistors included in the pixels cells of the row of the of the pixel array that is being read out. Exposure times for pixel cells are independently controlled in other rows of the pixel array that are not being read out with first transfer control signals coupled to be received by transfer transistors included in the pixel cells in the other rows of the of the pixel array that are not being read out while the image data is read out from the pixel cells of row i of the pixel array.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Tiejun Dai, Jian Guo
  • Publication number: 20150138411
    Abstract: An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the inverting input terminal and having the other terminal connected to the output terminal; a first capacitor which has one end connected with the inverting input terminal; a first signal input terminal which is another end of the first capacitor; and a second signal input terminal which selectively inputs either one of a fixed voltage and a comparing signal into the non-inverting input terminal.
    Type: Application
    Filed: October 17, 2014
    Publication date: May 21, 2015
    Inventors: Kohichi Nakamura, Hideo Kobayashi, Hiroki Hiyama, Kazuo Yamazaki
  • Patent number: 9036064
    Abstract: A solid-state imaging device in the present disclosure includes a semiconductor substrate, pixels, and column signal lines. Each of the pixels includes an amplifying transistor, a selection transistor, a reset transistor, and a photoelectric converting unit. The photoelectric converting unit includes a photoelectric converting film, a transparent electrode, a pixel electrode, and an accumulation diode. The pixel electrode and the accumulation diode are connected to a gate of the amplifying transistor. The amplifying transistor has a source connected to the column signal line and a drain connected to a power source line. The reset transistor has a source connected to the pixel electrode. The selective transistor is provided between the source of the amplifying transistor and the column signal line. A threshold voltage of the amplifying transistor is lower than a voltage of the accumulation diode.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: May 19, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shigetaka Kasuga, Motonori Ishii
  • Publication number: 20150130976
    Abstract: A solid-state imaging apparatus wherein pixels have same color filter in a same row, and have different color filters in different rows; and a color selecting unit selects and outputs, in an order of colors, the signals held by the plurality of holding units, to meet: y=ax+(b/c?d)x, wherein the pixels are arranged at a pitch “x” in a same row direction, and arranged at a pitch “y” in a same column direction, the “a” is a first coefficient equal to or larger than 1, the “b” is a shift of a charge accumulation period of the pixels in one row from a charge accumulation period of the pixels in a row adjacent to the one row, the “c” is a period of outputting the signals from the selecting unit, the signals generated by the plurality of pixels and the “d” is a second coefficient that is equal to or larger than 0 and equal to or less than 0.15.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 14, 2015
    Inventor: Satoshi Kato
  • Publication number: 20150124134
    Abstract: An image pickup apparatus that makes it possible to achieve both high picture quality and a wide dynamic range is provided. Each pixel unit included in the image pickup apparatus includes: four photodiodes; four transfer transistors; a charge storage portion (four floating diffusions) for storing electric charges generated at the photodiodes; an amplification transistor; a select transistor; and a reset transistor. The image pickup apparatus further includes multiple coupling transistors. Each coupling transistor couples together the charge storage portions of two pixel units of the pixel units. A scanning circuit switches on or off the coupling transistors according to read mode.
    Type: Application
    Filed: January 7, 2015
    Publication date: May 7, 2015
    Inventors: Zenzo SUZUKI, Katsumi DOSAKA
  • Patent number: 9025062
    Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first circuit section, a second circuit section, and a stacked structure in which the first and second circuit sections are bonded, wherein the first circuit section has the pixel array unit disposed therein, and wherein the second circuit section has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: May 5, 2015
    Assignee: Sony Corporation
    Inventors: Shimon Teshima, Kenichi Shigenami, Akihiko Miyanohara, Shoji Kobayashi
  • Publication number: 20150109503
    Abstract: A solid-state imaging device according to the present disclosure includes pixels arranged two-dimensionally, each of the pixels including: a metal electrode; a photoelectric conversion layer that is on the metal electrode and converts light into an electrical signal; a transparent electrode on the photoelectric conversion layer; an electric charge accumulation region that is electrically connected to the metal electrode and accumulates electric charges from the photoelectric conversion layer; an amplifier transistor that applies a signal voltage according to an amount of the electric charges in the electric charge accumulation region; and a reset transistor that resets electrical potential of the electric charge accumulation region, in which the reset transistor includes a gate oxide film thicker than a gate oxide film of the amplifier transistor.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 23, 2015
    Inventors: Mitsuyoshi MORI, Hirohisa OHTSUKI, Yoshiyuki OHMORI, Yoshihiro SATO, Ryohei MIYAGAWA
  • Patent number: 9013610
    Abstract: An apparatus comprises a readout circuit configured to be disconnected from a pixel output, and to connect a pixel reset signal received by the readout circuit to a pixel output signal received by the readout circuit. The apparatus also comprises at least one programmable gain amplifier coupled with the readout circuit. The apparatus further comprises an analog-to-digital converter coupled with the programmable gain amplifier. The readout circuit is configured to be calibrated based on a comparison of a measured output of the readout circuit to a predetermined value, the predetermined value being equal to (2n/2)?1, where n is the number of bits of the analog-to-digital converter.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: April 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Sheng Chou, Calvin Yi-Ping Chao, Kuo-Yu Chou, Honyih Tu, Yi-Che Chen
  • Publication number: 20150103218
    Abstract: A solid-state imaging device and a camera system are disclosed. The solid-state imaging device includes a pixel unit and a pixel signal readout circuit. The pixel signal readout circuit includes a plurality of comparators disposed to correspond to a pixel column array, and a plurality of counters. Each counter includes a first amplifier, a second amplifier, and a mirror circuit to from a current mirror in parallel with the second amplifier. The first amplifier includes differential transistors, initializing switches connected between gates and collectors of the differential transistors, and first and second capacitors connected to each of the gates of the differential transistors. The second amplifier includes an initializing switch and a third capacitor. The mirror circuit includes a gate input transistor whose gate is inputted with a voltage sampled by the first amplifier or a voltage sampled by the second amplifier.
    Type: Application
    Filed: December 19, 2014
    Publication date: April 16, 2015
    Inventor: Kenichi Tanaka
  • Publication number: 20150103219
    Abstract: A pixel unit included in a sensor chip includes: a first pixel connected to a first feedback amplifier which is connected to a first column signal line as an input line and a first reset drain line as an output line; and a second pixel connected to a second feedback amplifier which is connected to a second column signal line as an input line and a second reset drain line as an output line. A drain of a reset transistor of the first pixel is connected to the first reset drain line, a drain of a reset transistor of the second pixel is connected to the second reset drain line, a source of an amplifying transistor of the first pixel is connected to the first column signal line, and a source of an amplifying transistor of the second pixel is connected to the second column signal line.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 16, 2015
    Inventors: Shigetaka KASUGA, Motonori ISHII
  • Patent number: 9007252
    Abstract: An analog to digital conversion method includes charging a capacitor through an analog signal to sample a voltage of the analog signal; coupling the capacitor and a plurality of reference voltages to a comparator when a voltage of the capacitor is equal to the voltage of the analog signal, to compare the voltage of the capacitor with the reference voltages and generate a first comparison result; coupling the capacitor to a ramp generator when a status of the first comparison result changes, to compare a ramp signal of the ramp generator with a voltage difference of a first reference voltage and the voltage of the capacitor and generate a second comparison result; obtaining a voltage of the ramp signal when a status of the second comparison result changes; and obtaining a digital code of the analog signal according to the first reference voltage and the voltage of the ramp signal.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: April 14, 2015
    Assignee: NOVATEK Microelectronics Corp.
    Inventor: Jer-Hao Hsu
  • Patent number: 9007503
    Abstract: A solid-state imaging element includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: April 14, 2015
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Patent number: 9001246
    Abstract: An imaging apparatus includes a pixel unit, an amplifying transistor, and a control unit. The pixel unit includes a first photoelectric conversion unit generating a first charge based on incident light of a first color, a second photoelectric conversion unit generating a second charge based on incident light of the first color, and a third photoelectric conversion unit generating a third charge based on incident light of a second color. The amplifying transistor is provided in common to the first to third photoelectric conversion units, and outputs a signal based on the first, second, and third charges generated by the first, second, and third photoelectric conversion units, respectively. The control unit sets the pixel unit to a selected state or a non-selected state according to an electric potential of a control terminal of the amplifying transistor.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: April 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Tomoyuki Noda, Takeshi Akiyama, Kazumichi Morita, Kazuhiro Sonoda, Takuro Yamamoto
  • Patent number: 9001247
    Abstract: A method drives an imaging system including: a plurality of pixels; an amplifier having an input node connected to the plurality of pixels via an input capacitor, and an output node connected to the input node via a feedback capacitor; and a reset unit configured to reset the input node to a base potential. The method includes the steps of: causing the input capacitor to hold noise output from one of the plurality of pixels; adding signals output from the two or more pixels in the feedback capacitor; and obtaining a difference between a signal applying a gain to a base signal output from the amplifier according to the reset of the input node of the amplifier and the signal added in the feedback capacitor.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: April 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Yasushi Matsuno
  • Publication number: 20150092094
    Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.
    Type: Application
    Filed: December 9, 2014
    Publication date: April 2, 2015
    Inventors: Kazuichiro Itonaga, Shizunori Matsumoto
  • Patent number: 8994863
    Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell (30) includes two pixels (31) and (32). Upper and lower photoelectric converters (33) and (34), transfer transistors (35) and (36) connected to the upper and lower photoelectric converters, respectively, a reset transistor (37), and an amplifying transistor (38) form the two pixels (31) and (32). A full-face signal line 39 is connected to the respective drains of the reset transistor (37) and the amplifying transistor (38). Controlling the full-face signal line (39), along with transfer signal lines (42) and (43) and a reset signal line (41), to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.
    Type: Grant
    Filed: January 11, 2010
    Date of Patent: March 31, 2015
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Nobuo Nakamura, Tomoyuki Umeda, Keiji Mabuchi, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Patent number: 8987667
    Abstract: Embodiments relate to systems and methods for image lag mitigation for a buffered direct injection readout circuit with current mirror. A photo detector device is coupled to a buffered direct injection (BDI) circuit, in which an operational amplifier and other elements communicate the output signal from the detector to subsequent stages. The BDI output is transmitted to a first current mirror, which can be implemented as a Säckinger current mirror. The first current mirror is coupled to a second current mirror, one of whose outputs is a fixed bias current. Image lag can be controlled by the fixed bias current, rather than the photocurrent produced directly by the optical detector. In aspects, the negative feedback provided by the first current mirror can increase the modulation of the second current mirror. This gain factor can reduce image lag to a significantly lower point than the lag experienced by known BDI-current-modulated readout circuitry without Säckinger current mirror.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Sensors Unlimited, Inc.
    Inventor: Minlong Lin
  • Patent number: 8988575
    Abstract: A back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device 32 in which micro pads 34, 37 are formed on the wiring layer side and a signal processing chip 33 having micro pads 35, 38 formed on the wiring layer at the positions corresponding to the micro pads 34, 37 of the MOS solid-state image pickup device 32 are connected by micro bumps 36, 39. In a semiconductor module including the MOS type solid-state image pickup device, at the same time an image processing speed can be increased, simultaneity within the picture can be realized and image quality can be improved, a manufacturing process can be facilitated, and a yield can be improved. Also, it becomes possible to decrease a power consumption required when all pixels or a large number of pixels is driven at the same time.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventors: Keiji Mabuchi, Shunichi Urasaki
  • Publication number: 20150077605
    Abstract: A solid-state imaging apparatus improving a read-out speed and a noise-reduction rate comprises: a photoelectric conversion portion configured to convert light into an electric charge; a floating diffusion portion configured to convert the electric charge into a voltage; a transfer transistor configured to transfer the electric charge converted by the photoelectric conversion portion to the floating diffusion portion; an amplifying transistor configured to amplify the voltage of the floating diffusion portion; a selecting transistor configured to output the voltage amplified by the amplifying transistor to an output line; and a switch provided between the output line and a current source, wherein the selecting transistor and the switch are held at an OFF state, during a period of a transition of the transfer transistor from an OFF state to an ON state and during a period of a transition of the transfer transistor from the ON state to the OFF state.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 19, 2015
    Inventors: Hideaki Takada, Toshiaki Ono
  • Publication number: 20150077606
    Abstract: A pixel includes: a photoelectric conversion unit that photoelectrically converts incident light and has an upper electrode, a lower electrode, and a photoelectric conversion film interposed between the upper electrode and the lower electrode; an amplifying transistor that outputs a signal according to an amount of a signal charge generated in the photoelectric conversion unit; a charge transfer line that connects the lower electrode and the amplifying transistor; and an output line that outputs the signal from the amplifying transistor, wherein at least a part of the output line is disposed to overlap the lower electrode without another line interposed therebetween.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Inventors: Hirohisa OHTSUKI, Akira TANAKA, Ryohei MIYAGAWA