Abstract: According to one embodiment, the pixel driving circuit causes the amplifying transistor to form a source follower circuit without applying a bias voltage to the vertical signal line and connects the FD to the power source. Thereafter, the pixel driving circuit separates the current source from the vertical signal line to cancel the source follower circuit, applies a bias voltage to the vertical signal line so that the voltage of the FD is raised when the brightness of the subject is higher than the reference value, and the voltage of the FD is lowered when the brightness of the subject is lower than the reference value, and turns on the read transistor. The pixel driving circuit turns off the read transistor, and then connects the current source to the vertical signal line, and causes the amplifying transistor to form the source follower circuit.

Abstract: A signal for focus detection is generated by a first operation, in which a signal of at least one photoelectric conversion element included in a photoelectric conversion unit is read to an input node of an amplification unit and the signal is supplied to a common output line by the amplification unit and signals for forming an image are generated by a second operation, in which a signal of another photoelectric conversion element included in the same photoelectric conversion unit as that including the at least one photoelectric conversion element from which the signal has been read in the first operation is read to the input node of the amplification unit while holding the signal read in the first operation using the amplification unit and the signals are supplied to the common output line by the amplification unit.

Abstract: An image pickup apparatus that makes it possible to achieve both high picture quality and a wide dynamic range is provided. Each pixel unit included in the image pickup apparatus includes: four photodiodes; four transfer transistors; a charge storage portion (four floating diffusions) for storing electric charges generated at the photodiodes; an amplification transistor; a select transistor; and a reset transistor. The image pickup apparatus further includes multiple coupling transistors. Each coupling transistor couples together the charge storage portions of two pixel units of the pixel units. A scanning circuit switches on or off the coupling transistors according to read mode.

Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: A solid-state imaging device includes a pixel array unit having a plurality of pixels arranged in a matrix form which perform a photoelectric conversion, a pixel signal readout unit having a logic unit and performing a readout of a pixel signal from the pixel array unit, a regulator, a first chip, a second chip, and a stacked structure in which both the first chip and the second chip are bonded, wherein the first chip has the pixel array unit disposed therein, and wherein the second chip has at least the logic unit and the regulator disposed therein, wherein the regulator includes a reference voltage generation, a plurality of output stage transistors, and an operational amplifier comparing the reference voltage and a commonized output voltage, and an output path of the output stage transistors are connected to a single node, and then is fed back to the operational amplifier.

Abstract: A data conversion/output device includes a number of sensors, voltage-time conversion circuits that are arranged adjacent to respective sensors and change output levels upon the lapse of times corresponding to output voltage values from the sensors after a conversion operation start point in order to convert for voltage outputs of the sensors into times. The device also includes sensed data generation circuits outputting, as digital data, lapse times until the output levels of the voltage-time conversion circuits change after a conversion start point. The sensed data generation circuits include a counter for counting a clock signal. An operation start of the voltage-time conversion circuits and a start of count operation of the counter are staggered.

Abstract: Disclosed herein is a comparator including: a first input sampling capacitance; a second input sampling capacitance; an output node; a transconductance (Gm) amplifier as a differential comparator section configured to receive a slope signal, a signal level of the slope signal changing with a slope, at one input terminal of the Gm amplifier via the first input sampling capacitance, and receive an input signal at another input terminal of the Gm amplifier via the second input sampling capacitance, and subject the slope signal and the input signal to comparing operation; and an isolator configured to hold a voltage of an output section of the Gm amplifier constant, the isolator being disposed between the output section of the Gm amplifier and the output node.

Abstract: An image sensing apparatus comprises a pixel and a driving unit, wherein the driving unit includes a buffer circuit including a first PMOS transistor and a first NMOS transistor, and letting V3 be a voltage supplied to a gate of the first NMOS transistor to supply a transfer signal for turning off the transfer MOS transistor to the transfer control line, V4 be a voltage supplied to a gate of the first PMOS transistor to supply a transfer signal for turning on the transfer MOS transistor to the transfer control line, Vthp1 be a threshold voltage of the first PMOS transistor, and Vthn1 be a threshold voltage of the first NMOS transistor, (V2+Vthn1)<V3<V1 and V2<V4<(V1+Vthp1) are satisfied.

Abstract: A solid-state imaging apparatus includes a reference signal generating circuit for supplying, commonly to the plurality of A/D conversion circuits, at least two reference signals of which signal levels change toward different directions of electric potential, and the A/D conversion circuit includes an amplifier; an input capacitor having one terminal receiving the analog signal and the reference signal supplied from the reference signal generating circuit, and the other terminal connected to one input terminal of the amplifier; a feedback capacitor connected between the one input terminal and an output terminal of the amplifier; a comparator for comparing, with a comparing level, an output from the output terminal of the amplifier; and a connection capacitor having one terminal connected to the output terminal of the amplifier, and the other terminal connected to one input terminal of the comparator.

Abstract: A method of manufacturing a solid-state image sensor having a photoelectric conversion portion includes forming a silicon nitride film by a low-pressure chemical vapor deposition method using hexachlorodisilane (Si2Cl6) as a material gas such that the silicon nitride film covers at least a part of the photoelectric conversion portion.

Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.

Abstract: A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied data is then compared with a predetermined data. The image data from the second super row is readout into the counter. If the multiplied data is larger than the predetermined data, the multiplied data from the first super row is stored in the counter. If not, the image data from the second super row is stored. Other embodiments are also described.

Abstract: In an A/D converter, a first analog signal which is input to an input terminal in a state in which the input terminal and a reference voltage line are connected via a first capacitor is converted into digital data when a reference signal is supplied to the reference signal line in a state in which the reference signal line and a first input terminal of a comparator are connected via the first capacitor. A second analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via a second capacitor is converted into digital data when the reference signal is supplied to the reference signal line in a state in which the reference signal line and the first input terminal of the comparator are connected via the second capacitor.

Abstract: An imaging array having a plurality of pixels is disclosed. Each pixel includes a photodetector that converts light to charge, a floating diffusion node, a first amplification stage connected to the floating diffusion node, and a select gate that connects the pixel to a second amplification stage. The first and second amplification stages form a current mirror. The first amplification stage includes a buried channel device. In one aspect of the present invention, the current minor has an overall voltage gain of between 0.9 and 1.1. In another aspect of the invention, the second amplification stage is shared by a plurality of pixels.

Abstract: Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.

Abstract: The solid-state imaging device having pixels that are arranged in rows and columns and convert optical signals to electric signals to output the electric signals as voltage signals includes column signal lines each provided for a corresponding one of the columns and transmitting, in the direction of the columns, voltage signals outputted from the pixels, current sources each provided for and connected to a corresponding one of the column signal lines, column amplification circuits each provided for a corresponding one of the column signal lines and amplifying the voltage signals transmitted through the column signal lines, a current-source ground potential supply line supplying the current sources with ground potential, and a column amplification circuit ground potential supply line supplying the column amplification circuits with ground potential.

Abstract: A solid-state image pickup device includes a pixel array unit that includes photoelectric conversion elements and in which a plurality of pixels are arranged in rows and columns that output, as pixel signals, electrical signals obtained by photoelectric conversion performed by amplifier elements to which pixel power supply voltage is supplied and that drive signal lines, a pixel power supply unit that generates the pixel power supply voltage from power supply voltage, the pixel power supply voltage being lower than the power supply voltage, and that supplies the pixel power supply voltage to the amplifier elements in the plurality of pixels, and a pixel signal read unit that reads pixel signals from the plurality of pixels.

Abstract: A solid-state image pickup device includes a plurality of common output lines receiving signals from a plurality of pixels, a plurality of column amplifier units amplifying the signals, a plurality of storage capacitors storing the amplified signals, a first transistor controlling electrical conduction between the output node of the column amplifier unit and the input node of a storage capacitor, a switch switching current for operating the column amplifier unit between a first current and a second current smaller than the first current, and a controller inhibiting, while the second current is flowing through the column amplifier unit, a potential at the output node of the column amplifier unit from approaching an off-state voltage supplied to a gate of the first transistor in an OFF state of the first transistor.

Abstract: An image sensor in which one unit structure includes a plurality of photo-electric conversion units, a floating diffusion, a plurality of transfer transistors which are arranged in correspondence with the plurality of photo-electric conversion units so as to transfer charges respectively converted by the plurality of photo-electric conversion units to the floating diffusion, a source-follower amplifier which outputs a voltage signal according to a charge amount of the floating diffusion, and a reset transistor which resets the plurality of photo-electric conversion units and the floating diffusion, and a plurality of unit structures are two-dimensionally arranged in a row direction and a column direction, the image sensor comprising a control unit which divides the plurality of unit structures into a plurality of groups, and controls the transfer transistors for each divided group.

Abstract: A solid-state imaging apparatus includes a pixel outputting a pixel signal; and an amplifier for amplifying the pixel signal. The amplifier includes an input capacitor connected between an input terminal of the operational amplifier and the pixel, a feedback capacitor connected between the input and output terminals of the amplifier, an initializing switch connected between the input terminal and the output terminal of the amplifier, a first capacitor connected in parallel to the feedback capacitor, a second capacitor connected in parallel to the feedback capacitor, a first switch connected between an one terminal of the feedback capacitor and an one terminal of the first capacitor, and a second switch connected between the one terminal of the first capacitor and an one terminal of the second capacitor. One terminal of the first or second capacitor is connected to the one terminal of the second capacitor through the first and second switches.

Abstract: The present invention includes operational amplifier for an active pixel sensor that detects optical energy and generates an analog output that is proportional to the optical energy. The active pixel sensor operates in a number of different modes including: signal integration mode, the reset integration mode, column reset mode, and column signal readout mode. Each mode causes the operational amplifier to see a different output load. Accordingly, the operational amplifier includes a variable feedback circuit to provide compensation that provides sufficient amplifier stability for each operating mode of the active pixel sensor. For instance, the operational amplifier includes a bank of feedback capacitors, one or more of which are selected based on the operating mode to provide sufficient phase margin for stability, but also considering gain and bandwidth requirements of the operating mode.

Abstract: An object of the present invention is to provide an imaging system capable of improving S/N ratio and increasing dynamic range and a method of driving the imaging system suited to the improvement and increase. An imaging system includes: a solid-state imaging device having a plurality of pixels arranged in a matrix, column amplifiers each corresponding to each of columns of the pixels and an output portion for outputting an image signal based on an amplification by the column amplifier; and a signal processing portion receiving the image signal, wherein the column amplifier amplifies a signal output from the pixel by a gain q larger than 1, and the signal processing portion multiplies, by a factor less than 1, the image signal based on the signal amplified by the gain q.

Abstract: Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.

Abstract: A pipelined readout method in an image sensor includes receiving one or more signals from a pixel of a row of a pixel array into a column storage at least partially during a time that a previously sampled amplified output of the column storage that is based on signals provided by a previous pixel of a previously read out row of the pixel array is converted from analog to digital by an analog-to-digital conversion circuit. The method further includes performing, by the analog-to-digital conversion circuit, analog-to-digital conversion of a sampled amplified output of the column storage that is based on the one or more signals from the pixel at least partially during a time that the column storage receives at least one signal from a another pixel of a subsequently read out row of the pixel array.

Abstract: Photosensitive cells each includes a photodiode (1), a transfer gate (2), a floating diffusion layer portion (3), an amplifying transistor (4), and a reset transistor (5). Drains of the amplifying transistors (4) of the photosensitive cells are connected to a power supply line (10), and a pulsed power supply voltage (VddC) is applied to the power supply line (10). Here, a low-level potential (VddC_L) of the power supply voltage has a predetermined potential higher than zero potential. Specifically, by making the low-level potential (VddC_L) higher than channel potentials obtained when a low level is applied to the reset transistors (5), or channel potentials obtained when a low level is applied to the transfer gates (2), or channel potentials of the photodiodes (1), a reproduced image with low noise is read.

Abstract: A high-speed, high-resolution column A/D converter having a noise reduction function to eliminate a fixed pattern noise etc. is provided with a small circuit scale. Each column A/D converter includes a dual-output D/A converter for selecting two reference voltages from among a reference voltage group supplied in common to each column A/D converter, so as to output the two reference voltages to sandwich each sensor signal voltage input to each column A/D converter, along with a charge-redistribution D/A converter having a full scale determined by the above two reference voltages. Thus, the high-speed, high-resolution column A/D converter is achieved with a small circuit scale. Further, by the utilization of high-speed conversion capability, noise reduction is performed through digital calculation after the A/D conversion.

Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: The invention relates to an image sensor, in particular to a CMOS sensor, having a plurality of light sensitive pixels arranged in rows and columns for the generation of output signals proportional to the exposure, wherein column lines are associated with the columns to supply the output signals to at least one column amplifier for amplification, wherein the at least one column amplifier cooperates with the column lines such that the amplification of the respective output signal depends on the capacitance of the respective column line.

Abstract: An imaging apparatus and a method of driving the same that can generate a digital data of a high resolution pixel signal are provided. The imaging apparatus includes: a pixel (10-1) for generating a signal by photoelectric conversion; a comparing circuit (30-1) for comparing a signal based on the pixel with a time-dependent reference signal; a counter circuit (40-1) performing a counting operating until an inversion of a magnitude relation between the signal based on the pixel and the time-dependent reference signal; and a selecting circuit (30-2) for setting a time-dependent change rate of the reference signal, according to a signal level of the signal based on the pixel.

Abstract: An image processing system is disclosed which uses gain information from an input image to determine a threshold value used to filter the input image. The gain information is indicative of the amount of illumination of the input image and thus the noise level. The image processing system includes an image processor, a converter and a filter. The image processor receives and processes first image information into second image information and extracts the gain information from the first image information. The converter converts the gain information into a filter threshold, which is used by the filter to filter the second image information to provide filtered image information. The converter may include a lookup table storing noise characteristic estimates or the threshold values. The threshold values may further be based on subband size. The filter may be a wavelet-based transform denoising filter.

Abstract: A row scanning unit is configured to change a potential of a transfer signal from a second potential V2 to a third potential V3 prior to driving of a transfer operation for causing a transfer of signal charges from a photodiode to a floating diffusion, by supplying a transfer pulse having a first potential V1. The first potential V1 is a positive potential for turning a transfer transistor into ON state, the second potential V2 is a potential for causing pinning of holes under a gate of the transfer transistor and turning the transfer transistor into OFF state, and the third potential V3 is a potential for not causing the pinning of the holes under the gate of the transfer transistor and turning the transfer transistor into OFF state, the third potential being lower than the first potential and higher than the second potential.

Abstract: A solid-state imaging device includes unit pixels arranged in rows and columns, and reads a pixel signal from the unit pixels selected for each of the rows. The device includes: column signal lines provided for the columns of the unit pixels; amplifying transistors included in the unit pixels and each outputting the pixel signal; correlated double sampling units provided for the columns of the unit pixels and each performing correlated double sampling on a reset component of the pixel signal and on a data component including the reset component and a signal component of the pixel signal so as to sample the signal component; and low-pass filters each (i) inserted in the column signal line between an output terminal of the amplifying transistor and the correlated double sampling unit or (ii) included in the correlated double sampling unit.

Abstract: The present invention implements a solid-state imaging device and a camera which develop lower noise. The solid-state imaging device includes unit cells which are arranged in two dimensions. Each of the unit cells includes: a photoelectric converting element which photoelectrically converts incident light; and amplifying transistors each of which outputs a signal voltage according to signal charges of the photoelectric converting element. The photoelectric converting element is electrically connected in common with gates of the amplifying transistors.

Abstract: There are provided an A/D conversion circuit in which a counter is made to be capable of performing counting at both edges of a clock, up/down count values can be switched while the up/down count values are held, and the duty of the counting operation is difficult to be distorted even with the both-edge counting, a solid-state image sensor, and a camera system. An ADC 15A is configured as an integrating-type A/D conversion circuit using a comparator 151 and a counter 152. The counter 152 has a function of switching a count mode from an up count to a down count and from a down count to an up count while a value is held, a function of performing counting at both rising and falling edges of an input clock CK at a frequency two times as high as that of the input clock, and a function of latching the input clock CK in accordance with an output signal of the comparator 151 and setting non-inverted or inverted data of the latched data to be data of an LSB.

Abstract: An amplifier control device controls an amplifier which amplifies a first signal supplied from an image-pickup element, and supplies a second signal acquired by amplification of the first signal to a signal processing unit which is a following stage. The amplifier control device comprises a control unit which changes a current supplied to the amplifier depending on whether or not the first signal supplied to the amplifier is used for image data.

Abstract: A pixel circuit having improved charge transfer including an amplifier having an input node electrically connected to a charge storage node of the pixel circuit, and a negative feedback control loop having a capacitance element electrically connected between the input node and an output node of said amplifier.

Abstract: A solid-state image pickup device includes a plurality of common output lines receiving signals from a plurality of pixels, a plurality of column amplifier units amplifying the signals, a plurality of storage capacitors storing the amplified signals, a first transistor controlling electrical conduction between the output node of the column amplifier unit and the input node of a storage capacitor, a switch switching current for operating the column amplifier unit between a first current and a second current smaller than the first current, and a controller inhibiting, while the second current is flowing through the column amplifier unit, a potential at the output node of the column amplifier unit from approaching an off-state voltage supplied to a gate of the first transistor in an OFF state of the first transistor.

Abstract: A data transfer circuit includes: plural transfer lines transferring data; plural data output units connected to end portions of the respective transfer lines, detecting and outputting data transferred through the transfer lines with drive performance in accordance with a control signal; plural data transmission units arranged in parallel, transferring data to the corresponding transfer lines in response to selection signals; a selection control unit generating selection signals and outputting the selection signals to the corresponding data transmission units; and a control unit generating the control signal for controlling drive performance of the data output units to adjust data transfer delay and outputting the control signal to the respective output units. The transfer lines are arranged in the arrangement direction of the data transmission units and connected to the corresponding data output units. The control unit generates the control signal in accordance with the length of the data transfer distance.

Abstract: A solid-state imaging device includes a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: In association with an imaging device which generates a portion of an image from a plurality of channels within a first row by sampling each channel during a sampling time corresponding to the channel, circuitry offsets sampling times of at least first and second channels within the first row, thereby reducing noise correlation between the first and second channels in the first row. Pixel sampling times may be defined by start times of the channels within a row, end times or both. Offsetting may be accomplished using a predetermined set of sampling time values or by randomizing sampling time values.

Abstract: An object of the present invention is to provide an imaging system capable of improving S/N ratio and increasing dynamic range and a method of driving the imaging system suited to the improvement and increase. An imaging system includes: a solid-state imaging device having a plurality of pixels arranged in a matrix, column amplifiers each corresponding to each of columns of the pixels and an output portion for outputting an image signal based on an amplification by the column amplifier; and a signal processing portion receiving the image signal, wherein the column amplifier amplifies a signal output from the pixel by a gain q larger than 1, and the signal processing portion multiplies, by a factor less than 1, the image signal based on the signal amplified by the gain q.

Abstract: An image sensor includes a pixel array, a plurality of column readout lines, and a plurality of column readout circuits. The pixel array includes a plurality of pixels arranged in a plurality of rows and a plurality of columns. Each of the plurality of column readout lines is connected to a corresponding at least two pixels of the plurality of pixels. Each of the plurality of column readout circuits is connected to a corresponding column readout line of the plurality of column readout lines and includes an amplifier, a first capacitor connected between the corresponding column readout line and an input of the amplifier, and a second capacitor connected between the corresponding column readout line and the input of the amplifier.

Abstract: In an amplifying type MOS sensor having a 3-transistor construction, when a frame rate is raised, an accumulation time of a frame just after the switching of a drive mode becomes short. When a gain correction is made to compensate a lack of accumulation time, a deterioration in picture quality is caused. A read out scan and a reset scan are executed in parallel in the frame before the switching of the drive mode, thereby preventing that a time period for resetting a pixel is overlapped with a time period for holding a pixel signal into a holding unit.

Abstract: An image sensor has a per-column ADC arrangement including first and second capacitors allowing a comparator circuit to perform correlated double sampling. The capacitors are continuously connected to, respectively, the analog pixel signal and a ramp signal without use of a hold operation. The comparator circuit comprises a differential input being connected to the junction of the two capacitors and being biased by a reference signal. The reference signal is preferably sampled and held from a reference voltage. The use of a differential input as first stage of the comparator addresses problems arising from ground voltage bounce when a large pixel array images a scene with low contrast. Connectivity of the differential input stage allows the ramp signal to see a constant capacitive load thus reduce image artifacts referred to as smear.

Abstract: An image sensor includes a photosensitive element, a reset circuit, an amplifier transistor, and a current source. The photosensitive element is coupled to generate an image charge in response to incident light and transfer the image charge to a circuit node. The reset circuit is coupled to selectively reset a voltage at the circuit node. The amplifier transistor includes a gate terminal responsive to the voltage at the circuit node. A current source is coupled between a high level power rail and a second terminal of the amplifier transistor.

Abstract: A solid-state imaging device comprises pixel units, column signal lines, column circuits, a switching unit, and a mode control unit. Pixel units are two-dimensionally disposed in a matrix direction, and each of them comprises a photoelectric conversion unit and an amplifying unit. Column signal lines are provided for each column and the pixel signals from the amplifying units are output to each of rows. Column circuits are provided for each column and process signals from the column signal lines. A switching unit switches connection between the column signal lines and the column circuits. A mode control unit outputs signals to the switching unit and controls switching between a first mode in which the column signal lines are connected to the column circuits on the same column thereof and a second mode in which the column signal lines are connected to the column circuits on another column.

Abstract: An image capture apparatus includes an image sensor, a determination unit which determines one image capturing mode, a driving unit which drives the image sensor by different driving methods in the respective image capturing modes, and a control unit which controls the operation of the driving unit. The image sensor includes a plurality of two-dimensionally arrayed pixels, a predetermined number of vertical output lines arranged for each array of pixels, and a holding memory which holds pixel signals from pixels on rows. The control unit drives the image sensor in the first power save mode when a horizontal transfer period is not less than twice a vertical transfer period, and drives the image sensor in the second power save mode when the vertical transfer period is not less than twice the horizontal transfer period.

Abstract: A solid-state imaging apparatus including a pixel section having pixels arranged into rows and columns each pixel containing at least a photoelectric conversion device for converting an incident light into signal electric charges, a transfer device for transferring the signal electric charges generated at the photoelectric conversion device, and an amplification device for amplifying the transferred signal electric charges; constant current supplies each connected to respective one of the vertical signal lines; an amplification section for amplifying an image signal; a clip section for clipping the vertical signal line so that it does not fall below a predetermined voltage in a read period for outputting the signal electric charges generated at the photoelectric conversion device onto the vertical signal line; and a control section for changing a clip level of the clip section in accordance with setting of an amplification factor at the amplification section.

Abstract: A continuous imaging system for recording low levels of light typically extending over small distances with high-frame rates and with a large number of frames is described. Photodiode pixels disposed in an array having a chosen geometry, each pixel having a dedicated amplifier, analog-to-digital convertor, and memory, provide parallel operation of the system. When combined with a plurality of scintillators responsive to a selected source of radiation, in a scintillator array, the light from each scintillator being directed to a single corresponding photodiode in close proximity or lens-coupled thereto, embodiments of the present imaging system may provide images of x-ray, gamma ray, proton, and neutron sources with high efficiency.