Abstract: A system for modulating and demodulating write data and read data in a magnetic recording system in accordance with a (1,7) RLL method. The modulating and demodulating system includes a first clock pulse generating circuit receiving a reference signal from a recording medium and generating a first clock pulse having a first frequency equal to a data write frequency in accordance with a phase of the reference signal; a second clock pulse generating circuit receiving the first clock pulse and generating a second clock pulse having a second frequency, the second frequency being two-thirds of the first frequency; and a unit for encoding data to be written in accordance with a (1,7) encoding and decoding other data to be read in accordance with a (1,7) decoding, in response to the first and second clock pulses.

Abstract: An optical disk recording/reproducing device that records and reproduces digital audio data by executing an interleave processing for error correction is disclosed. According to the invention, when new musical information is recorded successively after previously recorded musical information, recording is started by digitally adding zero data for a prescribed period. Similarly, upon stopping recording of the musical information, zero data are digitally added for a prescribed period so as to end recording. The present invention is made to produce no abnormal sounds in a boundary section of one musical information in its reproduction state and the other musical information that comes immediately before or after it.

Abstract: Higher data storage capacity is realized in a self contained fixed rotating disk expansion board subsystem preferably for a single electronics circuit board accessory slot of a host computer. This greater capacity, e.g. 42 megabytes of formatted storage on two 95 millimeter disks, is achieved by use of a plural zone arrangement wherein each zone contains data tracks in which user blocks are recorded and read out at a data rate unique for the zone. An improved phase locked loop within the data separator uses a separate voltage controlled oscillator for each zone and a common charge pump for generating control voltages applied to change the resonant frequency of all of the oscillators. An oscillator disable circuit disables every voltage controlled oscillator other than the selected oscillator, so that it is the only oscillator whose frequency is actually varied by the charge pump during readback/data separation and decode operations.

Abstract: An information-transmission system including an encoder for converting n-bit information words (D7, . . . , D0) into transmitted m-bit code words (C10, . . . , C0), and a decoder which reconverts the received code words (C'10, . . . , C'0) into information words (D*7, . . . , D*0) corresponding to the original information words. For a first group the encoder converts a first portion (D7, . . . , D3) into a first portion of a code word, such portion comprising q bits (C10, . . . , C5) thereof; and converts a second portion (D2, . . . , D0) of the information word into a second portion of the code word, such portion comprising s bits (C4, . . . , C0) thereof. For a second group the encoder converts a first portion (D7, . . . , D3) into a second portion comprising q bits (C'5, . . . , C'0) of a code word, and converts a second portion (D2, . . . , D0) of the information word into a first portion comprising s-bits of (C'10, . . . , C'6) such code word.

Abstract: An identification recording data method for an identification medium includes the steps of printing or laminating an information identification bar code strip and then affixing a magnetic recording strip to the identification medium. A data set is encoded into N encoded data using N algorithms. The bar code strip has the N encoded data recorded thereon. The magnetic recording strip has the data set recorded thereon. The N encoded data is decoded and compared with the data set recorded on the magnetic strip. Comparision of the data yields a determination as to the integrity of the identification medium.

Abstract: An information reproducing medium comprises plural tracks for recording information arranged to form a band and such plural bands are arranged normal to the direction of the track arrangement. The track has no area for obtaining an information reproducing clock. In a reproducing method, when information on one track of one band is to be reproduced, an information reproducing clock is derived from at least a portion of information on a track other than the one track, preferably a track adjacent thereto.

Abstract: A method of processing digital information prior to recording comprises converting input digital words into code words, each of the same period as the input digital word but containing a greater number of time slots than the number of bit locations in the digital word, providing a plurality of groups of code words and selecting the group from which a code word will be taken in any instance on the basis of the immediately preceding code word. The code words are defined such that there is a minimum spacing of three time slots between transitions and no transition is permitted in the last time slot. Two main groups of code words are provided which each have a transformed version. Apparatus for carrying out the method as described as is apparatus for decoding the encode words in replay.

Abstract: In order to reduce the current supply and thus the heating up of relevant components during the processing of binary signals of any desired pulse duration or width, the pulses forming the binary or first signal are converted into a pulsed or second signal which forms a pulse sequence or train consisting of short pulses having different polarities. The individual pulses of the binary signal are converted to short pulses having a first spacing in the pulsed or second signal. The transitions between the pulses of the binary or first signal are converted to pulses having any desired shortened second spacing as compared to the first spacing.

Abstract: A data transmission system and apparatus used for recording on a recording medium an audio signal, compressed in time base with a predetermined compression ratio, together with a data signal for reproduction of the audio signal. The data signal is compresed of serial data of bits. A dummy bit is provided before the head bit of the serial data with the dummy bit being in inverted relation to the head bit. A detection system and apparatus for detection of the data transmitted by the data transmission system, and a recording medium on which signals are recorded according to the data transmission system are disclosed.

Abstract: A decoder system for decoding signals such as Class IV partial-response signals. In the decoder system, threshold levels are used to distinguish between binary ones and zeros in partial-response signals. The threshold levels are adjusted by a feedback system to automatically compensate for effects such as signal dropouts.

Abstract: A mode of writing synchronization information on a magnetic recording carrier (DISC) where the information is written in binary code and distributed over a plurality N of tracks, each track being associated with at least one reference zone (ZRP.sub.ij) which includes a group of preamble information (ZSY.sub.ij +ZSA.sub.ij), a group of absolute address information (ZAD.sub.ij), and a group of fine-position information (GDP.sub.ij). According to the invention, the mode of writing is characterized in that the preamble information group includes a first subgroup (ZSY.sub.ij) of synchronizing information preceding a second subgroup of automatic gain control (ZCA.sub.ij). The invention is applicable to magnetooptical memories.

Abstract: Higher data storage capacity is realized in a self contained fixed rotating disk expansion board subsystem preferably for a single electronics circuit board accessory slot of a host computer. This greater capacity, e.g. 42 megabytes of formatted storage on two 95 millimeter disks, is achieved by use of a plural zone arrangement wherein each zone contains data tracks in which user blocks are recorded and read out at a data rate unique for the zone. An improved phase locked loop within the data separator uses a separate voltage controlled oscillator for each zone and a commmon charge pump for generating control voltages applied to change the resonant frequency of all of the oscillators, An oscillator disable circuit disables every voltage controlled oscillator other than the selected oscillator, so that it is the only oscillator whose frequency is actually varied by the charge pump during readback/data separation and decode operations.

Abstract: An encoding/decoding system for 1,7,2,3 codes employs an oscillator having a frequency f and dividers providing signals at frequencies equal to 1/3 f and 2/3 f. A code converter is responsive to the three signals to encode or decode data. A 3/2 frequency divider employs two D-type flip-flops, an OR gate and an AND gate arranged to respond to an input signal at a frequency f to derive an output signal at a frequency 2/3 f.

Abstract: For recording digital data on a magnetic recording medium, binary data signals and magnetic bias signals having a constant repetition rate are synchronized in terms of phase, are overlaid, and are subsequently supplied to a magnetic head. The phase-oriented synchronization thus occurs since the chronological spacings between two successive signal edges of the magnetic bias signals between two successive signal edges of the data signals given a plurality of magnetic bias signals are modified such that the directions of the signal edges of the data signals coincide with the directions of the corresponding signal edges of the magnetic bias signals. The sums of the components having a first binary value and a second binary value of the magnetic bias signals are identical. Preferably, the distances between two successive signal edges of each of two magnetic bias signals are respectively shortened by half between two edges of a data signal.

Abstract: An apparatus and method for encoding a digital data signal, which apparatus and method converts a digital data signal to a string of truncated and extended pulses, the truncated pulses corresponding to a digital "0" and the extended pulses corresponding to a digital "1". The frequency of the leading edges of all of the pulses in this pulse string is the clock frequency such that a clock signal can be generated by the receiver directly to synchronize the receiver to the transmitter. Further, the trailing edge of the transmitted pulses contain the data information. Specifically, the pulses are varied in length with a truncated pulse corresponding to a digital "0" and an elongated pulse corresponding to a digital "1". A decoding apparatus is also described for decoding the encoded signal to generate a digital signal corresponding to the original data signal to be encoded.

Abstract: A set of high density codes for optical recording of binary data. The data bits of each set are encoded into a block code having a plurality of symbols, each symbol having a plurality of symbol position with an even number of holes with the constraint that there be at least two symbol positions between holes or groups of holes. Additionally, a least one hole is never recorded at a predetermined boundary symbol position. This "empty" symbol position permits symbol position dimensions to be reduced while maintaining good read margins to provide high density recording.

Abstract: Bit-serial compression process improved by inclusion of character-repeat (character) mode. During the compression process in a bit serial (bit) mode, using a predictive scheme with code words for each predicted bit, the characters, typically bytes (eight bits), are assembled bit by bit. Each assembled character is compared to the preceding character. When two successive identical characters occur, the process changes to the repeat-character mode wherein successive identical characters are signaled in the same manner as correctly predicted bits. When a different character occurs, the process signals in a manner corresponding to an incorrectly predicted bit. Provisions are made for limitations imposed by finite code spaces, for supplying a data bit when recording a code word associated with an exhausted code space or different characted, and for indicating an identical character has occurred when recording a code word associated with an exhausted code space.

Abstract: A mother tape is adapted to perform magnetic or thermal high-speed contact printing for duplicating video data or information to be reproduced in a VTR monitor with eliminating spike noise otherwise contained in the reproduced control signal. The mother tape stores video information including control signals. The control signals have a waveform which has a first level immediately following the leading edge and lower than a second level corresponding to the normal high level, and a third level immediately following the trailing edge and higher than a fourth constant level corresponding to the normal low level. The first- and third-level waveform "buffers" thus created tend to suppress the spike noise conventionally occurring at the leading and trailing edges of the reproduced control signal and ensure more reliable tracking, tape speed control and so forth.

Abstract: A rate 8/9, constrained partial response class IV code having run length limitation parameters (0,3/5) is provided for any partial response (PR) signaling system employing maximum likelihood (ML) detection.

Abstract: On the basis of n-bit words presented, the described channel encoder generates DC-free and run length limited m-bit (m>n) code words having (1+D).sup.-1 or (1+D.sup.1).sup.-1 precoder properties. The m-bit code words are formed each time by appending (m-n) bits to the n-bit words presented. For the determination of the (m-n) bits to be added, the amplitude density function as well as the distribution of the run length and the digital sum variation of the code words is calculated.

Abstract: In a data recording method which uses a recording format having first and second preamble fields each for executing bit synchronism, first and second synchronization pattern fields each for defining the head position of a data stream, and a data field for recording the data stream, the first preamble field, the first synchronization pattern field, the second preamble field and the second synchronization pattern field are arranged in sequence in the order stated, and the first and second synchronization pattern fields are arranged in advance of the data stream. Also, the data stream is divided into a plurality of data blocks, and a re-synchronization pattern field having the same pattern as that of the synchronization pattern field is arranged just in advance of each of the data blocks.

Abstract: In a multitrack motion analyzer in which video information representing a scene is recorded at a fast frame rate and played back at a slower frame rate, digital data timing and synchronization signals relating to each recorded frame is simultaneously recorded on a separate track as bipolar return to zero (BRZ) FM signals. A Non Return to Zero (NRZ) bit serial digital data signal and synchronous data clock signal are encoded as BRZ digital data signals and then frequency modulated so that the "1" bit, the "0" bit, and the "return to zero" signal levels of the BRZ data signal are converted to three frequencies. The three frequencies are integral multiples and synchronous to the data rate of the NRZ digital data signal so as to eliminate uncertainty between bit boundaries and allow packing more bits per unit time for a given carrier bandwidth. Additionally, accurate synchronization information is recorded and recovered by inserting a missing clock in the BRZ data stream.

Abstract: An 8/9 encoding scheme wherein the improvement comprises selectively outputting, in response to a sync control signal, a first and a second 9 bit code word that uniquely identify a synchronization point in the 9 bit data word stream. The first code word is 1 1111 1111.sub.2 (1FF.sub.16) if the digital sum variation (DVS) is less than zero and 0 0000 0000.sub.2 (000.sub.16) if the digital sum variation is greater than or equal to zero. The second code word is any .+-.1 CDS entry of the same CDS polarity as the first word. In a preferred embodiment of the invention, the second code word is 1 0101 0101.sub.2 or 155.sub.16 (CDS=+1) or 0 1010 1010.sub.2 or 0AA.sub.16 (CDS=-1).

Abstract: Digital data recorded in Manchester code in a 1553 MUX bus has the data portion of each word converted into NRZ-L format with the synchronization prefix or portion of each word converted into a corresponding NRZ-L formatted portion according to a predetermined protocol. The NRZ-L formatted word, prefix and data, is then converted into DM-M coded format. The Manchester code NRZ-L coded data is driven at a 1-MHz clock frequency, while the DM-M coded format is driven at a 500 kHz clock frequency. The data in DM-M code is then recorded on magnetic tape in a test recorder. The magnetic tape can be analyzed at a remote site after test by decoding the DM-M word into its corresponding NRZ-L word driven at the 1-MHz clock rate. The synchronization portion of the reconverted NRZ-L word is identified and the NRZ-L word correspondingly assembled into an output register according to a predetermined protocol.

Abstract: To improve recording of data on a magnetic recording medium such as a magnetic tape, amplitudes of write signals supplied to a magnetic head are modified, dependent on distances between edges of the write signals. The modification occurs such that, given a short spacing, a respective write signal has a greater value than given a large spacing. Amplitudes of the write signals are modified in three steps when the GCR method is employed as a writing method for recording the data, distances of the edges of the write signals being capable of assuming three different values.

Abstract: An information-bearing record medium (magnetic tape, disk, or an equivalent thereof) includes a stream of binary bits in which a binary 1 bit is normally represented by a signal transition at the middle of its corresponding bit cell and a binary 0 bit is normally represented by a signal transition at the trailing edge of its corresponding bit cell so long as the immediately following bit cell contains a binary 0 bit, whereby the spacing between successive normal signal transitions is at least one bit cell and is no greater than two bit cells. The binary bit stream includes an address mark byte, for identifying a future substream of data bits, defined by a unique pattern of signal transition having at least one normal signal transition missing, whereby at least one pair of successive signal transitions is separated by more than two bit cells and less than four bit cells.

Abstract: A method for converting m-bit information words into n-bit code words and vice versa. The code words have a limited disparity in order to obtain a d.c. free code. A reduction of the low-frequency content of the spectrum is obtained by selecting the code words in such a way that the sum ##EQU1## remains restricted over all the previously generated bits x.sub.j of the preceding code words.

Abstract: A decoder for the 2,7 variable length code. A four-bit shift register sliding block decoder detects the presence of the code's four-bit ending sequence and provides decoded binary output. The decoder has only a three-bit binary error propagation.

Abstract: A digital data recording and reproducing method in which a digital data sequence is divided into 8-bit digital data sequences. When the divided 8-bit digital data sequences are encoded into 14-bit code, an 8-bit digital data sequence wherein the value of its DSV (digital sum variation) is limited to a predetermined range is selected from two codes which are assigned to correspond to the 8-bit digital data sequence. In the encoding process, the number of "0" bits which are inserted between two "1" bits in the code sequence is restricted to a number of from one to eight so that the DC component in the code sequence can be eliminated. A bit sequence which never arises in two successive 14-bit code words may then be used as a frame synchronizing signal.

Abstract: A method of converting a digital video signal including first words each being composed of N.sub.1 bits into a digital video signal which consists of second words each being composed of N.sub.2 bits (N.sub.2 <N.sub.1) by separating each of the first words into a first portion which consists of the N.sub.2 bits including a most significant bit and a second portion which consists of the remaining (N.sub.1 -N.sub.2) bits including a least significant bit, and storing the first portions of the first words and the second portions. Third words each of which consists of N.sub.2 bits are then composed by sequentially arranging the second portions. A first group of words which represent converted digital image signal are composed by first portions, and a second group of words are composed by sequentially linking the third words. Each scanning line of a converted digital video signal is then composed by the second group of words sequentially arranged before or after the first group of words.

Abstract: A method and apparatus for carrying digital information in video signals onto the recording format of audio compact disc (CD) systems. Input signals are divided into 8-bit samples and groups of thirty-three samples are treated as a frame. Upon encoding in accordance with the CD format, the frame is made to contain 576 bits which are converted to one hundred ninety-two 3-bit samples. The 3-bit samples are converted to analog levels and those analog levels comprise the video signals. Such a video signal can advantageously be stored in a video disc with exactly one frame of digital data being contained in the video line and stored in one track of the disc. In retrieving the information, the CD format sync code is detected and augmented, and the video line is fed to circuitry that decodes signals having the standard CD format.

Abstract: A floppy disk drive interface circuit of the invention has a counter/selector for counting the pulse width of a window signal supplied from a voltage frequency oscillator. When a window pulse having a pulse width longer or shorter than a preset pulse width is input, counter/selector supplies a disable signal to AND gate 22. AND gate 22blocks window signal 12 from VFO2 being supplied to FDC 3.

Abstract: A method and device for inserting a digital signal in a channel at a higher flow rate is provided, for example for transcribing from 704 Kbit/s into 2048 Kbit/s, wherein each binary element of the low flow rate channel is associated with a triplet whose first two bits are identical to the bit to be transmitted, and whose third bit is in the inverse state. Such a triplet is provided for the first ten bits of a sequence of eleven bits, the eleventh bit being associated with a doublet whose two bits are identical to the bit to be transmitted.

Abstract: A system and method for generating a unique sync pattern that may be appended to a selected data sector of a disk storage system. The data to be stored in the disk storage system is encoded in accordance with a desired fixed rate run-length limited code, such as a 2,7 code. The unique sync pattern is generated by first encoding a prescribed data word in accordance with the desired code. At least one bit of the encoded prescribed data word is then changed in a manner such that the changed encoded word still complies with the coding rules of the desired code, yet the resulting bit pattern does not represent any valid sequence of data in accordance with the desired code. Hence, the changed encoded word may be readily distinguished from data, thereby providing the synchronization function, while still being handled and processed by the same encoding/decoding circuitry as is employed to handle and process the data.

Abstract: A system for encoding consecutive parallel bytes of source data into an RLL (1,7) output symbol string and decoding an input RLL (1,7) symbol string to produce an output sequence of parallel bytes of data. The system accepts an input sequence of parallel data bytes occurring at a byte rate and provides, in response, the output RLL symbol string at a symbol string rate which is twelve times the byte rate. Similarly, the output byte sequence has a byte rate which is 1/12 of the input RLL symbol string rate. The system performs RLL encoding and decoding at the byte rate, thus eliminating the odd 2/3 f.sub.C source clock required in systems performing RLL coding and decoding functions on a bit-by-bit basis.

Abstract: An apparatus for producing, from four consecutive unconstrained data bits in a bit string, a run-length-limited (RLL) encoded symbol consisting of three coded data bits. The internal state of the encoder is described by one state bit. The encoder performs RLL (1,7) encoding on a bit-by-bit basis, and can be cascaded in parallel to perform encoding on sequential, equally-sized groups of unencoded data bits. An attractive feature of the encoder is that it can be cascaded to simultaneously encode consecutive bytes of data.

Abstract: A method of reducing the DC component in a digital information signal comprised of a plurality of 8-bit data words by converting each of the 8-bit data words to a 10-bit data word, comprises the steps of: selecting the 10-bit data words having a sequence of no more than two bits both at the logic level "1" or "0" from both boundaries of the 10-bit data words; classifying the selected 10-bit data words into a first group consisting of 10-bit data words having five logic level "1" bits, a second group consisting of 10-bit data words having six logic level "1" bits, and a third group consisting of 10-bit data words having four logic level "1" bits, with the third group being formed by inverting the 10-bit data words in the second group; and further assigning the 8-bit words alternately to the 10-bit words in the second and third groups when such 8-bit words correspond to previously assigned 10-bit words having six logic level "1" bits and assigning the remaining 8-bit words to the 10-bit words in the first group

Abstract: Code modification circuitry alters the end portion of each block in a sequence of code blocks, and also inserts additional bits at the junction between contiguous blocks. The codes to be processed are run-length limited (RLL) codes having a DC component which is to be removed for certain applications such as magnetic recording. The modification circuitry retains the RLL format. Charge (or the integral of the waveform) accumulated by the sequence of bits of one block is compensated by selecting the sense of charge accumulation in next block to be of opposite sense. This is accomplished by the code modification circuitry using a relatively small set of possible combinations of digital words at the junctions of the blocks.

Abstract: An encoder-decoder apparatus is disclosed for encoding and decoding code words of a predetermined code scheme in which which ONE bits thereof are separated by at least d ZERO bits and not more than k ZERO bits, in a serial bit stream path from and to components of serial data words each being of n parallel data bits in a data word transmission path, wherein the number of bits of each code word bears a three to two relation with respect to the number of bits of each component of the data word, and where n equals an even integer.

Abstract: A binary data encoding process comprises the steps of separating a given binary data sequence at every two bits by a serial/parallel shift register (18), and converting the separated 2-bit data into a 3-bit code by using a logic circuit (19) and a parallel/serial shift register (20). A conversion pattern in the logic circuit (19) is exclusively determined based on the 2-bit data to be converted, 1-bit data immediately before and 2-bit data immediately after said 2-bit data, and a 3-bit code converted immediately before the conversion of said 2-bit data, wherein a succession of at least one but no more than seven "0" exists between an arbitrary "1" and the succeeding "1" in the converted 3-bit code sequence.

Abstract: There is provided a method of modulating a data bit series consisting of a first value (e.g., 1) and a second value (e.g., 0) whereby a transition as a state transition is caused so as to satisfy the following conditions of (a) to (d).(a) The transition at the boundary portion of the bit cell which is sandwiched by bits 0.(b) The transition at the central portion of the bit cell of bit 1.(c) Among an even number of the bits of 1 which are sandwiched by bits 0, the transition is inhibited at the central portion of each bit cell of the last two bits of 1 and the transition is caused at the boundary portion of these two bit cells of 1.(d) When at least one bit in a pattern which starts from the two bits of (01) appears at a location next to an even number of the bits of 1 subsequent to bit of 0, the transition is caused at the central portion of the bit cell of bit 0 between these two bits.

Abstract: An improved 8-8 mpping table system in digitally and magnetically recording video signals. Video signals coded into natural binary codes consisting of 8 bits are converted into different binary codes consisting of 8 bits constituted by patterns in which a continuous number of the 1's or the 0's does not exceed a predetermined number. In these codes, the continuous number of the 1's or the 0's is so limited that a maximum magnetization interval is reduced in magnetically recording the signals. Therefore, erroneous code is prevented from occurring in reproducing the signals.

Abstract: An AMI signals receiver generates a logic signal stream representative of AMI encoded information signals which have traversed a transmission medium. Adaptive compensation circuits are responsive to characteristics of the received AMI signals for generating a bipolar signal ideally corresponding to the transmitted AMI signal but in practice includes noise primarily caused by near-end crosstalk. An apparent improvement in the signal-to-noise ratio is achieved by generating a unipolar signal from instant and last amplitude samples of the bipolar signal and thereafter differentially decoding a binary signal representation of the unipolar signal.

Abstract: A return-to-zero (RZ) vertical digital magnetic recording method and apparatus comprising a selectively magnetizable recording medium which includes a recording layer of magnetic material having a low vertical remanence. A magnetic recording head is positioned in close proximity to the recording medium, and relative motion is produced between the recording medium and the recording head. To record data, the recording head is energized with one short duration current pulse for each unit of data to be recorded. The resulting bipolar magnetic write field closes substantially perpendicular through the recording medium thereby producing, in the medium, a similarly bipolar flux configuration having the magnetic transition centered about the gap of the magnetic recording head. Data is represented by these transitions in RZ vertical magnetic recording.

Abstract: A video signal to be recorded on a recording medium used in a video tape recorder or optical disk recorder is digitized, distributed into several bit sets, and then subjected to separate processings or converting operations. The bit sets are merged into a data word with the same number bits as of the original digital data and, after being processed for bit inversion at a certain data interval, it is recorded on the recording medium. Data words retrieved from the recording medium are processed for bit inversion and inverse conversion in a reverse order with respect to the recording process, and a high quality video signal including a smaller number of bit errors can be reproduced.

Abstract: Digital encoding and decoding apparatus for encoding data codes to produce disk codes and decoding disk codes to produce data codes. In the encoding and decoding operations performed by the apparatus, the output consists of a code and a state which are produced from a current input code, a next input code, and the state code produced by the last operation. The apparatus consists of a PROM and a state code register for retaining the state code produced by the last encoding or decoding operation. The registers in the prom contain two sets of code-status words. Each code-status word in one set contains a disk code and a state code which are the result of an encoding operation; each code-status word in the other set represents a data code and a state code which are the result of a decoding operation. The state code register receives the bits of the code-status word which contain the state code.

Abstract: Method of connecting a stream of data bits of a binary source signal into a stream of data bits of a binary channel signal. The data bit stream of the source signal is divided into a sequence of five authorized source words of variable lengths. Each of these five authorized source words are converted into a channel word having twice the number of data bits. This conversion has been chosen such that a very small error propagation is obtained and that at the same time very simple electronics are required. For dividing the data bit stream into information blocks and for providing the timing during the decoding operation a very suitable synchronizing word is used.

Abstract: In a digital signal recording and playback system, digital data is provided by the pulse code modulation of an analog signal. The digital data is modulated into a digital signal in such a manner as to have a maximum reversal interval equal to the bit period of the original data and a minimum reversal interval equal to one half the bit period. Such a digital signal is recorded into and reproduced out of a recording medium. During recording, frequencies are selected for a first or high frequency component which repeats at the minimum reversal interval and a second or low frequency component which repeats at the maximum reversal interval, such that the playback level of the first frequency component becomes sufficiently lower than that of the second. During playback, the first frequency component is further attenuated relative to the second or fully removed and the playback level or the slice level is controlled with regard to the second component of the reproduced digital signal.

Abstract: Program segments on a magnetic tape are identified by recording patterns of continuous sine wave signal bursts and blank portions in non-recorded spaces between the program segments, the continuous sine waves all having the same low-frequency relative to the audio frequency band and a selected number of continuous sine waves and a corresponding blank portion of the same length each form one level of a binary signal and a second burst of continuous sine waves and a corresponding blank portion of the same length each form the other level of the binary signal. These four elements are arranged to provide an individual address code for each of the program segments on the magnetic tape and are arranged such that they may be read in either direction of tape travel, in order to identify the program segment from either direction, by forming the address code signals as complementary pairs based upon the location of the program segments relative to the ends of the tape.

Abstract: In the code modulation system for converting input data levels into an output signal in the form of code words by providing M input levels among N input levels assigned to input data with stairlike code weights on the basis of the input levels, (N-M) input levels which are the difference between said N input levels and said M input levels are respectively disposed near transition points where said stairlike code weight is changed, and the code weights are provided with hysteresis in the ascent process and the descent process of the input data level.