Head Amplifier Circuit Patents (Class 360/46)
  • Patent number: 7362530
    Abstract: An amplifier apparatus for use with a sensor includes: (a) a first and a second amplifying circuit segment coupled with the sensor and cooperating to effect substantially balanced handling of signals received from the sensor; the first amplifying circuit segment includes a first transistor device; the second amplifying circuit segment includes a second transistor device; (b) a countercurrent unit coupled with the first and second amplifying circuit segments for receiving a first indicator signal from the first transistor device and a second indicator signal from the second transistor device; the first indicator signal represents a first parameter in the first transistor device; the second indicator signal represents a second parameter in the second transistor device; the countercurrent unit provides feedback signals to at least one of the first transistor and second transistor devices to reduce input impedance of the apparatus.
    Type: Grant
    Filed: November 6, 2004
    Date of Patent: April 22, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Motomu Hashizume
  • Patent number: 7359136
    Abstract: An amplifier system with feedback current cancellation comprises an amplifier, a feedback network, first and second unity-gain buffers, a second resistance, and a current mirror. The amplifier includes an input, an output, and at least one stage. The feedback network includes a first resistance having one end that communicates with the input of the amplifier and an opposite end that communicates with the output of the amplifier. The first and second buffers each include an input and an output. The inputs of the first and second buffers communicate with the output and the input of the amplifier, respectively. The second resistance communicates with the outputs of the first and second buffers. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the second resistance.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: April 15, 2008
    Assignee: Marvell International Ltd.
    Inventor: Thart Fah Voo
  • Patent number: 7355804
    Abstract: A disk drive includes a rotatable data storage disk, and head, a controller, and a preamplifier. The head is configured to write data to and read data from the disk. The controller is configured to generate a write current command. The preamplifier includes a plurality of write current parameters, and is configured to select among the plurality of write current parameters based on the write current command from the controller, and to generate a write current having a shape that varies based on which of the write current parameters are selected. The write current is provided to the head to write a plurality of data bits on the disk.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: April 8, 2008
    Assignee: Maxtor Corporation
    Inventors: Roger Kassab, Richard E. Olsen
  • Publication number: 20080055760
    Abstract: An H-bridge driver for a disk drive system includes first and second high side switched legs and first and second low side switched legs. An inductor head for writing data to and reading data from a magnetic media is connected to form a center of the H-bridge. The system includes a voltage regulator circuit that generates a common mode regulated voltage. First and second high side logic circuits, which selectively control operation of the first and second high side switched legs, are coupled between a high reference voltage and the common mode regulated voltage. First and second low side logic circuits, which control the first and second low side switched legs, are coupled between the common mode regulated voltage and ground.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 6, 2008
    Inventors: Vineet Tiwari, Baris Posat
  • Patent number: 7339760
    Abstract: A preamplifier circuit is connected to a transducing head, and has integrated bias circuitry and offset recovery circuitry. The offset recovery circuitry is activated in response to a transition from write mode to read more to provide an output signal representative of a signal across the transducing head. The bias circuitry is driven by the output signal of the offset recovery circuitry to bias the transducing head.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: March 4, 2008
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey A. Gleason, John D. Leighton, Scott M. O'Brien
  • Publication number: 20080043357
    Abstract: Before a system area of the storage device is read immediately after the activation of the storage device, a read signal is output from a magnetic head to read servo information in the system area. An HDIC amplifies gain of the read signal as first gain amplification. Then, a VGA in a read channel amplifies gain of the read signal after the first gain amplification as second gain amplification. The read signal for the servo information is amplified by two stages of amplifiers to a level sufficient to demodulate the servo information.
    Type: Application
    Filed: December 28, 2006
    Publication date: February 21, 2008
    Inventors: Yoshifumi Obara, Takeshi Hara
  • Patent number: 7330320
    Abstract: In a perpendicular magnetic recording system, the data that is being written by the write channel is fed back into the read channel. The read channel processes the data and decides if the written sequence is likely to have very poor DC characteristics. If that is the case, the write channel changes a scrambler seed and rewrites the data using the new scrambler seed. The data may also be inspected for patterns that might cause large baseline wander before being written to disk, i.e., in the write channel. A data sequence may be repeatedly scrambled and encoded until an acceptable level of estimated DC-wander has been achieved. The data sequence may then be written to disk.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: February 12, 2008
    Assignee: Marvell International Ltd.
    Inventors: Mats Oberg, Pantas Sutardja
  • Patent number: 7324294
    Abstract: A magnetic recording disk drive has a patterned magnetic recording disk with data blocks of magnetizable material separated by nonmagnetic regions, a read head for reading the magnetized data blocks and generating a readback signal, and a timing circuitry that generates from the readback signal a series of timing pulses. When the read head is over a nonmagnetic region the readback signal is significantly reduced, and this signal reduction is detectable to determine the position of the nonmagnetic regions. The timing circuitry includes a rectifier that rectifies the readback signal, a highpass filter that filters the rectified signal at the frequency of the data blocks, and a peak detector that detects the peaks of the filtered signal and generates a series of timing pulses, each pulse representing a nonmagnetic region.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: January 29, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Andreas Moser
  • Patent number: 7317590
    Abstract: A method for determining a flying height of a head of a hard disk drive. The disk drive includes a pre-amplifier and an automatic gain control (“AGC”) circuit that are connected to the head. The method includes determining a first automatic gain control value based on AGC values at two delta pre-amplifier gain settings. A second automatic gain control value is determined based on AGC values at two different flying heights. A difference between the flying heights can be determined from the first and second automatic gain control values. If one of the flying heights is set to 0 the difference in gain values is equal to the flying height of the head.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: January 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tom Chan
  • Publication number: 20080002268
    Abstract: A method is disclosed.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventor: Richard A. Gill
  • Publication number: 20080002267
    Abstract: Operating a write head by slew rate determining a slew rate control based upon a slew rate and the track being written and controlling the write current waveform based upon the slew rate control for the write head to write data to the track on disk surface. An embedded circuit supporting these operations. Hard disk drive including the embedded circuit electrically coupled to preamplifier driving the write head based upon the write current waveform. Methods of manufacturing the embedded circuit and the hard disk drive, and the products of these processes.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventors: Eun Kyu Jang, Dongman Kim
  • Patent number: 7315428
    Abstract: In one embodiment, a magnetic media write signal filter includes a plurality of resistors connected in series across output signal lines of a write driver and a capacitor connected between a junction of resistors and a ground.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: January 1, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lawrence A. Hansen, Gary Bartles
  • Patent number: 7315427
    Abstract: A dynamic threshold detector for a magnetic storage medium comprises a transition detector that receives the data comprising pairs of numbers based on data received from the magnetic storage medium, each of the pairs of numbers including a first number and a second number and that detects signs of the first and second numbers in the pairs. A threshold selector varies a magnitude of a threshold based on the detected signs.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: January 1, 2008
    Assignee: Marvell International Ltd.
    Inventor: Zining Wu
  • Publication number: 20070279785
    Abstract: A (e.g., hard-disk drive (HD)) system supports reader standby mode and/or writer standby mode. For reader standby mode, reader circuitry in the system's preamplifier is transitioned to a low-power mode during write operations. To provide quick transition from write mode to read mode, the reader circuitry is transitioned to pre-read mode before the end of the write operation. For writer standby mode, the preamplifier's writer circuitry is transitioned to a low-power mode during read operations. To provide quick transition from read mode to write mode, the writer circuitry is transitioned to a pre-write mode before the end of the read operation. The availability of a reader standby mode during write operations and a writer standby mode during read operations reduces power consumption as compared to HD systems that leave the reader circuitry in pre-read mode throughout each write operation and the writer circuitry in pre-write mode throughout each read operation.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Daniel J. Dolan, David W. Kelly, Stephen C. Kuehne, Nathan M. Rudd, Ross S. Wilson
  • Patent number: 7304545
    Abstract: A phase locked loop (PLL) circuit, comprises a frequency integrator circuit that receives a target signal, a phase shift signal and a frequency gain correction parameter and that selectively disables tracking frequency offset based on a value of the frequency gain correction parameter. A phase integrator circuit communicates with frequency integrator circuit, that synchronizes phase with the target signal and generates a phase signal. A phase shift measurement circuit generates the phase shift signal based on the phase signal. A phase interpolator circuit generates the frequency gain correction parameter based on the phase signal.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: December 4, 2007
    Assignee: Marvell International Ltd.
    Inventor: Pantas Sutardja
  • Patent number: 7301715
    Abstract: Managing temperature of a read/write head (120) in a disk drive system in which there is a power variance due to different operation modes. A circuit device (100) determines and delivers additional power needed for compensating for the temperature variance due to different operational power requirements. The power is delivered to a resistive heater (Rheat) associated with the head (120). The compensating power is based on the delivery voltage, delivery current, and resistance of the resistive heater (Rheat). The delivery current is varied to account for changes in the resistance of the resistive heater (Rheat) since it can vary with temperature. By sensing the current with a sensor (13), the resistance is determined via the sensed current and the delivery voltage. The current is adjusted for maintaining the compensating power.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: November 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Congzhong Huang, Bryan E. Bloodworth, Mike Sheperek
  • Patent number: 7298570
    Abstract: Systems and techniques relating to interpreting signals on a channel having an asymmetrical signal amplitude response. A signal processor, such as a read channel transceiver device usable in a magnetic recording system, includes an asymmetry correction circuit configured to receive an analog signal and to compensate for asymmetry in the received analog signal, a signal equalizer configured to receive an input signal responsive to an output of the asymmetry correction circuit and to generate an equalized signal, a discrete time sequence detector operable to examine the equalized signal, and a control circuit that provides a coefficient adjustment to the asymmetry correction circuit to affect the asymmetry compensation based on an estimate of non-linearity derived from the equalized signal and an output of the discrete time sequence detector. The estimate can be a least mean squared estimate of the non-linearity in the equalized signal.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: November 20, 2007
    Assignee: Marvell International Ltd.
    Inventor: Ke Han
  • Patent number: 7298567
    Abstract: An electronic device incorporates a linear voltage regulator circuit which includes an external pass transistor that does not rely on internal compensation, provides high gain, and exhibits reduce silicon area and power requirements. Circuits according to the present invention provide sufficient bandwidth with an error amplifier and drive capability to keep any secondary poles sufficiently far from the unity gain bandwidth (UGB) while maintaining good power supply rejection.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: November 20, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Joe M. Poss
  • Patent number: 7295394
    Abstract: Provided are a method and apparatus for equalizing and demodulating an information signal recorded in a magnetic recording medium by a partial response signal processing system if an isolated reversion producing waveform reproduced from the magnetic recording medium indicates an asymmetry. The method and apparatus reproduce the information signal from a high recording density of the magnetic recording medium.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: November 13, 2007
    Assignee: Fujifilm Corporation
    Inventors: Takeshi Nagata, Naoto Abe, Hisashi Osawa, Yoshihiro Okamoto
  • Patent number: 7292074
    Abstract: The present invention describes a voltage-mode boosting write driver circuit (160), comprising a plurality of inputs (WDP, WDN), a plurality of outputs (HWX, HWY), a transducer (L2), a flex interconnection (T1) coupled to the outputs (HWX, HWY) and to the transducer (L2), a first resistor (R15) and a second resistor (R43) coupled to the outputs (HWX, HWY) and to the transducer (L2), an H-switch (Q15, Q60, Q11, Q22) coupled to the resistors (R15, R43), and a plurality of top boosting circuits (Q42, Q47, R36, and Q43, Q48, R37) coupled to the outputs (HWX, HWY).
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: November 6, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Raymond Elijah Barnett, Tuan Van Ngo
  • Patent number: 7292400
    Abstract: A read/write device for a disk drive is disclosed. The read/write device includes a pre-amplifier and a recording head. The read/write device also includes a write signal path between the pre-amplifier and the recording head. The write signal path includes a write current. The read/write device also includes a read signal path between the pre-amplifier and the recording head. The read signal path includes an induced current related to the write current. The read/write device also includes a shunt path in the pre-amplifier to draw a part of the induced current from the read signal path.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: November 6, 2007
    Assignee: Seagate Technology LLC
    Inventor: Andrew Bishop
  • Patent number: 7289286
    Abstract: An amplifier system with feedback current cancellation comprises an amplifier having at least one stage, a feedback network, first and second replica circuits, first and second unity-gain buffers, a second resistance, and a current mirror. The feedback network includes a first resistance that communicates with an input and an output of the amplifier. The first and second replica circuits approximately replicate the DC characteristics of the output and the input of the amplifier, respectively. Inputs of the first and second buffers communicate with the first and second replica circuits, respectively. The second resistance communicates with outputs of the first and second buffers. The current mirror provides a current at the input of the amplifier that is proportional to a second current flowing through the second resistance.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: October 30, 2007
    Assignee: Marvell International Ltd.
    Inventor: Thart Fah Voo
  • Patent number: 7289284
    Abstract: Embodiments of the invention prevent demagnetization or degaussing of recorded magnetizations, even if a stray field is applied. In one embodiment, an output of a read head including a magneto-resistive effect element is inputted to a stray field detector through a DC amplifier and a DC filter. The stray field detector monitors dc components of the output from the read head, and escapes a head from above a magnetic recording medium.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: October 30, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Reiko Arai, Takehiko Hamaguchi, Atsushi Kikugawa, Hideaki Maeda, Liping Shen, Mikio Suzuki
  • Patent number: 7286313
    Abstract: A servo track sensing system receives equalized servo data from a servo demodulator and corrects for radial incoherence in the servo data. The system has a radial incoherence estimator that receives the equalized servo data and provides a radial incoherence estimate. A sequence detector receives the equalized servo data and the radial incoherence estimate, and provides a sequence detector output. A correlator receives the sequence detector output and provides correlator output data. The correlator output data has a reduced level of errors due to radial incoherence.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: October 23, 2007
    Assignee: Seagate Technology, LLC
    Inventors: Mehmet Fatih Erden, Erozan Mehmet Kurtas
  • Publication number: 20070236819
    Abstract: A disk drive controller including a preamplifier and a controller is disclosed, in which communications between the controller and the preamplifier are carried out over at least some shared terminals and conductors. A first pair of differential lines is provided to communicate data, sensed at read/write heads of the disk drive, from the preamplifier to the controller, and a second pair of differential lines communicates data to be written to the disk drive from the controller to the preamplifier. Control signals are communicated over a serial interface between the controller and preamplifier, over the first pair of differential lines, so that serial communication can be carried out simultaneously with the writing of data from the controller to the preamplifier. Alternatively, the control signals are communicated over the second pair of differential lines, simultaneously with the reading of data from the preamplifier to the controller.
    Type: Application
    Filed: April 9, 2007
    Publication date: October 11, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Motomu Hashizume
  • Patent number: 7280301
    Abstract: A method and apparatus which can provide a temperature estimate in a hard disk drive or other electronic device is provided. Output from the sensor, which may be indicative of a location spaced from the target temperature location, is sampled and integrated over an interval of time to form an estimate of average input sensor voltage. During the time interval, history of the HDD pre-amplifier operating modes is accumulated. The results are combined to form an estimate of HDA ambient temperature. Sensor offsets associated with each power mode, and weighted to the corresponding mode duty, can be subtracted from the average input sensor voltage.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: October 9, 2007
    Assignee: Maxtor Corporation
    Inventors: Robert Jackson, Donald E. Adams
  • Publication number: 20070230009
    Abstract: A system and method for providing an interface an interface between a read channel and a disk controller. The interface includes a plurality of differential pair signal lines operable to communicate data and control signals between the read channel and the hard disk controller. The data and control signal lines communicate operations for transferring data between the disk controller and the read channel. The operations may be communicated as commands that may be communicated to a preamplifier circuit to access registers in the preamplifier that may be configured to control the preamplifier operation.
    Type: Application
    Filed: August 18, 2006
    Publication date: October 4, 2007
    Inventor: Johnson Yen
  • Patent number: 7277245
    Abstract: A write driver circuit for a magnetic storage medium that communicates with a write head having first and second nodes comprises a first driver circuit with an input and an output that communicates with the first node of the write head. A first charge pump communicates with said input and said output of said first driver circuit and provides additional current to said input of said first driver circuit during a first transition period between current flowing through the write head in a first direction and current flowing through the write head in a second direction. A second driver circuit with an input and an output communicates with the second node of the write head. A second charge pump communicates with said input and said output of said second driver circuit and provides additional current to said input of said second driver circuit during a second transition period between current flowing through the write head in said second direction and current flowing through the write head in said first direction.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: October 2, 2007
    Assignee: Marvell International Ltd.
    Inventors: Farbod Aram, Sehat Sutardja
  • Publication number: 20070223125
    Abstract: A recording current to be supplied to a magnetic head is regulated by a signal output control unit. A peak value (either of positive-going peak value and a negative-going peak value) is detected in each pulse of a digital signal resulting from analog-to-digital conversion of a servo signal recorded on a servo band of a magnetic tape. The peak value is transmitted as an input value which is allowed to follow a change in the peak value as long as a frequency calculated based upon times of detection of respective peak values is below a predetermined frequency. An output value of the recording current is determined based upon the transmitted input value.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 27, 2007
    Applicant: FUJIFILM Corporation
    Inventor: Hiroki Ohtsu
  • Patent number: 7274523
    Abstract: A preamplifier for correcting for thermal asperity transients in disk drives using magneto resistive read heads. The preamplifier has an input gain stage receiving a signal from the read head and an output buffer outputting a reader output to a read channel that is filtered of thermal asperity transients by a high pass filter positioned between the input gain stage and the output buffer. The high pass filter is voltage controlled based on an input control signal from a filter controller. The filter controller uses a low pass filter functioning as a peak detector to detect peaks in either the input or output voltage of the high pass filter. The low pass filter output is applied to a non-linear function generator generating the control signal for the high pass filter based on an increasing function of the absolute value of the low pass filter output.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: September 25, 2007
    Assignee: STMicroelectronics, Inc.
    Inventors: Kemal Ozanoglu, Baris Posat, Roberto Allni
  • Patent number: 7271968
    Abstract: A head protection circuit that protects a write head and a magnetoresistive (MR) read head by bypassing electrostatic charge applied to the write head when the power of a preamplifier is turned “off” includes: a first differential mode switch and a first differential mode resistance connected between each end of the write head; and a first common mode switch and a first common mode resistance connected between one end of the write head and a ground potential. The first differential mode switch and the first common mode switch installed in the preamplifier are turned “on” when the preamplifier is turned “off” and vice versa. The head protection circuit has an effect of protecting the write head and the MR read head by bypassing common mode electrostatic charge and differential electrostatic charge generated at the ends of the write head when the preamplifier is turned “off.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: September 18, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Eun-kyu Jang
  • Publication number: 20070211364
    Abstract: A preamplifier circuit for a disk drive system is disclosed. The preamplifier circuit has first and second inputs that sense the voltage on either side of a magnetoresistive (MR) head element, which presents a varying resistance according to the localized magnetic field at a nearby disk surface. The preamplifier circuit includes a programmable input impedance circuit, which presents an impedance in parallel to feedback impedance at each of the first and second inputs. The parallel impedance presented by the programmable input impedance circuit is controlled by controlling a current source in the programmable input impedance circuit; a higher current results in a lower input impedance.
    Type: Application
    Filed: July 27, 2006
    Publication date: September 13, 2007
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Douglas W. Dean
  • Publication number: 20070211365
    Abstract: There is provided a magnetic disk device or the like which is capable of improving signal quality by suppressing occurrence of erasure of adjacent tracks due to spreading of a writing spot. The magnetic disk device is capable of controlling a steady state value of a write current for writing into a magnetic disk, an overshoot value, or a width thereof. The magnetic disk device comprises a VMM measurement section that measures a VMM, and a write current setting section that sets the write current, based on a value of the VMM measured by the VMM measurement section, such that a data writing spot is prevented from spreading during writing into the medium and occurrence of side erasure is prevented.
    Type: Application
    Filed: June 14, 2006
    Publication date: September 13, 2007
    Inventor: Yuichiro Yamazaki
  • Patent number: 7269213
    Abstract: A waveform equalizer having a delay element of a feed-forward filter into which a reception signal is inputted is connected via a tap arrangement control switch to a weighting device The output of the weight device is inputted into an adder. The output of the adder is entered into a discriminator to become an equalization output. The equalization output is entered into a delay element of a feed-back filter. The delay element is connected via the tap arrangement control switch to the weighting device. The tap arrangement control switch ON/OFF-controls the tap arrangement. The tap coefficient monitoring unit monitors the tap coefficients of the weighting device. When the equalization operation cannot be carried out, it is restarted from the beginning of the reception signal. An impulse response predictor predicts an impulse response of a transfer path based upon the reception signal and the equalization output.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: September 11, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Takanashi, Takeshi Akiyama
  • Publication number: 20070206306
    Abstract: A recording head drive circuit drives a recording head that records information on a magnetic recording medium. A switching circuit is a H-bridge circuit which includes a plurality of transistors. The switching circuit switches direction of a write current (Iw) flowing in the recording head, in accordance with a conduction state of each transistor. A write current controller controls the write current (Iw) in the recording head. An overshoot control circuit adds an overshoot current (Ios), proportional to the write current (Iw), to the write current (Iw) flowing in the recording head, in a predetermined overshoot time period.
    Type: Application
    Filed: March 1, 2007
    Publication date: September 6, 2007
    Inventor: Shingo Hokuto
  • Patent number: 7265926
    Abstract: A disk drive data storage system, comprising a magnetic disk a head for writing data to the disk, and circuitry for providing a first voltage (HWX) to a first node (N1) and a second voltage (HWY) to a second node (N2). The first and second voltage circuitry comprises a first transistor (421P2) of a first type and coupled to the first node, a first transistor (422N2) of a second type and coupled to the second node, a second transistor (441P2) of the first type and coupled to the second node, and a second transistor (442N2) of the second type and coupled to the node. The system also comprises circuitry for providing, during a first time period, a first biasing signal (VNDY) and a second biasing signal (VPDY) and circuitry for providing, during a second time period, a third biasing signal (VNDX) and a fourth biasing signal (VPDX).
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: September 4, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Reza Sharifi
  • Patent number: 7259929
    Abstract: A magnetic recording/reproducing apparatus includes a partial-response equalization circuit having frequency characteristic of cutting off low-frequency signal components inclusive of DC components; and a maximum-likelihood decoder, in which a reproduced signal outputted from the reproducing head is processed by the partial-response equalization circuit and then inputted into the maximum-likelihood decoder to be data-reproduced, thereby reducing a noise and distortion on the reproduced signal and reducing a data detection error rate.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: August 21, 2007
    Assignee: Hitachi Global Storage Technologies Japan, Ltd.
    Inventors: Hideki Sawaguchi, Yasutaka Nishida, Hisashi Takano, Toru Matsushita
  • Patent number: 7256955
    Abstract: Data is written to a magnetic media, by applying a magnetic write field to the magnetic media with a write pole, in conjunction with a high frequency magnetic field, to the magnetic media to assist writing to the magnetic media. The high frequency magnetic field is generated by applying a specific write current waveform to the magnetic writer, resulting in the generation of a high frequency magnetic write field.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: August 14, 2007
    Assignee: Seagate Technology LLC
    Inventors: Taras G. Pokhil, Victor B. Sapozhnikov, Andrzej A. Stankiewicz, Janusz J. Nowak
  • Patent number: 7256954
    Abstract: An adaptive equalizer comprising a variable filter which equalizes a digital input signal which is input in a time sequential order, an adaptive controller unit which updates a filter coefficient of the variable filter based on an output signal of the variable filter and the input signal and according to an equalization algorithm, and a coefficient resetting unit which resets a filter coefficient of the variable filter at a predetermined timing.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: August 14, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Orimitsu Serizawa
  • Patent number: 7253980
    Abstract: Circuitry for detecting and recording latches in read bias current may include circuitry for generating a reference voltage, a pair of current to voltage converters to convert the bias and reference currents to voltage signals, a comparator to compare those two voltages, a latch to latch the compared signal, and a counter/register to count and store the number of glitches that have been detected. It may be possible to read from the register the number of detected glitches to be used in diagnosing faults in the disk drive system. In addition, it may be possible to provide a reset input to the register to zero the counter.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: August 7, 2007
    Assignee: Maxtor Corporation
    Inventors: Bac Pham, Xiaokun Chew
  • Patent number: 7253978
    Abstract: The invention includes a testing method which may be applied to at least one writer in a disk drive during the self-test phase to generate write parameters, focused on the Over Shoot Control (OSC) of the write current parameter to improve the reliability of write operations by that writer. The Minimum OSC is used for write operations in normal temperatures. The Optimum OSC is used for a first lower temperature range, preferably between essentially 15 degrees Centigrade and essentially 5 degrees Centigrade. The Maximum OSC is preferred below essentially 5 degrees Centigrade. The Minimum OSC should preferably guarantee both an Adjacent Track Write (ATW) criteria, as well as guarantee a Write Induced Instability (WII) criteria. The invention includes the write parameter collection, as well as the disk drive containing the generated write parameter collection.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: August 7, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hae Jung Lee, Sang Lee, Keung Youn Cho
  • Patent number: 7251090
    Abstract: A pattern dependent write equalization method is disclosed. The method includes identifying a trait of a data pattern in a stream of write data. A characteristic of a write equalization signal is then defined according to the identified trait for the data pattern.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: July 31, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Steven L Brittenham
  • Patent number: 7251091
    Abstract: The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: July 31, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Toru Takeuchi, Motomu Hashizume
  • Patent number: 7245444
    Abstract: A method and apparatus for providing a read channel having imbedded channel signal analysis is disclosed. The method and apparatus disclosed determines the types of noise present in a read signal and separates different noises out of the read signal. A signal is read from a storage medium and a written signal is removed from the read signal to produce a noise residue signal. The noise residue signal is converted to a power residue signal. The power residue signal is correlated with a Pseudo Random Bit Sequences (PRBS) sequence used to generate the written signal to produce a deconvolved signal. The deconvolved signal is accumulated.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: July 17, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Richard L. Galbraith, Travis R. Oenning, Eric J. Tree, Bruce A. Wilson
  • Patent number: 7242545
    Abstract: An apparatus, method, and system for providing asymmetric signal correction in a HDD system using magneto-resistive (MR) heads for reading information stored thereon. The MR head produces a signal that is asymmetric, and an asymmetric correction circuit corrects the asymmetric signal for further processing. The asymmetric correction circuitry comprises a differential amplifier having a variable gain for producing a current proportional to the asymmetric signal. The differential amplifier is coupled with two high speed switches for producing an output signal having only positive polarity. When the asymmetric correction output signal combines with the input signal, the resultant signal approximates the inverse distortion of the asymmetric input signal.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: July 10, 2007
    Assignee: Marvell International Ltd.
    Inventor: Chi Fung Cheng
  • Patent number: 7242544
    Abstract: An apparatus for applying write signals including a first write signal and a second write signal to write information to a memory device includes a current directing circuit receiving the write signals and directing a write current to establish a write voltage between first and second write loci in a first or second excursion toward a first or second polarity in response to the first or second write signal. The first and second write loci are coupled with supply locus via an adjacent first or second impedance unit and a first or second switching unit. The first and second switching units are controlled at first and second control loci by the first and second write signals. First and second boost systems are coupled with the first and second control loci for boosting the write voltage toward the first and second polarities during first and second excursions.
    Type: Grant
    Filed: January 10, 2004
    Date of Patent: July 10, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: John Joseph Price, Jr., Tuan Van Ngo
  • Patent number: 7233452
    Abstract: Disclosed is a preamplifier circuit of a magnetic record regeneration apparatus with a write system and a read system, certainly verifying a write function in a short period of time. The preamplifier circuit includes, in the write system, a write driver; a current-voltage conversion circuit for converting the write current from the write driver into a corresponding voltage; a waveform shaping circuit for converting the output voltage from the current-voltage conversion circuit into a full-wave rectified waveform; a peak-hold circuit for holding a peak value of the output from the waveform shaping circuit; a filter circuit for outputting an average voltage of the output from the waveform shaping circuit; and a determination circuit for determining that the write driver is abnormal based on each output status of the peak-hold circuit and the filter circuit.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: June 19, 2007
    Assignee: Fujitsu Limited
    Inventor: Masao Kondou
  • Patent number: 7230783
    Abstract: Mitigation of distortion of read signals from magneto-resistive read head(s) are provided in various embodiments of the present invention. In one embodiment, the read signals provided to a read channel having an analog to digital converter and digital equalizer. Digital peak measurement apparatus is configured to sense the output of the digital equalizer, and provide average positive peak values and average negative peak values of the output. Control apparatus is configured to respond to the peak values, to iteratively determine asymmetry of the peak values and estimate the cancellation slope of the asymmetry and cancellation term relationship; from the measured asymmetry and estimated cancellation slope, to iteratively estimate the convergence cancellation term; and to feed back the convergence cancellation term to modify the digital read signals for the input of the digital equalizer to iteratively converge the asymmetry to substantially zero.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: June 12, 2007
    Assignee: International Business Machines Corporation
    Inventors: Josephine Faith Bayang, Ernest Stewart Gale, David Lee Swanson
  • Patent number: 7230782
    Abstract: A correlation receiver, among other functions, detects peaks of a correlation signal. The correlation receiver includes a master peak detector for determining whether an amplitude of a pulse of the correlation signal exceeds by at least a first delta an amplitude of a prior peak. If so, the master peak detector designates the pulse as a peak and sets an amplitude of the peak as the amplitude of the prior peak increased by a second delta. The master peak detector may also determine whether the amplitude of the correlation signal pulse falls below an amplitude of the prior peak less a droop value; and, if so, the master peak detector does not designate the pulse as a peak.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: June 12, 2007
    Assignee: Quantum Corporation
    Inventor: David Elliott Norton, Jr.
  • Patent number: 7227708
    Abstract: A method for identifying victim tracks distanced from an aggressor track in a hard disk drive that are deleteriously affected by long range fringe effects causing adjacent track interference (ATI) when the aggressor track is written includes writing first and second frequencies to candidate victim tracks, and writing a third frequency to the aggressor track. The amplitudes of the remaining frequencies are read and output and if desired normalized as an indication of ATI to distant victim tracks. Or, data can be written and on-track error rates (OTER) used to determine ATI.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: June 5, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Joseph Shao-Ying Feng