Abstract: Aspects of the disclosure pertain to a system and method for providing zero gain start (ZGS) and gain acquisition based on an adaptive analog-to-digital converter (ADC) target. The adaptive ADC target is used to collect channel characteristics and based on the adaptive ADC target, an adjusted 2T amplitude target value is generated.

Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the disk, and control circuitry coupled to or otherwise associated with the read/write head. The control circuitry comprises a write driver configured to generate a write signal for data to be written to the storage disk, and a multiple-slope transition controller associated with the write driver and configured to control a data transition in the write signal such that the data transition comprises at least two different segments each having a different slope, with the transition controller comprising separate slope control mechanisms for each of the segments. By way of example, the data transition may comprise a dual-slope transition having first and second segments arranged sequentially between a start point and an end point of the data transition.

Abstract: In one embodiment, an apparatus an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier, the input node receiving the asymmetric signal. A second resistance is coupled to the input node of the amplifier. The second resistance includes a linear resistor. A third resistance is coupled to the second resistance. The third resistance is varied to adjust an amount of asymmetric correction provided by the amplifier to correct the asymmetric signal at the output node. The amount of asymmetric correction is a function of the first resistance and a combination of the second resistance and the third resistance.

Abstract: A storage controller includes a device controller and a read data channel. The read data channel includes a decoder for decoding output of a detector, where the detector is for reading data requested from a storage medium by the device controller, and the storage medium has a plurality of tracks of data thereon. When the device controller requests data from a current track of data on the storage device, the detector reads an adjacent track of data, the decoder decodes data from the adjacent track of data, the detector reads data from the current track, and the decoder decodes the data read from the current track, based on the decoded and stored data from the adjacent track of data. A storage system includes a storage medium having a plurality of tracks of data thereon and a storage controller as described above.

Abstract: Interface circuitry of a storage device or other type of processing device comprises at least one data path, and an adaptive power supply configured to provide a variable supply voltage to the data path. The adaptive power supply comprises a reference voltage circuit having a plurality of field effect transistors collectively configured to provide a variable reference voltage, with different ones of the field effect transistors being biased into different operating regions. For example, a first subset of the field effect transistors may each be biased into a linear region such that the variable reference voltage tracks variations in on-resistance of one or more corresponding field effect transistors of the data path, and a second subset of the field effect transistors may each be biased into a saturation region such that the variable reference voltage tracks variations in threshold voltage of the corresponding field effect transistors of the data path.

Abstract: A first parameter associated with a writer preamp is defined. A write current of the writer preamp is adjusted in accordance with the first parameter so that an asymmetric signal is applied at a write head. The asymmetric signal results in symmetric writing of bits to a medium.

Abstract: A measuring circuit system in a magnetic field measuring apparatus of the invention has an amplifier and a band-pass filter connected in sequence on an output terminal side of the TMR element, the band-pass filter is a narrow-range band-pass filter such that a peak pass frequency of the filter that is a center is a basic frequency selected from a range of 10 to 40 GHz and a band width centered around the basic frequency is a narrow range of ±0.5 to ±4 GHz; and with the measuring circuit system, an S/N ratio (SNR) of 3 dB or greater is obtained, the SNR being defined by a ratio of an amplitude S of a high-frequency generated signal induced by the TMR element to a total noise N that is a sum of a head noise generated by the TMR element and a circuit noise generated by the amplifier. With such a configuration, an in-plane high-frequency magnetic field generated by a microwave-assisted magnetic head is reliably and precisely measured.

Abstract: A disk drive is disclosed comprising a head actuated over a disk, and a fly height transducer operable to generate a fly height signal for the head. The disk drive further comprises control circuitry comprising a current sensor operable to detect a current flowing through the fly height transducer. The current sensor comprises a differential amplifier operable to amplify the current flowing through the fly height transducer over a first range using a first gain, and amplify the current flowing through the fly height transducer over a second range using a second gain less than the first gain, wherein at least part of the second range is different than the first range.

Abstract: In one embodiment, an apparatus includes an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier. A second resistance is coupled to the input node of the amplifier. A first switch is configured to be controlled during a first interval to couple the second resistance to a positive resistance to increase a gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the positive resistance. A second switch is configured to be controlled during a second interval to couple the second resistance to a negative resistance to decrease the gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the negative resistance.

Abstract: A system includes a read channel circuit configured to output a write signal, and output a write enable signal that indicates a write operation. A preamplifier circuit includes a write amplifier configured to amplify the write signal and provide the amplified write signal to a read/write device. A read amplifier is configured to amplify a read signal received from the read/write device. A circuit is configured to receive the amplified write signal from the write amplifier, receive the amplified read signal from the read amplifier, receive the write enable signal from the read channel circuit, and provide, to the read channel circuit, a selected one of the amplified write signal and the amplified read signal based on the write enable signal.

Abstract: A method and apparatus for reading electronic memory comprising a current source, a spin transfer oscillator, an external field source, coupled to the current source, for generating an RF signal, the spin torque oscillator positioned proximate a magnetic media comprising a plurality of bit regions of varying magnetic permeability, wherein a frequency of the RF signal varies in response to the permeability of a bit region in the plurality of bit regions being proximate the spin torque oscillator.

Abstract: A receiver for a hard disk drive system includes an analog front end module configured to receive a read-back signal and to output a digital read-back signal. An equalizer module is configured to generate a data vector based on the digital read-back signal. A detector module is configured to generate a decision vector based on the data vector. A gain module is configured to generate a scalar gain vector and to generate a revised data vector based on the data vector, the decision vector and the scalar gain vector. A back end module is configured to receive the revised data vector.

Abstract: A method for calibrating a reflection compensator is provided. A delay is initially set to a predetermined minimum, and an input pulse is transmitted across a transmission line. A compensation current is then applied after the delay. The reflection from the transmission line is digitized to generate a measurement, and a determination is made as to whether the compensation current substantially compensates for the reflection. If the compensation current does not substantially compensate for the reflection, then the delay is adjusted, and the process is repeated until the compensation current substantially compensates for the reflection.

Abstract: A method is provided. A first CMOS switch is deactivated while activating a second CMOS switch to cause the portion of the write signal to transition from a first direct current (DC) voltage to a first peak voltage. After a first interval, the second CMOS switch is deactivated while activating a third CMOS switch to cause the portion of the write signal to transition from the first peak voltage to a second DC voltage. After a second interval, the third CMOS switch is deactivated while activating a fourth CMOS switch to cause the portion of the write signal to transition from the second DC voltage to a second peak voltage After a third interval, the fourth CMOS switch is deactivated while activating the first CMOS switch to cause the portion of the write signal to transition from the second peak voltage to the first DC voltage.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to data processing using distortion-correction loops with saturation-based assistance.

Abstract: A write driver circuit for generating a write current pulse for use by a magnetic write head includes an output stage adapted for connection with the magnetic write head and a charge storage circuit connected with the output stage. The charge storage circuit is operative in a first mode to store a prescribed charge and is operative in a second mode to transfer at least a portion of the charge stored therein to the output stage to thereby enable an output voltage level of the output stage to extend beyond a voltage supply rail of the write driver circuit. A control circuit in the write driver circuit is operative to generate at least one control signal for selectively controlling a mode of operation of the charge storage circuit.

Abstract: Systems and methods are included for determining a presence of an upcoming reading field during a write mode of a storage device, and initiating a read-while write (RWW) mode of the storage device in response to the sensed reading field. Initiating the RWW mode comprises warming up the reader circuitry, generating a signal in response to an end to the write operation, and activating reader bias current in response to the generated signal.

Abstract: Approaches for determining the timing latency of a communication path are described. Some embodiments involve a method for testing timing latency. A signal is driven on a first data path and is returned through a second data path through a loop back element. The timing latency of at least a portion of the communication path that includes the first data path and the second data path is tested using the signal returned on the second data path. The gain of the second data path is adjusted to a test value during the testing of the timing latency.

Abstract: Various embodiments of the present invention provide systems and methods for detecting contact. For example, a method for detecting head contact is disclosed that includes: receiving an interface signal operable to indicate a physical contact between a sensing device and a storage medium; band pass filtering a data set derived from the interface signal to yield a band pass filtered output; comparing the band pass filtered output to a level threshold to yield a comparator output; summing the comparator output with at least one prior instance of the comparator output to yield an aggregated value; and comparing the aggregated value to an aggregate threshold to yield a contact output.

Abstract: Disclosed is a technique of providing a large-capacity magnetic storage device at high device manufacturing yield while keeping the reliability, the magnetic storage device enabling recording on a perpendicular magnetic recording medium having distribution of characteristics in the circumferential direction as well at high track density of 500 kTPI or more that would be expected from the average characteristics of the medium. A recording condition from is selected for each sector from a parameter table that stores a set of at least two types of recording conditions by a microwave assisted magnetic recording head including a magnetic recording pole and a high-frequency magnetic field oscillator in the magnetic storage device, and information is recorded for each sector based on the condition.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes: a data detector circuit, a low latency detection circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output, and to provide a loop error as a difference between the detected output and the first signal. The low latency detection circuit operable to process a second signal derived from the data input to yield a fast detector output, and to provide a generated error as a difference between the fast detector output and the second signal. The error calculation circuit is operable to calculate an error value based at least in part on the generated error and the loop error.

Abstract: When scenes of a story are divided and dubbed to a plurality of recording media, the recording media are added with information about a total number of recording media used and sequential numbers of the recording media.

Abstract: A first parameter associated with a writer preamp is defined. A write current of the writer preamp is adjusted in accordance with the first parameter so that an asymmetric signal is applied at a write head. The asymmetric signal results in symmetric writing of bits to a medium.

Abstract: Apparatus and method for write delay stabilization. A write driver is adapted to output bipolar write currents to write data to a memory. A preconditioning circuit is adapted to output first and second thermal preconditioning currents through the write driver to stabilize a write delay associated with the write driver to a steady-state level prior to the writing of data to the memory.

Abstract: A method is provided. A first CMOS switch is deactivated while activating a second CMOS switch to cause the portion of the write signal to transition from a first direct current (DC) voltage to a first peak voltage. After a first interval, the second CMOS switch is deactivated while activating a third CMOS switch to cause the portion of the write signal to transition from the first peak voltage to a second DC voltage. After a second interval, the third CMOS switch is deactivated while activating a fourth CMOS switch to cause the portion of the write signal to transition from the second DC voltage to a second peak voltage After a third interval, the fourth CMOS switch is deactivated while activating the first CMOS switch to cause the portion of the write signal to transition from the second peak voltage to the first DC voltage.

Abstract: A hard disk drive with a read channel that averages data before the data is provided to a viterbi detector of the channel. Averaging the data reduces the zero mean noise in the data.

Abstract: Various embodiments of the present invention provide systems and methods for data writing. As an example, a heat assisted loopback circuit is discussed that includes: a read circuit, a magnetic write circuit, a heat write circuit, and a loopback circuit. The read circuit is operable to sense data from a storage medium, and to provide the sensed data as a read output. The magnetic write circuit is operable to provide a write output corresponding to an excitation signal of a write head. The heat write circuit is operable to provide a heat output corresponding to an excitation signal of a heat source. The loopback circuit is operable to selectively couple a derivative of the heat output to the read output and to selectively couple a derivative of the write output to the read output.

Abstract: A magnetic recording device includes a magnetic disk and a magnetic head that performs magnetic recording to the magnetic disk. The magnetic head includes a main magnetic pole layer and a microwave generating element. The magnetic recording device further includes a microwave generating element driving current control circuit. The microwave generating element driving current control circuit, during the magnetic recording, applies a microwave generating element driving current at a first current level to the microwave generating element for a period that is from at the latest a polarity reversal of the recording current before a subsequent polarity reversal of the recording voltage, and thereafter applies another microwave generating element driving current at a second current level, which is smaller than the first current level, to the microwave generating element, or stops the application of the another microwave generating element driving current until the polarity reversal of the recording voltage.

Abstract: A method to compensate for spacing variations between a dynamic fly height (DFH) controlled read/write head and a rotating disk surface. Using a HDI sensor or equivalent indicator of touchdowns, a power profile is calculated for an arbitrary track on a disk. The profile tracks disk topography by recording touchdown power at each of a series of sectors into which the track is subdivided. The resulting power profile, smoothed and expressed as a function of sector position, substitutes for the usual constant TD power setting that provides only an uncompensated range of spacing variations. A fixed back-off spacing power is added to the power profile enabling the head to fly over the track at a constant spacing. The power profile can be calculated to account for various temperature and pressure conditions.

Abstract: A receiver for a hard disk drive system includes an analog front end module configured to sample a read-back signal and to output a digital read-back signal. An equalizer module is configured to generate a data vector based on the digital read-back signal. A detector module is configured to generate a decision vector based on the data vector. A re-timing module is configured to generate a first revised data vector based on the data vector and the decision vector. The re-timing module re-samples a plurality of samples in the data vector in a non-sequential time order to generate the first revised data vector. An inter-track interference (ITI) cancellation module is configured to remove ITI from the first revised data vector and to generate a second revised data vector.

Abstract: A circuit for use with a memory storage device including a magnetic storage medium and a write head operative to subject the magnetic storage medium to a magnetic field in response to an application of current to the write head, includes a write circuit operative to generate a write current supplied to the write head. The write current is characterized by a current waveform that reverses polarity in accordance with data to be stored on the magnetic medium. The circuit for use with the memory storage device further includes a degauss circuit operative to generate a degaussing current supplied to the write head. The degaussing current is characterized by a current waveform that oscillates between opposite polarities with an amplitude and a frequency that change over time.

Abstract: Various embodiments of the present invention provide systems and methods for determining head polarity. As an example, a head polarity detection circuit includes: a first computation circuit, a second computation circuit, and an inversion determination circuit. The first computation circuit is operable to sum an absolute value of each sample of a first subset of a series of data samples corresponding to a first phase of an analog input to yield a first sum, and the second computation circuit is operable to sum an absolute value of each sample of a second subset of the series of data samples corresponding to a second phase of the analog input to yield a second sum. The first phase is more than ninety degrees offset from the second phase.

Abstract: A data storage system having a read channel configured to function in a normal operation mode and a test mode. In the normal operation mode, the read channel is configured to decode a readback signal to obtain data bits. In the test mode, the read channel is configured to extract gain control loop data and/or timing control loop data from the readback signal.

Abstract: A system including a hard disk control circuit, a read channel circuit, and a preamplifier circuit. The hard disk control circuit is configured to generate a first symbol. The read channel circuit configured to encode the first symbol to generate an encoded symbol. The preamplifier circuit configured to operate in a loopback mode. While operating in the loopback mode, the preamplifier circuit is configured to amplify the encoded symbol and transmit the encoded symbol back to the read channel circuit. The read channel circuit is configured to decode the encoded symbol to generate a second symbol and provide the second symbol to the hard disk control circuit. The hard disk control circuit is configured to perform a comparison between the first symbol and the second symbol and generate an indication of whether the preamplifier circuit is operating properly based on the comparison between the first symbol and the second symbol.

Abstract: A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

Abstract: A control circuit to provide a control current to control an amplitude of a write current in a magnetic media drive. The control circuit has an output circuit for providing the control current with an amplitude dependent on a bias voltage. A bias current path provides the bias voltage to the output circuit, and a current diverting circuit is connected to divert current from the bias current path. A programmable ramp voltage generator operates in response to a degauss enable signal, and a voltage-to-current converter receives the programmable ramp voltage to control the current diverting circuit to divert current from the bias current path at a rate determined by the programmable ramp voltage. The bias voltage and the write current decay according to the programmable ramp voltage. The write current decay can be made linear and independent of a beginning write current amplitude.

Abstract: Various embodiments of the present invention provide systems and methods for reducing low frequency loss in a magnetic storage device. For example, some embodiments provide data processing circuits that include: an input circuit, a processing circuit, a data detection circuit, and a baseline compensation circuit. The input circuit receives a first data input and provides a second data input. The input circuit excludes low frequency energy exhibited in the first data input from the second data input. The processing circuit generates a representation of the second data input, and the data detection circuit generates a representation of the first data input based at least in part on the representation of the second data input.

Abstract: An electronic device includes a power supply line connected between a DC power supply and an integrated circuit, and a first electronic element and a second electronic element serially connected between the power supply line and ground. The second electronic element is open when the first electronic element is short-circuited due to an overvoltage induced in the power supply line. When the overvoltage exceeds a breakdown voltage of the first electronic element, the first electronic element supplies an overcurrent induced in the power supply line to the second electronic element.

Abstract: A disk drive is disclosed comprising a disk including a plurality of tracks, a head actuated over the disk, and control circuitry. The control circuitry is operable to: write a target track including a plurality of data wedges; determine optimization metrics for the data wedges of the plurality of data wedges as the data wedges are read; store the optimization metrics for the data wedges from the target track; and remove a first portion and a second portion of the optimization metrics such that a remaining portion of the optimization metrics remains. Further, the control circuitry is operable to calculate an average optimization metric value for the remaining portion of optimization metrics for use in read channel optimization.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, a data detector circuit, a filter circuit, an error generation circuit, and a target parameter adaptation circuit. The analog to digital converter circuit converts an analog input into corresponding digital samples. The data detector circuit applies a data detection algorithm to a data set derived from the digital samples to yield a detected output. The filter circuit convolves the detected output with a target parameter to yield a target output. The error generation circuit calculates an error value based on the digital samples and the target output. The target parameter adaptation circuit updates the target parameter based at least in part on the error value.

Abstract: One embodiment of the invention includes a system for writing data onto a magnetic disk. An output driver provides a first write current through a first output transistor in a first state and provides a second write current through a second output transistor in a second state. The first and second write currents can be provided to a disk write head to store opposing binary values, respectively. A bias current generator switches a first bias current between an intermediate voltage node in the second state and a first control node in the first state, and switches a second bias current between the intermediate voltage node in the first state and a second control node in the second state. The first and second bias currents can be provided to set a bias voltage at the first and second control nodes to bias the first and second output transistors, respectively.

Abstract: Systems and techniques relating to interpreting signals on a channel having an asymmetrical signal amplitude response are described. A described system includes an asymmetry correction circuit configured to receive an analog signal and to compensate for asymmetry in the received analog signal, a signal equalizer configured to receive an input signal responsive to an output of the asymmetry correction circuit and to generate an equalized signal, a discrete time sequence detector operable to examine the equalized signal, and a control circuit operable to provide a coefficient adjustment to the asymmetry correction circuit to affect asymmetry compensation based on an estimate of nonlinearity derived from the equalized signal and multiple reconstructed ideal channel output values. The reconstructed ideal channel output values can be derived from an output of the discrete time sequence detector and correspond to at least two different discrete times.

Abstract: A magnetic recording disk drive has a fly-height sensor on the slider that supports the read/write head. The head-disk spacing signal from the fly-height sensor utilizes the existing read path between the arm electronics (AE) module and the channel electronics module. A variable gain amplifier (VGA) on the AE module receives as one input the head-disk spacing signal and as the other input an emulated read signal. The output of the VGA is thus an oscillatory signal that emulates the read signal but whose amplitude varies as the head-disk spacing varies. A multiplexer (MUX) on the AE module multiplexes the amplified read signal from the read amplifier with the VGA oscillatory output signal on the read path back to the channel electronics module.

Abstract: Methods and apparatus are provided for processing a signal in a read channel using an oversampled analog to digital conversion. An oversampled analog to digital conversion is performed on an analog input signal to generate a plurality of digital samples corresponding to the analog input signal for a given bit interval. A data detection algorithm can then be applied on one or more of the digital samples to obtain a detected output. The oversampled analog to digital conversion simplifies the analog design by transferring at least a portion of the equalization and/or filtering processes to the digital domain.

Abstract: A method, apparatus, and system are provided for implementing spin-torque oscillator (STO) sensing with a demodulator for hard disk drives. The demodulator measures an instantaneous phase of the readback signal from a STO sensor and converts the readback signal into a signal that is proportional to the magnetic field affecting the STO frequency during a bit time. The converted signal is used for processing by conventional data detection electronics.

Abstract: A magneto-impedance sensor element is formed in a planar type structure in which an amorphous wire is incorporated in a substrate. The magneto-impedance sensor element includes a nonmagnetic substrate, an amorphous wire arranged in an aligning direction of a planar pattern that forms a detecting coil, a spiral detecting coil formed of a planar pattern and a cubic pattern on an outer periphery of the amorphous wire, a planar insulating portion that insulates the planar pattern from the amorphous wire, a wire fixing portion to fix the amorphous wire on an upper surface of the planar insulating portion, and a cubic insulating portion that insulates the cubic pattern from the amorphous wire.

Abstract: A system including a first circuit and a second circuit. The first circuit is configured to (i) select a first portion of a signal based on a first offset, (ii) amplify the first portion of the signal according to a first function, and (iii) scale the amplified first portion based on a first factor to generate a first compensation for asymmetry in the first portion of the signal. The second circuit is configured to (i) select a second portion of the signal based on a second offset, (ii) amplify the second portion according to a second function, and (iii) scale the amplified second portion based on a second factor to generate a second compensation for asymmetry in the second portion of the signal.

Abstract: Write enhancement circuitry on the head carrier of a magnetic recording disk drive provides additional write current overshoot beyond that provided by the write driver circuitry. The write enhancement circuitry is formed on the head carrier as ladder network blocks. A first ladder network block is a first capacitor C1 located in parallel with the write coil. The second ladder network block includes a second capacitor C2 having substantially the same inductance L2. The compensation circuitry is referred to as a ladder network because additional ladder blocks, like the second block but with different values of capacitance and inductance, may be located on the head carrier.

Abstract: Various embodiments of the present invention provide systems and methods for reducing low frequency loss in a magnetic storage device. For example, a data processing circuit is disclosed that includes an amplifier, two filters and a summation element. The amplifier provides an amplified output that is filtered using a first of the two filters to create a first filtered output. The first filtered output is then filtered using the second of the two filters to create a second filtered output. The summation element sums the first filtered output with the second filtered output to provide a pole altered output.

Abstract: A storage controller includes a device controller and a read data channel. The read data channel includes a decoder for decoding output of a detector, where the detector is for reading data requested from a storage medium by the device controller, and the storage medium has a plurality of tracks of data thereon. When the device controller requests data from a current track of data on the storage device, the detector reads an adjacent track of data, the decoder decodes data from the adjacent track of data, the detector reads data from the current track, and the decoder decodes the data read from the current track, based on the decoded and stored data from the adjacent track of data. A storage system includes a storage medium having a plurality of tracks of data thereon and a storage controller as described above.