Abstract: A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.

Abstract: In a capacitor body of a multilayer capacitor, one second capacitor portion is sandwiched between two first capacitor portions. An ESR is controlled by setting a width of lead portions of third and fourth internal electrodes disposed in the second capacitor portion to be less than that of lead portions of first and second internal electrodes disposed in the first capacitor portions and by changing ratios between the first and second capacitor portions in the width of the lead portions and in the number of stacked internal electrodes. In the first capacitor portions, current paths from the internal electrodes to an external terminal electrode are widely distributed so that the first capacitor portions have a relatively low ESL, and accordingly, the ESL of the entire multilayer capacitor is reduced.

Abstract: An energy storage device such as a metal-insulator-metal capacitor and a method for manufacturing the energy storage device. The metal-insulator-metal capacitor includes an insulating material positioned between a bottom electrode or bottom plate and a top electrode or top plate. The surface area of the bottom electrode is greater than the surface area of the insulating material and the surface area of the insulating material is greater than the surface area of the top electrode. The top electrode and the insulating layer have edges that are laterally within and spaced apart from edges of the bottom electrode. A protective layer covers the top electrode, the edges of the top electrode, and the portions of the insulating layer that are uncovered by the top electrode. The protective layer serves as an etch mask during the formation of the bottom electrode.

Abstract: A tunable series resonant circuit includes a voltage source, a source impedance, a variable capacitor, a series inductor, and a load impedance. The variable capacitor includes a sPAC (series programmable array of capacitors) having desirable characteristics for a tunable series resonant circuit. The sPAC may be a binary weighted sPAC, a thermometer coded sPAC, or some other sPAC.

Abstract: An electrical power supply device for a motor vehicle, which includes a tray made of a heat-conducting material, in which there is positioned at least one ultra-high capacity energy storage unit liable to emit heat, the tray including at least one housing to accommodate at least one electrical energy storage unit with the presence of a heat-conducting layer made of a heat conducting adhesive or a heat-conducting resin interposed without clearance between the storage unit and the interior face of the wall of the associated housing so as to conduct the heat emitted by the unit.

Abstract: A metal capacitor includes a plurality of interconnect segments. A first plurality of L-shaped fingers is driven to a first voltage level by a first interconnect segment. A second plurality of L-shaped fingers is driven to a second voltage level by a second interconnect segment. Each of the L-shaped fingers from a set of the first plurality of L-shaped fingers is adjacent to at least one of the L-shaped fingers from a set of the second plurality of L-shaped fingers.

Abstract: A method and structure are provided for implementing surface mount components with symmetric reference balance. A first reference and an incoming signal are received in a surface mounted device (SMD) package and a second reference and the outgoing signal are output from the SMD package. A capacitor structure is defined within the SMD package between the first reference and the second reference. The capacitor structure includes a balanced impedance structure between the first reference and the second reference. A component connected between the received incoming signal and output signal is generally centrally located within the capacitor structure.

Abstract: According to one embodiment of a capacitor module, the capacitor module includes a substrate having a metallization on a first side of the substrate, a plurality of connectors electrically coupled to the metallization and a plurality of capacitors disposed on the metallization. The plurality of capacitors includes a first set of capacitors electrically connected in parallel between a first set of the connectors and a second set of the connectors. The capacitor module further includes a housing enclosing the plurality of capacitors within the capacitor module.

Abstract: An electronic component (2) for application in high pressure environments has a casing (4) entirely filled with an electrically insulating first fluid (F1), whereby the casing (4) exhibits or connects to a volume compensation unit for compensating a volume change of the first fluid (F1). An electric device (1) has at least one such electronic component (2) in a device housing (10), whereby the device housing (10) is filled with a second fluid (F2).

Abstract: A capacitor consisting of two essentially parallel planar L-shaped or C-shaped metal brackets, formed from a thermally and electrically conductive metal and arranged in such a way as to face inwards, between which two or more capacitor elements are connected electrically and thermally, each containing one or more holes for allowing fixing the capacitor to a heat-sink by a mounting bolt. Each of the brackets may have one or more holes drilled in their parallel members.

Abstract: A capacitor includes a main body, a first seat, and a second seat. The main body includes a first end surface and a second end surface opposite to the first end surface. Two first pins extend upward from the first end surface. Two second pins extend downward from the second end surface. The first pins electrically connect the second pins. The first seat includes a first substrate and two first pads, the first seat is positioned on the second end surface of the main body and the first pads are electrically connected to the second pins. The second seat includes a second substrate and two second pads, the second seat is positioned on the first end surface of the main body and the second pads are electrically connected to the first pins.

Abstract: An assembled flexible textile capacitor module including a plurality of flexible textile capacitors and at least one flexible connecting board is provided. The flexible connecting board is connected electrically between two adjacent flexible textile capacitors, so that the flexible textile capacitors are connected in series, in parallel, or in series-parallel.

Abstract: A power capacitor is described herein. The power capacitor includes a housing and at least one capacitor winding. The power capacitor also includes at least one mechanical spring element between the housing and the at least one capacitor winding.

Abstract: A multilayer chip capacitor includes a capacitor body including a first capacitor part and a second capacitor part, first and second external electrodes respectively formed on first and second longer side faces of the capacitor body, and third and fourth external electrodes respectively formed on first and second shorter side faces of the capacitor body. The first capacitor part includes first and second internal electrodes of opposite polarity, and the second capacitor part includes third and fourth internal electrodes of opposite polarity. The first to fourth internal electrodes each have one lead. The first to fourth external electrodes are respectively connected to the leads of the first to fourth internal electrodes. A series resonance frequency of the first capacitor part is different from that of the second capacitor part. Equivalent series resistance (ESR1) of the first capacitor part and the equivalent series resistance (ESR2) of the second capacitor part satisfy ERS1?20 m? and 0.7(ESR1)?ESR2?1.

Abstract: A decoupling device including a lead frame and at least one capacitor unit assembly is provided. The lead frame includes a cathode terminal portion and at least two opposite anode terminal portions located at two ends of the cathode terminal portion. The two anode terminal portions are electrically connected with each other through a conductive line. The capacitor unit assembly includes multiple capacitor elements. The multiple capacitor elements of the capacitor unit assembly is connected in parallel, arrayed on the same plane and disposed on the lead frame. Each capacitor element has a cathode portion and an anode portion opposite to each other. The cathode portion of the capacitor element is electrically connected with the cathode terminal portion. The anode portion of the capacitor element is electrically connected with the anode terminal portion. When multiple capacitor unit assemblies exists, the capacitor unit assemblies are arrayed in a stacked way.

Abstract: A capacitive device is provided. The capacitive device includes a first electrode and a second electrode below the first electrode and spaced apart from the first electrode, wherein at least one of the first electrode and the second electrode includes a plurality of conductive step sections, the plurality of conductive step sections having different heights. The capacitive device also includes an insulating region between the first electrode and the second electrode; and at least one slot formed on one of the first electrode and the second electrode.

Abstract: A multi-layered capacitor includes three or more capacitor layers. A first layer includes a first DC-biased, tunable capacitor. A second layer, acoustically coupled to the first layer, includes a second DC-biased, tunable capacitor. A third layer, acoustically coupled to the second layer, includes a third DC-biased, tunable capacitor. Each dielectric of the first, second, and third capacitors has a resonance of about the same frequency, within 5%, and inner electrodes of the first, second, and third capacitors have a resonance of about the same frequency, within 5%. The resonance of each layer is a function of at least thickness, density, and material. The first, second, and third layers are biased to generate destructive acoustic interference, and the multi-layer capacitor is operable at frequencies greater than 0.1 GHz.

Abstract: There is provided a capacitor unit including plural capacitors, each including end face electrode at one end face and side face electrode having a polarity different from end face electrode at a side face, arranged side by side; bus bar connected to end face electrode of capacitor, and partially connected to side face electrode of adjacent capacitor unit; and a circuit substrate arranged at the one end face sides or the other end face sides of plural capacitors; wherein bus bar and the circuit substrate are electrically connected through conductive portion arranged from bus bar towards the circuit substrate.

Abstract: Disclosed herein is a capacitative element, including: a first electrode formed on a substrate; and a second electrode provided so as to sandwich a dielectric between the first electrode and the second electrode and so as to surround the first electrode on four sides along a surface of the substrate.

Abstract: A modularized capacitor array includes a plurality of capacitor modules. Each capacitor module includes a capacitor and a switching device that is configured to electrically disconnect the capacitor. The switching device includes a sensing unit configured to detect the level of leakage of the capacitor so that the switching device disconnects the capacitor electrically if the leakage current exceeds a predetermined level. Each capacitor module can include a single capacitor plate, two capacitor plates, or more than two capacitor plates. The leakage sensors and switching devices are employed to electrically disconnect any capacitor module of the capacitor array that becomes leaky, thereby protecting the capacitor array from excessive electrical leakage.

Abstract: In an electronic component and a substrate module, a laminated body includes a first capacitor conductor and a second capacitor conductor embedded therein, which define a capacitor. First and second external electrodes are connected to the first capacitor conductor and the second capacitor conductor through extraction conductors, respectively. Third and fourth external electrodes are connected to the first capacitor conductor through extraction conductors. Fifth and sixth external electrodes are connected to the second capacitor conductor through extraction conductors. On a first side surface, no external electrode having an electrical potential different from the electrical potential of the third external electrode is provided between a first end surface and the third external electrode.

Abstract: A series of capacitors arranged in a way to prevent build up of electric flux between the plates of adjacent capacitors. The capacitors are electrically wired and provided with means to charge them by deriving electrical energy from a power source. The capacitors are also provided with means to discharge them one at a time at predetermined interval and during discharging, momentarily activate a motor. As the motor is activated during the discharge event of a capacitor it rotates a shaft which has means to engage and rotate a second shaft mounted with a flywheel. The first shaft will have means to disengage itself from the second shaft in between the discharge events of any two capacitors. The second shaft is connected to a third shaft through a gear box allowing it to rotate at desired rpm. The third shaft is also connected to a generator to produce electricity.

Abstract: A capacitor element for a power capacitor. The capacitor element includes a plurality of series-connected cylindrical sub-elements. Each sub-element includes at least two strips of dielectric material wound in a number of turns. A layer of electrically conductive material is disposed between the turns of the winding. The sub-elements are disposed one outside the other as seen in a direction transversely to the plane of the strip. A strip in an outermost sub-element is longer than the strip in each inwardly lying sub-element. A power capacitor includes a plurality of the capacitor elements, and a capacitor battery includes a plurality of the power capacitors. A method of manufacturing the inventive capacitor element and the use of the inventive power capacitor.

Abstract: A system for providing selective capacitance with a bundled capacitor is described herein. The bundled capacitor can include a housing a cap, a central common terminal, a plurality of auxiliary terminals, an interrupter, an insulating spider, a plurality of individual rolled sandwich like connected capacitors, a thermal fuse, a frangible electrical connection, an insulating layer, a resin, and an expansion chamber. A single phase motor can be connected to the bundled capacitor.

Abstract: A feedthrough capacitor assembly for attachment to a mount having an opening is disclosed. The assembly includes a feedthrough terminal adapted for insertion through said opening for coupling a signal from a first side of the mount to a second side of the mount. The assembly includes a first conductive region extending about and electrically coupled to the feedthrough terminal and a second conductive region extending about the first conductive region. A plurality of capacitors are electrically coupled between the first conductive region and the second conductive region. The plurality of capacitors are arranged about the feedthrough terminal with each capacitor having about the same capacitance as each of the other capacitors.

Abstract: This invention discloses a load system for loading an Mcap energy storage module to an apparatus, comprising: a storage unit and a load unit. The storage unit further comprises: a first housing part and a seal for sealing the first housing part. The first housing part includes four side walls, a bottom wall and a first opening. A plurality of Mcap cell are disposed in the first housing part through the first opening. A first electrode formed in a side wall. A second electrode formed in another side wall facing the first side wall. The load unit comprises a second housing part and a seal for sealing the second housing part. The storage unit is loaded into the second housing part through the second opening.

Abstract: The capacitor module includes a capacitor, in which a screw hole is arranged on an outer bottom wall surface of a capacitor case housing a capacitor element, and a heat dissipater, on which a plurality of capacitor cases are fixated by screwing fixation screws in the screw holes of the capacitors. As a result, for example, the capacitor can be fixated with reliability and durability secured even under a condition where very strong vibration is continuously applied, for example, when the capacitor module is mounted on construction machinery. Further, because, an adherence of the outer bottom wall surface of the capacitor case on a fixation surface of the heat dissipater is strengthened by screwing the fixation screw in the screw hole, the capacitor can be cooled down by transferring heat produced by the capacitor to the heat dissipater as needed.

Abstract: A decoupling capacitor is disclosed that has an n-type portion and a p-type portion in a semiconductor. The decoupling capacitor is formed of an NFET transistor and a PFET transistor, the PFET transistor being substantially formed in the n-type portion and the NFET transistor being substantially formed in the p-type portion, a boundary between the n-type portion and the p-type portion being substantially straight. The transistors are arranged such that a source and drain of the PFET transistor are connected to a high voltage rail and a source and drain of the NFET transistor are connected to a low voltage rail.

Abstract: A ceramic electronic component has a ceramic element assembly, external electrodes, and metal terminals. The external electrodes are arranged on the surface of the ceramic element assembly. The external electrodes contain a sintered metal. The metal terminals are electrically connected to the external electrodes, respectively. The external electrode and the metal terminal are directly diffusion-bonded by diffusion of metal in the metal terminals into the external electrodes. The above arrangement provides a ceramic electronic component having highly reliable metal particle bonding and a method for manufacturing the same.

Abstract: A capacitor assembly with a substrate having a first face and a second face. A multiplicity of capacitors are mounted on the first face wherein each capacitor has a first lead and a second lead of opposite polarity to the first lead. A bridge is in electrical contact with multiple first leads. A tree is in electrical contact with the bridge wherein the tree passes through a via of the substrate and is in electrical contact with a first trace of the second face. A second trace is on the second face wherein the second lead is in electrical contact with the second trace.

Abstract: There are a plurality of types of first internal electrodes and each type of first internal electrode includes a first main electrode portion and a first lead portion. A second internal electrode includes a plurality of second main electrode portions forming respective capacitance components with the respective types of first internal electrodes, an interconnection portion connecting between each pair of second main electrode portions, and a second lead portion. Positions of the first lead portions of the respective types of first internal electrodes are different from each other and distances from the first lead portions of the respective types of first internal electrodes to the second lead portion are different from each other. The width of the interconnection portion is smaller than the width of at least one second main electrode portion out of the plurality of second main electrode portions.

Abstract: The present invention provides a metal-oxide-metal (MOM) capacitor structure composed of a first capacitor and a second capacitor. The MOM capacitor structure has a plurality of symmetrical branch sections, which form an interdigitated structure along a plurality of ring contours. The MOM capacitor structure has an optimal geometrical symmetry, and therefore a better capacitance matching effect can be obtained, and the MOM capacitor structure has a higher unit capacitance. In addition, a capacitance value ratio between the first capacitor and the second capacitor can be adjusted according to different requirements in the MOM capacitor structure. Furthermore, the MOM capacitor structure of the present invention does not need additional masks, and the process cost is cheaper. In addition, due to the semiconductor process improvement, a large amount of metal layers can be stacked, and since the distance between the metal layers becomes smaller, the unit capacitance becomes higher.

Abstract: An element body has a major capacitance forming portion to form a first capacitance, and a minor capacitance forming portion to form a plurality of second capacitances smaller than the first capacitance. The major capacitance forming portion includes a first internal electrode connected to a first terminal electrode, and a second internal electrode opposed to the first internal electrode and connected to a second terminal electrode.

Abstract: According to the configuration and the manufacturing method of forming a moisture proof agent on both surfaces of a circuit substrate after soldering a capacitor connection pin in a vertical direction to the circuit substrate, and electrically connecting the capacitor so as to be in a perpendicular direction to the length direction of the capacitor connection pin at the upper space of the circuit substrate, the possibility of the moisture proof agent attaching to the capacitor is eliminated, the productivity enhances since the moisture proof agent can be easily formed on both surfaces of the circuit substrate, and a capacitor unit of miniaturized and low height configuration is realized since the capacitor is mounted in the horizontal direction in the upper space with respect to the circuit substrate.

Abstract: A thin-film device system includes a substrate and a plurality of pillars. The plurality of pillars project from a surface of the substrate. Each of the plurality of pillars have a perimeter that includes at least four protrusions that define at least four recessed regions between the at least four protrusions. Each of the at least four recessed regions of each of the plurality of pillars receives one protrusion from an adjacent one of the plurality of pillars. A thin-film device is fabricated over the plurality of pillars.

Abstract: This invention discloses a load system for loading an Mcap energy storage module to an apparatus, comprising: a storage unit and a load unit. The storage unit further comprises: a first housing part and a seal for sealing the first housing part. The first housing part includes four side walls, a bottom wall and a first opening. A plurality of Mcap cell are disposed in the first housing part through the first opening. A first electrode formed in a side wall. A second electrode formed in another side wall facing the first side wall. The load unit comprises a second housing part and a seal for sealing the second housing part. The storage unit is loaded into the second housing part through the second opening.

Abstract: A capacitor module is provided with a plurality of capacitors juxtaposedly disposed to have electrode terminals that are composed of positive electrode terminals and negative electrode terminals, respectively. Neighboring capacitors, among the plurality of capacitors, are disposed adjacent to each other to define neighboring electrode terminals, among the electrode terminals thereof, with the same polarity.

Abstract: A bus-bar for assembling a capacitor device is disclosed, which is capable of improving the environment of a soldering operation for the bus-bar being soldered to a capacitor device, reducing the inferior rate of the capacitor device while improving the quality of the capacitor device, and reducing the weight of the capacitor module, in soldering the bus-bar to capacitor devices. The lead frame attached to polar plates by soldering is formed thinner than the other parts of the bus-bar, and opening parts having an oval or polygonal shape are formed on a surface of the bus-bar so that two adjoining capacitor devices can be exposed. The lead frame is formed in the opening in order for soldering with the polar plates of the capacitor device.

Abstract: A hard start capacitor replacement unit has a plurality of capacitors in a container sized to fit in existing hard start capacitor space. The capacitors are 4 metallized film capacitors wound in a single cylindrical capacitive element. The container has a common terminal and capacitors value terminals for the plurality of capacitors, which may be connected singly or in combination to provide a selected capacitance. An electronic or other relay connects the selected capacitance in parallel with a motor run capacitor. The hard start capacitor replacement unit is thereby adapted to replace a wide variety of hard start capacitors.

Abstract: A capacitor with a combined with a resistor and/or fuse is described. This safe capacitor can rapidly discharge through the resistor when shorted. The presence of a fuse in series with the capacitor and results in a resistive failure when this opens during and overcurrent condition. Furthermore, the presence of a resistor in parallel to the capacitor allows the energy to be rapidly dissipated when a failure occurs.

Abstract: The invention relates to a capacitor arrangement (1) comprising at least one capacitor (2) having a first electrode (3) connected to a first conductive element (13) and a second electrode (4) connected to a second conductive element (14). The first and second conductive elements (13, 14) of the capacitors are separated by a dielectric (15). The integral capacitors are configured to each form a substantially circular-cylindrical body having a central through opening (17). By virtue of the invention, a compact capacitor arrangement is achieved, which minimizes the risk of electrical sparkovers. The invention is obtained by the introduction of four electrodes, a first and a second electrode (3, 4) being placed adjacent to the outer peripheral surface (18) of the body, whilst a third and a fourth electrode (7, 8) are placed adjacent to the central opening (17) of the body.

Abstract: Vertical parallel plate (VPP) capacitor structures that utilize different spacings between conductive plates in different levels of the capacitor stack. The non-even spacings of the conductive plates in the capacitor stack decrease the susceptibility of the capacitor stack of the VPP capacitor to ESD-promoted failures. The non-even spacings may be material specific in that, for example, the spacings between adjacent conductive plates in different levels of the capacitor stack may be chosen based upon material failure mechanisms for plates containing different materials.

Abstract: A method of fabricating an integrated circuit device includes forming a plurality of lower capacitor electrodes vertically extending from a substrate. The plurality of lower capacitor electrodes respectively include an inner sidewall and an outer sidewall. At least one support pattern is formed vertically extending between ones of the plurality of lower capacitor electrodes from top portions thereof opposite the substrate and along the outer sidewalls thereof towards the substrate to a depth that is greater than a lateral distance between adjacent ones of the plurality of lower capacitor electrodes. A dielectric layer is formed on the support pattern and on outer sidewalls of the plurality of lower capacitor electrodes, and an upper capacitor electrode is formed on the dielectric layer. Related devices are also discussed.

Abstract: A capacitance circuit assembly mounted on a semiconductor chip, and methods for forming the same, are provided. A plurality of divergent capacitors is provided in a parallel circuit connection between first and second ports, the plurality providing at least one Metal Oxide Silicon Capacitor and at least one Vertical Native Capacitor or Metal-Insulator-Metal Capacitor. An assembly has a vertical orientation, a Metal Oxide Silicon capacitor located at the bottom and defining a footprint, with a middle Vertical Native Capacitor having a plurality of horizontal metal layers, including a plurality of parallel positive plates alternating with a plurality of parallel negative plates. In another aspect, vertically asymmetric orientations provide a reduced total parasitic capacitance.

Abstract: A capacitor assembly comprises a capacitor housing wherein a relatively larger main capacitor and at least one relatively smaller secondary capacitor can be enclosed and include an efficient and simple combination of electrical connections from the multiple capacitors to an external electrical connection interface. Another aspect includes a capacitor housing wherein volumetric efficiency is enhanced by the arrangement of the multi-capacitors within a given volume of a cavity of the housing. For a given size main capacitor and one or more secondary capacitors, the total volume of space occupied by those capacitors and the housing is minimized to take up minimum room in an electrical box.

Abstract: The present invention describes systems and methods for providing high-density capacitors. An exemplary embodiment of the present invention provides a high-density capacitor system comprising a substrate and a porous conductive layer formed on the substrate, wherein the porous conductive layer is formed in accordance with a predetermined pattern. Furthermore, the high-density capacitor system includes a dielectric material formed on the porous conductive layer and a second conductive layer formed on the dielectric material. Additionally, the high-density capacitor system includes a plurality of conductive pads configured in communication with the second conductive layer.

Abstract: The invention relates to a module comprising at least two electrical energy storage assemblies (20), each storage assembly (20) comprising a first face topped by a cover (30) electrically connected to said energy storage assembly (20) and a second face opposite the first face, each cover being in contact with a respective end of a strip (40) in order to electrically connect the two storage assemblies (20), in which the strip (40) and the faces of the covers (30) in contact with the strip (40) are flat, the strip (40) being welded to the faces of the covers (30) along weld leads (50, 50?).

Abstract: Some general aspects of the invention relate to a circuit and to a method for analog computation, for example, using switched capacitor integrated circuits. In some examples, a circuit includes a first group of capacitors and a second group of capacitors that may store charges during circuit operation. The first and/or the second group of capacitors may include multiple disjoint subsets of capacitors. An input circuit is provided for receiving a set of input signals and for inducing a charge on each of some or all capacitors in the first group of capacitors according to a corresponding input signal. Switches, for example, transistors controlled by a sequence of clock signals, are used to couple different sets of capacitors. Different configurations of the switches are used to form different sets of the capacitors among which charge can redistribute.

Abstract: A semiconductor device incorporating a capacitor and a method of fabricating the same include a first inter-layer dielectric film formed on a semiconductor substrate, a first electrode pattern formed on the first inter-layer dielectric film, and a capacitor region self-aligned to the first electrode pattern and in which the first inter-layer dielectric film is etched. An MIM capacitor is conformably formed on the sidewall of the first electrode pattern in the capacitor region. In the capacitor region, a first hollow region is formed enclosed by the MIM capacitor and a second electrode pattern fills the first hollow region. The second electrode pattern has a sidewall opposite to the sidewall of the first electrode pattern. The MIM capacitor is conformably formed in the capacitor region that is deepened more than a thickness of an interconnection layer, so that it has a capacitor area wider than an area contacting with the interconnection layer.

Abstract: A set of integrated capacitor arrangements is presented, each of which has a circuitry-effective main capacitor and a connectable correction capacitor. Each capacitor arrangement has an electrically conductive antifuse connection and antifuse interruption between the correction capacitor and the main capacitor, which are produced after the main capacitor has been formed. The connection and interruption enable the capacitance of the capacitor arrangement to be corrected.