Multiple Capacitors Patents (Class 361/328)
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Patent number: 6646859Abstract: A power supply arrangement, especially in connection with a conductor (5) of a medium-voltage overhead line, which arrangement comprises a power supply (2) and a first and second element (3, 4) made of an electrically conductive material, which are connected electrically to the power supply for feeding energy to the power supply. The first element (3) of the power supply arrangement is arranged to be close to the conductor (5) and has a capacitance (Ce) to an element in a second potential, the capacitance being arranged to charge itself by effect of an electric field generated by the voltage of the medium-voltage conductor, and said second element (4) is arranged to have a galvanic or capacitive connection with the conductor (5) for feeding energy to the power supply (2) from the potential difference between said first and second elements.Type: GrantFiled: September 19, 2002Date of Patent: November 11, 2003Assignee: ABB Technology AGInventors: Olavi Vähämäki, Tero Talvitie, Kari Rautiainen, Lassi Toivonen
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Patent number: 6639785Abstract: The capacitor component is mounted on a component assembly carrier provided with electronic circuit elements. The capacitor component includes at least two capacitors (C1, C2) formed on a common dielectric substrate plate (1). To avoid production-caused fluctuations in the capacitances in the production of identical kinds of capacitors with the same capacitances, first and third electrode layers for the capacitors (C1, C2) are applied at the same time to the top side of the dielectric substrate plate, and the second and fourth electrode layers are applied at the same time to the underside of the dielectric substrate plate opposite to the first and third dielectric layers respectively. The spatial dimensions of the third electrode layer correspond to the dimensions of the first electrode layer, and the spatial dimensions of the fourth electrode layer correspond to the dimensions of the second electrode layer, so that the respective capacitances of the capacitors (C1, C2) are matched as precisely as possible.Type: GrantFiled: June 18, 2002Date of Patent: October 28, 2003Assignee: Marconi Communications GmbHInventor: Udo Pursche
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Patent number: 6631071Abstract: A reliable capacitor module is provided which can solve the following problem: when a plurality of capacitors is mounted on a wiring board, the wiring board is distorted and deformed by the weight and cracks appear on mounting holes and the main body of the wiring board. The bottoms of metallic cases of the capacitors are fit in recesses formed on a mounting plate. In this state, lead wires drawn from the upper surfaces of the capacitors are electrically connected via the wiring board. With this configuration, a weight load of the plurality of capacitors is not applied at all, thereby preventing distortion and deformation of the wiring board and vibration causing cracks on the main body of the wiring board.Type: GrantFiled: January 14, 2003Date of Patent: October 7, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Kitagawa, Tatehiko Inoue, Isao Masumoto, Koji Tsuyuki
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Patent number: 6627343Abstract: Disclosed is an electric energy storage device having a large capacity and includes a thin active material layer and a plurality of integrated electrodes. The electric energy storage device comprises at least one electrode group in which a cathode, a separator and an anode are in regular sequence, repeatedly integrated and wound into a plate shape. The electrode group has lead lines collected at a predetermined place for a connection with a terminal. Since the cathode and anode are wound with the insertion of the separator between them, the increase of the number of the lead lines is advantageous. In addition, the lead lines can be preferably formed by cutting each portion of the electrode at once by utilizing an apparatus such as a press, the manufacture of the electric energy storage device having a large capacity is advantageous.Type: GrantFiled: September 12, 2000Date of Patent: September 30, 2003Assignee: Ness Capacitor Co., Ltd.Inventors: Seong-Min Kim, Yong-Ho Jung, Sun-Uk Kim
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Patent number: 6614645Abstract: A capacitor array of the present invention has a plurality of core capacitors arranged in a plurality of rows and a plurality of columns. A plurality of guard capacitors are arranged such that there is a guard capacitor at the beginning and end of each of the rows and columns of core capacitors. A plurality of fringe capacitors are arranged between the guard capacitors and the core capacitors. The top plates of the core capacitors and the top plates of the fringe capacitors are coupled to a first node of a circuit. The top and bottom plates of the guard capacitors and the bottom plates of the fringe capacitors are coupled to ground. The each of the bottom plates of the core capacitors are independently coupled to a respective independent node of the circuit. The various capacitors of the array and the means for coupling them are uniformly distributed such that each core capacitor is uniformly influenced by its adjacent structure.Type: GrantFiled: November 12, 2002Date of Patent: September 2, 2003Assignee: National Semiconductor CorporationInventors: Satoshi Sakurai, Jason Chin
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Patent number: 6611421Abstract: Non-polar tantalum capacitors and non-polar tantalum capacitor arrays with compact designs are provided. The reduced volume and footprint of the capacitors and arrays in turn reduces the amount of space required in any device in which they are used. In addition, the cost of materials is reduced, and the manufacturing is simplified. Some embodiments of the present invention provide an electromechanical connector between the anode rods of each pair of polar tantalum capacitors, and insulation between the remainder of the capacitor bodies, thus providing a non-polar tantalum capacitor. These non-polar capacitors are mechanically connected to make a non-polar tantalum capacitor array. Other embodiments of the present invention provide for physically connecting the anode rods of the polar capacitors. An insulating encapsulant around the connected rods and between the polar capacitor bodies also holds the capacitors and capacitor arrays together.Type: GrantFiled: September 7, 2001Date of Patent: August 26, 2003Assignees: AVX Corporation, Advanced Bionics CorporationInventors: Paul M. Meadows, James A. McAllister, David H. Payne, Douglas M. Edson
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Publication number: 20030133251Abstract: A reliable capacitor module is provided which can solve the following problem: when a plurality of capacitors is mounted on a wiring board, the wiring board is distorted and deformed by the weight and cracks appear on mounting holes and the main body of the wiring board. The bottoms of metallic cases of the capacitors are fit in recesses formed on a mounting plate. In this state, lead wires drawn from the upper surfaces of the capacitors are electrically connected via the wiring board. With this configuration, a weight load of the plurality of capacitors is not applied at all, thereby preventing distortion and deformation of the wiring board and vibration causing cracks on the main body of the wiring board.Type: ApplicationFiled: January 14, 2003Publication date: July 17, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Kitagawa, Tatehiko Inoue, Isao Masumoto, Koji Tsuyuki
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Patent number: 6574091Abstract: A multichannel parallel IC amplifier includes a plurality of amplifier circuits formed on an IC substrate. Each amplifier circuit is coupled to respective inputs via a pair of capacitors. The capacitors are configured so as to substantially equalize like sense and unlike sense coupling between adjacent channels, leading to cancellation of crosstalk signals.Type: GrantFiled: August 14, 2002Date of Patent: June 3, 2003Assignee: International Business Machines CorporationInventors: Randolph B. Heineke, Scott Allen Olson, David John Orser
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Patent number: 6563691Abstract: The mounting structure has a plurality of unit capacitors (1) comprising ceramic capacitor elements (2) with terminals (3), (4), and a three-tier substrate (10) comprising an insulating layer (11) sandwiched between two electrodes (12), (13). A plurality of apertures (15) is formed in the first electrode, in which are positioned bosses (16) being continuous with the second electrode (13), while the plurality of unit capacitors (1) is arranged on the first electrode (12), one terminal of each unit capacitor (1) being in contact with the first electrode (12) and the other with the second electrode (13) via a boss (16) so as to connect all the unit capacitors (1) electrically in parallel fashion. In this manner a mounting structure for capacitors is provided which permits of high capacity in a compact form.Type: GrantFiled: September 18, 2001Date of Patent: May 13, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Kenji Kijima, Kihei Nakajima
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Patent number: 6525921Abstract: A capacitor-mounted metal foil of the present invention is provided with a metal foil and a plurality of capacitors formed on the metal foil. Each of the capacitors includes a conductive layer disposed above the metal foil, and a dielectric layer disposed between the metal foil and the conductive layer.Type: GrantFiled: November 9, 2000Date of Patent: February 25, 2003Assignee: Matsushita Electric Industrial Co., LTDInventors: Seiichi Nakatani, Koichi Hirano, Mikinari Shimada, Yasuhiro Sugaya
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Patent number: 6522544Abstract: A power module includes a box-shaped smoothing capacitor (20) for smoothing a DC supply voltage to be externally applied to a power semiconductor device (5). The smoothing capacitor (20) is in contact with a side surface of a case frame (6) including a side (along which an N-terminal (8N) and a P-terminal (8P) are arranged) of a top surface of the case frame (6), and has a top surface level with the top surface of the case frame (6). An N-electrode (21N) and a P-electrode (21P) of the smoothing capacitor (20) are disposed on the top surface of the smoothing capacitor (20) and in proximity to the N-terminal (8N) and the P-terminal (8P) of a power module body portion (99), respectively. The power module can reduce a circuit inductance, is reduced in size and weight, and has good resistance to vibration.Type: GrantFiled: October 17, 2000Date of Patent: February 18, 2003Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Nobuyoshi Kimoto, Takanobu Yoshida, Naoki Yoshimatsu, Masuo Koga, Dai Nakajima, Gourab Majumdar, Masakazu Fukada
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Patent number: 6496353Abstract: A capacitive structure includes two parallel plate capacitors configured for placing between coaxial cables. The first parallel plate capacitor includes an upper conductive plate and a lower conductive plate that are substantially parallel to one another and separated from one another by a first dielectric material. The second parallel plate capacitor includes an upper conductive plate and lower conductive plate that are substantially parallel to one another and separated by a second dielectric material. The lower conductive plate of the first capacitor is engaged against, and thereby connected to, the upper conductive plate of the second capacitor. A conductive clip connects the upper conductive plate of the first capacitor to the lower conductive plate of the second capacitor.Type: GrantFiled: January 30, 2002Date of Patent: December 17, 2002Assignee: Anritsu CompanyInventor: Vincent Chio
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Patent number: 6496356Abstract: A method of forming a capacitive core structure and of forming a circuitized printed wiring board from the core structure and the resulting structures are provided. The capacitive core structure is formed by providing a central conducting plane of a sheet of conductive material and forming at least one clearance hole in the central conducting plane. First and second external conducting planes are laminated to opposite sides of the ground plane with a film of dielectric material between each of the first and second external planes and the central conducting plane. At least one clearance hole is formed in each of the first and second external planes. A circuitized wiring board structure can be formed by laminating a capacitive core structure between two circuitized structures. The invention also relates to the structures formed by these methods.Type: GrantFiled: December 21, 2001Date of Patent: December 17, 2002Assignee: International Business Machines CorporationInventors: Robert M. Japp, John M. Lauffer, Konstantinos I. Papathomas
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Patent number: 6465732Abstract: A method and device for forming metal capacitor and integrated coaxial lines using energy transfer so as to form conductive links among conductors. Conductors are embedded within nonconductive layers, such that the conductors form a matrix of at least three levels. A source of energy is directed at the layers, such that at least one conductor is wholly shielded by at least one other conductor, and conductive paths form so that a conductor becomes shielded by the paths. Particular conductive path formation is encouraged by use of: differing surface areas of conductors; diffusion barriers to increase relative energy absorption; varied relative distances among conductors; some conductors having a lower melting point than other conductors; directing the energy to conductors in a particular order; or combinations thereof. In one variation, links among differing layers are formed using more than one energy source or sequentially generated and directed pulses of energy.Type: GrantFiled: February 23, 2001Date of Patent: October 15, 2002Inventor: Michael Dueweke
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Patent number: 6459563Abstract: An electronic package which has a polygonal shaped heat slug. The heat slug extends from a top surface of a package which has a plurality of vias. The package also has a number of capacitors that are mounted to the top surface. Some of the capacitors are located between the heat slug and the vias. The polygonal shape of the heat slug provides additional space on the top surface so that capacitors can be added without eliminating vias from the package.Type: GrantFiled: April 25, 2001Date of Patent: October 1, 2002Assignee: Intel CorporationInventors: Robert J. Chroneos, Jr., Koushik Banerjee
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Publication number: 20020134581Abstract: A hybrid capacitor associated with an integrated circuit package provides multiple levels of excess, off-chip capacitance to die loads. The hybrid capacitor includes a low inductance, parallel plate capacitor embedded within the package, and electrically connected to a second source of off-chip capacitance. The parallel plate capacitor is disposed underneath a die, and includes a top conductive layer, a bottom conductive layer, and a thin dielectric layer that electrically isolates the top and bottom layers. The second source of off-chip capacitance is a set of self-aligned via capacitors, and/or one or more discrete capacitors, and/or an additional parallel plate capacitor. Each of the self-aligned via capacitors is embedded within the package, and has an inner conductor and an outer conductor. The inner conductor is electrically connected to either the top or bottom conductive layer, and the outer conductor is electrically connected to the other conductive layer.Type: ApplicationFiled: May 24, 2002Publication date: September 26, 2002Applicant: Intel CorporationInventors: David G. Figueroa, Yuan-Liang Li, Huong T. Do
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Patent number: 6441459Abstract: A multilayer electronic device comprised of a capacitor body in which a plurality of internal electrodes are separately arranged in a plurality of blocks via ceramic layers. At least one lead is led out from each internal electrode. The terminal electrodes connected to each lead is arranged at the side faces of the capacitor body. The polarities of the voltages supplied to the nearby terminal electrodes in the same side face differ.Type: GrantFiled: July 7, 2000Date of Patent: August 27, 2002Assignee: TDK CorporationInventors: Masaaki Togashi, Taisuke Ahiko, Osamu Honjyo
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Publication number: 20020089813Abstract: An electronic device includes on a substrate: a plurality of first capacitors each including a first electrode and a second electrode opposing the first electrode via a first dielectric layer; a plurality of second capacitors each including a third electrode electrically connected to the first electrode and a fourth electrode opposing the third electrode via a second dielectric layer; a first line whose electrical connection to the first electrode and the third electrode is turned ON/OFF by a first switching element; a second line electrically connected to the second electrode at least temporarily; a third line whose electrical connection to the fourth electrode is turned ON/OFF by a second switching element; and a fourth line whose electrical connection to the fourth electrode is turned ON/OFF by a third switching element.Type: ApplicationFiled: December 20, 2001Publication date: July 11, 2002Applicant: Sharp Kabushiki KaishaInventors: Tomohiko Yamamoto, Keiichi Tanaka, Hideki Ichioka, Naoto Inoue, Koji Fujiwara
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Patent number: 6407903Abstract: A partial discharge analysis (PDA) coupling device contains a shell, a potting material in the shell encapsulating at least two capacitors and a conductive, flexible joint connecting the capacitors. The joint may be a hose clamp or a spring which expands during the thermal expansion of the potting material while providing an electrical connection between the capacitors.Type: GrantFiled: November 29, 1999Date of Patent: June 18, 2002Assignee: General Electric CompanyInventors: John Raymond Krahn, Charles Edward Baumgartner
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Patent number: 6407720Abstract: A quadrifilar helix antenna is provided having a feedpoint for the antenna connecting to individual helical antenna elements. Each antenna element comprises a normal helix element with a plurality of series capacitors inserted along the element length with a maximum capacitor value at a feed end and a minimum capacitor value at a remote or unfed end. Again, the element is not simply a series of connected capacitors-if it were it would not radiate. The element is a normal element, which is inductive, which has had capacitors inserted along its length.Type: GrantFiled: June 23, 2000Date of Patent: June 18, 2002Assignee: The United States of America as represented by the Secretary of the NavyInventor: Michael J. Josypenko
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Patent number: 6385033Abstract: A fingered capacitor in an integrated circuit. A first capacitor element is formed in a first layer of an integrated circuit (IC) die. The first capacitor element includes a positive plate and a negative plate. Each of the positive and negative plates of the first capacitor element has a plurality of fingers interdigitated with the fingers of the other of the positive and negative plates of the first capacitor element. The fingers are separated by a dielectric. The interdigitated fingers cooperate to generate fringe capacitance between neighboring fingers. A plurality of capacitor elements having interdigitated fingers can be provided in adjacent layers of the IC die.Type: GrantFiled: September 29, 2000Date of Patent: May 7, 2002Assignee: Intel CorporationInventors: Jahanshir J. Javanifard, Hari R. Giduturi, Mathew B. Nazareth
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Publication number: 20020048139Abstract: Non-polar tantalum capacitors and non-polar tantalum capacitor arrays with compact designs are provided. The reduced volume and footprint of the capacitors and arrays in turn reduces the amount of space required in any device in which they are used. In addition, the cost of materials is reduced, and the manufacturing is simplified. Some embodiments of the present invention provide an electromechanical connector between the anode rods of each pair of polar tantalum capacitors, and insulation between the remainder of the capacitor bodies, thus providing a non-polar tantalum capacitor. These non-polar capacitors are mechanically connected to make a non-polar tantalum capacitor array. Other embodiments of the present invention provide for physically connecting the anode rods of the polar capacitors. An insulating encapsulant around the connected rods and between the polar capacitor bodies also holds the capacitors and capacitor arrays together.Type: ApplicationFiled: September 7, 2001Publication date: April 25, 2002Applicant: AVX CorporationInventors: Paul M. Meadows, James A. McAllister, David H. Payne, Douglas M. Edson
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Publication number: 20010055194Abstract: An inverter capacitor module includes a plurality of substrates having a plurality of ceramic capacitors provided on the top surfaces thereof, and first and second feeding unit lands having conductive films provided on both surfaces thereof and arranged to feed the plurality of ceramic capacitors, the first and second feeding unit lands on both surfaces thereof being electrically connected to each other, a conductive spacer inserted between the plurality of substrates for establishing one of an electrical connection between the first feeding unit lands of an underlying substrate and its overlying substrate and an electrical connection between the second feeding unit lands of an underlying substrate and its overlying substrate, a fixing member arranged to fix the plurality of substrates laminated via the conductive spacer, and a switching module fixed below the bottom substrate among the plurality of substrates that are laminated.Type: ApplicationFiled: May 25, 2001Publication date: December 27, 2001Applicant: Murata Manufacturing Co., LtdInventors: Nobushige Moriwaki, Shigeki Nishiyama, Kazuhiro Yoshida, Masahiro Nishio, Kazuyuki Kubota
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Patent number: 6310759Abstract: The present invention relates to a ceramic capacitor having metal plate terminals that absorb thermal stress and mechanical stress caused by flexure of the substrate. A ceramic capacitor element is provided with terminal electrodes at the two side end surfaces facing opposite each other. The metal plate terminals are each connected to one of the terminal electrodes at one end thereof, are each provided with a folded portion in a middle area and a terminal portion to be connected to the outside toward the other end from the folded portion.Type: GrantFiled: December 21, 2000Date of Patent: October 30, 2001Assignee: TDK CorporationInventors: Takaya Ishigaki, Masatoshi Ishikawa, Takashi Kamiya, Shunji Itakura, Yuji Aiba, Masanori Yamamoto
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Patent number: 6285542Abstract: A very small electronic device adapted for inverted mounting to a circuit board includes a multiplicity of capacitors and resistors built on a substrate. The capacitors and resistors are interconnected so as to provide multiple RC circuits in various circuit arrangements. The multiple layers of the device are covered by an encapsulate having openings to expose terminal pads of the RC circuits. The openings are filled with solder to produce the individual terminations of the device in a ball grid array (BGA). The device saves cost and/or board space in the manufacture of larger electronic equipment through the elimination of multiple discrete components. In addition, very low inductance is achieved due to the close proximity of the device to a circuit board on which it is mounted.Type: GrantFiled: April 16, 1999Date of Patent: September 4, 2001Assignee: AVX CorporationInventors: Robert M. Kennedy, III, Gheorghe Korony, Donghang Liu, Jeffrey P. Mevissen, Robert H. Heistand, II
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Patent number: 6268996Abstract: A capacitor terminal is described, in particular for an electrolyte power capacitor, with which the capacitor is mechanically and electrically connected to a fastening part and/or to electric conductors. The capacitor terminal on the capacitor itself is designed as a contact stud having a relatively long, smooth contact area. The contact stud is designed in the form of a cylinder having a round or oval cross section or a rectangular tube connection. The part accommodating the contact stud is composed of a contact spring accommodating the contact stud for mechanical fixation and to establish the electric contact and which is attached to a connection strip. An extra spring can surround the contact spring in a ring to increase the contact force. Multiple capacitors may be connected to the connection strip by a simple plug-in technique, i.e.Type: GrantFiled: April 5, 2000Date of Patent: July 31, 2001Assignee: Robert Bosch GmbHInventor: Jürgen Landsgesell
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Patent number: 6256850Abstract: A method is provided for producing a capacitor to be embedded in an electronic circuit package comprising the steps of selecting a first conductor foil, selecting a dielectric material, coating the dielectric material on at least one side of the first conductor foil, and layering the coated foil with a second conductor foil on top of the coating of dielectric material. Also claimed is an electronic circuit package incorporating at least one embedded capacitor manufactured in accordance with the present invention.Type: GrantFiled: February 11, 1998Date of Patent: July 10, 2001Assignee: International Business Machines CorporationInventors: John M. Lauffer, Konstantinos Papathomas
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Patent number: 6256188Abstract: A power capacitor has at least one capacitor unit, each capacitor unit formed of at least one winding, having at least two foils of insulating material, wherein the capacitor unit(s) is (are) housed in a casing of which at least the body is made of extruded aluminum, which body surrounds said capacitor unit(s).Type: GrantFiled: April 2, 1999Date of Patent: July 3, 2001Assignee: Asea Brown Boveri Jumet S.A. (ABB)Inventors: Thomas Lovkvist, Henri Bonhomme, Cipriano Monni
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Patent number: 6256189Abstract: An electronic package which has a polygonal shaped heat slug. The heat slug extends from a top surface of a package which has a plurality of vias. The package also has a number of capacitors that are mounted to the top surface. Some of the capacitors are located between the heat slug and the vias. The polygonal shape of the heat slug provides additional space on the top surface so that capacitors can be added without eliminating vias from the package.Type: GrantFiled: March 29, 1996Date of Patent: July 3, 2001Assignee: Intel CorporationInventors: Robert J. Chroneos, Jr., Koushik Banerjee
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Patent number: 6198619Abstract: A capacitor network has an uncomplicated construction enabling the capacitance of the capacitor network to be easily increased or decreased. The capacitor network has a plurality of component capacitors formed from two metallic foil layers on opposite sides of a printed circuit board interconnected by lines disposed on both sides of said printed circuit board. The component capacitors of the capacitor network are arranged into at least one series circuit section and at least one parallel circuit section. The series circuit section includes two or more component capacitor, each including at least one component capacitor, connected in series. The parallel circuit section includes two or more parallel-connected component capacitor circuits, each including at least one component capacitor.Type: GrantFiled: November 2, 1998Date of Patent: March 6, 2001Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric System LSI Design CorporationInventor: Shuzo Fujioka
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Patent number: 6191933Abstract: The present invention relates to a ceramic capacitor having metal plate terminals that absorb thermal stress and mechanical stress caused by flexure of the substrate. A ceramic capacitor element is provided with terminal electrodes at the two side end surfaces facing opposite each other. The metal plate terminals are each connected to one of the terminal electrodes at one end thereof, are each provided with a folded portion in a middle area and a terminal portion to be connected to the outside toward the other end from the folded portion.Type: GrantFiled: January 5, 1999Date of Patent: February 20, 2001Assignee: TDK CorporationInventors: Takaya Ishigaki, Masatoshi Ishikawa, Takashi Kamiya, Shunji Itakura, Yuji Aiba, Masanori Yamamoto
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Patent number: 6185088Abstract: A multi-capacitor module carries vertically-oriented surface mount tantalum capacitors. The module provides at least one conductor for coupling to the, substrate capacitor terminals that are distal thereto. The module occupies less space, when mounted to a circuit board substrate, than individually mounting the bases of the surface mount capacitors to the substrate. This allows more efficient use of volume within an implantable cardiac rhythm management device, reducing its size, or alternatively, increasing its implanted longevity.Type: GrantFiled: February 18, 2000Date of Patent: February 6, 2001Assignee: Cardiac Pacemakers, Inc.Inventors: Nick A. Youker, Ronald L. Anderson, Sandra J. Overkamp
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Patent number: 6166459Abstract: A mobile X-ray machine includes an improved Marx generator. The capacitors sed in the Marx generator are disc capacitors each having opposed side surfaces having electrodes formed thereon and each including a insulative coating provided on the peripheral edge thereof. The capacitors are mounted in slots in a support structure and are supported by spring contact members located within the slots. The spring contact members include spring arms which engage the electrodes on the opposed side surfaces of the associated capacitor. The spring contact members also include support elements from which are suspended the spherical electrodes of spark-gap switches individually associated with each of the capacitors.Type: GrantFiled: October 29, 1998Date of Patent: December 26, 2000Assignee: The United States of America as represented by the Secretary of the NavyInventors: Glenn E. Holland, Craig N. Boyer, John F. Seely
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Patent number: 6147857Abstract: An integrated circuit includes main power busses located on the next to the top most level of metal and a top level of metal separated from the main power busses by a thin dielectric. The top most level metal is connected to one of the power buses either through bond wires or through contacts. This structure provides a distributed bypass capacitance between the power buses thus stabilizing the power bus voltage within the integrated circuit. Furthermore, this capacitance structure can be optional and can be made with one or two masking steps.Type: GrantFiled: October 7, 1997Date of Patent: November 14, 2000Assignee: E. R. W.Inventors: Eugene Robert Worley, Richard Arthur Mann
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Patent number: 6101084Abstract: A signal is transferred without brushes between rotatable and non-rotatable components of a machine. An input signal is applied to one of the components. An axially symmetrical electromagnetic field is generated in response to the input signal. The electromagnetic field is detected by the other component and an output signal is generated in response to the detected electromagnetic field. A rotating transformer couples an information signal or power from an auxiliary generator to an external device for processing. The rotating transformer includes a rotor assembly and a stator assembly. The rotor assembly includes a pair of rotor plates. The stator assembly includes a pair of stator plates and a pair of dielectrics. A dielectric is mounted to a stator plate and mounted adjacent and spaced apart from a corresponding rotor plate to form a capacitor between the stator plate and the rotor plate.Type: GrantFiled: February 12, 1997Date of Patent: August 8, 2000Inventor: Mikhail A. Rakov
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Patent number: 6084764Abstract: A capacitor assembly which positively disconnects failing capacitors is disclosed. This assembly will disconnect electrical power from a capacitor when internal pressure builds up inside the capacitor as a result of an internal short circuit. One or more capacitors are connected electrically into a circuit. Terminals are fixedly connected at each end of the capacitor. The protruding ends of the terminals slidably couple the capacitor to a source of alternating current (AC) power. The normal failure mode for capacitors is to develop internal short circuits. The failed capacitor then heats up rapidly and generates internal pressure. This pressure deforms the end portion of the capacitor. When the end of the capacitor moves in a longitudinal axis of motion, the slidable connection of the terminal is moved to a non-contacting position and the electrical connection is interrupted.Type: GrantFiled: December 21, 1998Date of Patent: July 4, 2000Assignee: Hamilton Sundstrand CorporationInventor: W. Kyle Anderson
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Patent number: 6058004Abstract: A unitized discrete electronic component array being surface mountable as a unit on a printed circuit board comprising a plurality of discrete electronic components physically secured to one another by an adhesive. The adhesive is a non-conducting high temperature resistant epoxy, polyimide or glass. The electronic components are capacitors, resistors or inductors, or combinations thereof.Type: GrantFiled: April 8, 1998Date of Patent: May 2, 2000Assignee: Delaware Capital Formation, Inc.Inventors: Frank A. Duva, Andre P. Galliath
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Patent number: 6016019Abstract: A capacitor array layout technique for improving capacitor array matching. A capacitor array is laid out in a geometrical configuration wherein the geometrical configuration has a centerpoint. The geometrical configuration is divided into a plurality of first sections wherein each of the plurality of first sections have a corresponding second section diagonally located from and at an approximately equal distance from the centerpoint as said first section. Each of the of second sections house a capacitor set of a predetermined value wherein each of the plurality of first sections house a capacitor set of an equal value as the corresponding second section.Type: GrantFiled: May 28, 1998Date of Patent: January 18, 2000Assignee: Microchip Technology IncorporatedInventor: Igor Wojewoda
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Patent number: 6011684Abstract: Variable width electrically conductive (i) traces and (ii) pads in the forms of castellations and connecting traces upon the surfaces of volume microminiature electronic components permit variable area electrical interconnection in three dimensions, particularly of monolithic, buried-substrate, multiple ceramic capacitors to integrated circuit receivers and amplifiers to make microminiature hearing aids insertable within the ear canal. A preferred embodiment monolithic multiple capacitor with side, top and bottom surfaces has a number of electrically conductive parallel layers disposed within its body with a conductive trace extending from each layer to be exposed upon a side surface.Type: GrantFiled: April 14, 1998Date of Patent: January 4, 2000Inventors: Alan D. Devoe, Lambert T. Devoe
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Patent number: 5973907Abstract: Multielement capacitors have at least one metal capacitor and at least one ceramic capacitor with common terminals in a common case. The preferred metal capacitance elements have an effective series capacitance of at least 1 microfarad at frequencies of up to 100 kHz. The individual metallic capacitance elements exhibit an ESR of less than 100 milliohms at 100 kHz and a dissipation factor (DF) of less than about 6% at 120 Hz. The ceramic capacitance elements useful in the invention have an equivalent series capacitance of at least about 0.1 microfarads at frequencies of up to about 100 MHz. The individual ceramic capacitance elements have an ESR of less than 20 milliohms at 1 MHz and a dissipation factor of less than 10% at 1 kHz.Type: GrantFiled: September 5, 1997Date of Patent: October 26, 1999Assignee: Kemet Electronics Corp.Inventor: Erik K. Reed
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Patent number: 5953201Abstract: A device for connecting a capacitor between a first and a second bus bar. The device includes a first and a second aperture extending through a first and a second electrode of the capacitor. A first and a second fastener extends through the first and second apertures to engage with the first and second bus bars for securing the capacitor to the bus bars to provide electrical and thermal conduction therebetween.Type: GrantFiled: April 13, 1998Date of Patent: September 14, 1999Inventor: Albert Jakoubovitch
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Patent number: 5940959Abstract: A communication connector having a plurality of contact pairs for conductive connection to respective communication signal wire pairs is provided with a capacitor label that capacitively couples a first contact of one contact pair to a second contact of a second contact pair to reduce near end cross talk between adjacent contacts. A common conductive lamina disposed closely adjacent to and spaced from more than one of the contacts further improves near end cross talk performance of the communication connector.Type: GrantFiled: April 26, 1996Date of Patent: August 24, 1999Assignee: Panduit Corp.Inventors: Jack E. Caveney, Christopher J. Hayes, Joseph Rinchiuso, Andrew J. Stroede, Donald C. Wiencek
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Patent number: 5940263Abstract: A device is disclosed for connecting a plurality of capacitors between a first and a second terminal. The device includes a plurality of bus bars located in a parallel spaced apart relationship. A plurality of fasteners fasten the plurality of capacitors between adjacent bus bars. A plurality of shims are interposed between selected bus bars and the first and second terminal for electrically connecting the plurality of capacitors between the first and second terminals.Type: GrantFiled: August 14, 1997Date of Patent: August 17, 1999Inventor: Albert Jakoubovitch
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Patent number: 5933318Abstract: A laminated capacitor and a process for producing the same. The laminated capacitor includes a plurality of capacitor assemblies and external electrodes, the capacitor assemblies each including a thermoplastic resin film having consecutively thereon a metal film as a first internal electrode, an inorganic dielectric material film, and a metal film as a second internal electrode, the plurality of capacitor assemblies being laminated with each other to form a laminated body, the external electrodes each being provided on an end surface of the laminated body, on which the first or second internal electrode is exposed, and being electrically connected to the first and second internal electrodes, respectively.Type: GrantFiled: September 20, 1995Date of Patent: August 3, 1999Assignee: Murata Manufacturing Co., Ltd.Inventors: Kunisaburo Tomono, Koji Kajiyoshi
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Patent number: 5903431Abstract: Integrated circuits and the method of making same are disclosed which are suitable for use in integrated circuits such as amplifiers, filters and oscillators. Each integrated circuit includes using a main dielectric body that has a thin conductive layer on opposite faces, using conventional etching process to etch out selected spaces or gaps in the layers according to a preselected pattern and cutting through the body to form oblong shaped bodies that form the integrated circuit. These circuits have conductive plates and spaces between plates on both sides with opposite plates providing capacitors connected mechanically and electrically and square shaped sections connected between plates of selected conductive materials which function as resistors and inductors.Type: GrantFiled: November 27, 1996Date of Patent: May 11, 1999Assignee: Vari-L Company, Inc.Inventor: Daniel J. Wilmot
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Patent number: 5898562Abstract: An integral dual frequency by-pass device is of one or more ceramic dielectric layers, the opposed surfaces of which are formed with electrodes of generally U-shaped configuration. The base portions of the electrodes are exposed at opposite surfaces of the monolith, the leg portions of the U-shaped electrodes extending toward the base portions of electrodes of opposite polarity. The overlap or registration area of one pair of legs differs from the overlap area of the other leg pair with the result that two capacitors of different values are formed, the capacitors being in parallel and accordingly defining low impedance path at two discrete frequencies. By varying the conductive paths as a function of the length of the electrode and/or the base of the U, a desired internal inductance is be developed.Type: GrantFiled: May 9, 1997Date of Patent: April 27, 1999Assignee: AVX CorporationInventors: Jeffery C. Cain, John E. Barris
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Patent number: 5887324Abstract: A process for fabricating an electrical terminal (48) having an integral capacitor (50) formed on the exterior of the terminal includes a laser ablation process for deposition of a thin layer of dielectric material (44) on to the body of the terminal (48). An outer electrode (46) is then deposited on the exterior of the dielectric layer and the terminal can be used in a filtered electrical connector. A wire (2) can be cleaned by, for example, a plasma cleaning step prior to the deposition of the dielectric layer (44) by laser ablation and lasers (12) can be used to anneal at least the outer portion of the additively deposed dielectric layer (44). The wire (2) can be rotated to provide complete coverage.Type: GrantFiled: August 30, 1996Date of Patent: March 30, 1999Assignee: The Whitaker CorporationInventor: Jeff Cherng-chou Wu
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Patent number: 5875091Abstract: An arrangement of an isolating support board having conductive surfaces between busbars, the support board having a portion projecting beyond the busbars in the transverse direction, and filter capacitors connected to the conductive surfaces being fastened on the projecting portion.Type: GrantFiled: January 7, 1997Date of Patent: February 23, 1999Assignee: Siemens Nixdorf Informationssysteme AktiengesellschaftInventor: Ralf Rieken
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Patent number: 5864460Abstract: An improved structure of a multi-slotted iron rod includes a core, a coil, and a lead frame. The core is a rod is made from good magnetic iron powder. The core has a fixture area and a winding area. The winding area has several winding sections and isolation sections. The winding area is used for coil winding. The isolation sections serve as capacitors. The fixture area has a hexagonal cross section and is used as a fixing end during winding. The coil winds on the winding sections of the core. The lead frame is attached to the two sides of the isolation sections of the core for connection to an electrical circuit. The device utilizes the above components to wind the coil on the winding sections of the core. The output pin of the coil is soldered to the lead frame of the isolation sections. The lead frame is soldered on the PC board. The capacitor of the isolation section of the core is connected in parallel to the coil in the winding section.Type: GrantFiled: June 20, 1996Date of Patent: January 26, 1999Inventor: Yun-Kuang Fan
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Patent number: 5812365Abstract: The device is disclosed for the mounting and cooling of a capacitor. The device comprises of a pair of metal bars made of a thermally and electrically conductive material. The capacitor is fastened to the pair of metal bars. Water is circulated through channels defined in the pair of metal bars for cooling the capacitor.Type: GrantFiled: August 7, 1996Date of Patent: September 22, 1998Inventor: Albert Jakoubovitch