Abstract: The solder composition comprises particles of a thermodynamically metastable alloy. One of the elements of the alloy will form an intermetallic compound with a metal surface. The solder composition is particularly suitable for use in bumping of semiconductor devices.

Abstract: A chip package includes a circuit board, a chip, and wires. The circuit board includes a metal layer, a middle layer formed on the metal layer, and a wire pattern layer formed on the middle layer. The metal layer is configured to be grounded. A through hole is defined through the wire pattern layer and the middle layer to expose the metal layer. The chip is mounted on the metal layer and received in the through hole. The wires interconnect the chip and the wire pattern layer.

Abstract: This publication discloses an electronics module comprising an insulating-material layer having two opposite surfaces, and at least one microcircuit embedded to the insulating-material layer. The microcircuit has a first contact surface comprising first contact terminals, from which the microcircuit is electrically connected to first conductor structures in the form of a patterned first conductor layer contained on first surface of the insulating-material layer, and a second contact surface opposite to the first contact surface, in which there is at least one second contact terminal, from which the microcircuit is electrically connected to second conductor structures contained in the form of a patterned second conductor layer on second surface of the insulating-material layer. According to the invention there is provided a local adhesive layer between the component and the first contact surface and first conductor layer, the adhesive layer filling the space between the component and the first conductor layer.

Abstract: An electrical assembly including a substantially planar substrate having at least one recess therein and a plurality of electrical components. The electrical components are positioned in the at least one recess and include a first electrical component and a second electrical component. Each of the electrical components has a body and an electrical connection. The electrical connection of the first electrical component and the electrical connection of the second electrical component are aligned with each other when the body of the first electrical component is in a recess and the body of the second electrical component is in a recess.

Abstract: According to one embodiment, there is a high frequency circuit having a multi-chip module structure, including a semiconductor substrate set formed with discrete transistors connected in series, a first dielectric substrate set formed with capacitors, and a second dielectric substrate set formed with strip lines.

Abstract: Printed circuit boards are provided with embedded components. The embedded components may be mounted within recesses in the surface of a printed circuit board substrate. The printed circuit board substrate may have grooves and buried channels in which wires may be mounted. Recesses may be provided with solder pads to which the wires may be soldered or attached with conductive adhesive. An integrated switch may be provided in an opening within a printed circuit board substrate. The integrated switch may have a dome switch member that is mounted within the opening. A cover member for the switch may be formed from a flexible layer that covers the dome switch member. Terminals for the integrated switch may be formed from conductive structures in an interior printed circuit board layer. Interconnects may be used to electrically connect embedded components such as switches, integrated circuits, solder pads for wires, and other devices.

Abstract: An improved integrated circuit (IC) layout is described that provides conductive pads on opposite sides of a substrate. The conductive pads provide for connectivity to the chip in different chip orientations. Accordingly, multiple chips having the same layout can be provided in a package, instead of providing each chip with a different layout. Since the same layout may be used for each chip, manufacturing costs are reduced.

Abstract: A package substrate includes a main package body including a first principal surface on which an IC is mounted, and a second principal surface, opposed to the first principal surface, on which first bonding materials for mounting are provided. An internal circuit is provided within the main package body and connected to the first bonding materials. A sub-package is arranged on the second principal surface and includes electronic components embedded therein. A thickness direction dimension being the distance from the second principal surface to a portion of the sub-package most distant from the second principal surface, is not more than a thickness direction dimension being the distance from the second principal surface to an edge of the first bonding material at the second principal surface.

Abstract: A monolithic microwave integrated circuit structure having a semiconductor substrate structure with a plurality of active devices and a microwave transmission line having an input section, an output section and a interconnecting section electrically interconnecting the active devices on one surface and a metal layer on an opposite surface overlaying the interconnection section and absent from overlaying at least one of the input section and the output section.

Abstract: A device has a first terminal, second terminal and at least four lateral faces provided with contact areas, of which two respective ones each are mutually opposite. The contact areas of the mutually opposite lateral faces are connected to different ones of the first and second terminals.

Abstract: Chip capacitors are provided in a printed circuit board. In this manner, the distance between the IC chip and each chip capacitor is shortened, and the loop inductance is reduced. In addition, the chip capacitors are accommodated in a core substrate having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

Abstract: An embodiment of an embedded component substrate includes: (1) a semiconductor device including lower, lateral, and upper surfaces; (2) a first patterned conductive layer including a first electrical interconnect extending substantially laterally within the first patterned conductive layer; (3) a second electrical interconnect extending substantially vertically from a first surface of the first interconnect, and including lateral and upper surfaces, and a lower surface adjacent to the first surface; (4) a dielectric layer including an opening extending from an upper surface of the dielectric layer to a lower surface of the dielectric layer, where: (a) the dielectric layer substantially covers the lateral and upper surfaces of the device, and at least a portion of the lateral surface of the second interconnect; and (b) the second interconnect substantially fills the opening; and (5) a second patterned conductive layer adjacent to the upper surfaces of the dielectric layer and the second interconnect.

Abstract: An electronic component module includes a circuit substrate including surface mount components mounted thereon, a resin layer embedding the surface mount components, and a conductor layer provided on a surface of the resin layer, wherein a conductive post is provided on the surface mount component, and an external electrode having a ground potential provided on the surface mount component is conductively connected to the conductor layer through the conductive post, whereby the conductor layer defines a shielding layer.

Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a pad formed on the first interlayer resin insulation layer, a solder resist layer formed on the first interlayer resin insulation layer and the pad, a protective film formed on a portion of the pad exposed by an opening of the solder resist layer, and a coating layer formed between the pad and the solder resist layer. The pad mounts an electronic component. The coating layer has a metal layer and a coating film. The metal layer is formed on the surface of the pad and the coating film is formed on the metal layer.

Abstract: Disclosed herein is a printed circuit board, including: a substrate including an insulation layer in which a cavity is formed; an electronic component mounted in the cavity of the substrate and having connection terminals; an insulation material layer formed on one side of the substrate to bury the electronic component; a first circuit layer formed on the other side of the substrate and including a connection pattern connecting with the connection terminals of the electronic component; and a second circuit layer formed on the insulation material layer. The printed circuit board is advantageous in that it can prevent the warpage thereof and ensure the reliability of electrical connection between an electronic component and a circuit layer by adjusting the thickness, thermal expansion coefficient and elastic modulus of insulation layer or the insulating material.

Abstract: A combined battery and wireless-communications apparatus and method. In some embodiments, the apparatus includes a support, a first conductive layer deposited on a first surface area of the support, a thin-film battery including a cathode layer, a solid-state electrolyte layer, and an anode layer deposited such that either the anode layer or the cathode layer is in electrical contact with the first conductive layer, an antenna mounted to the support structure, and an electronic communications circuit mounted to the support and electrically coupled to the battery and the antenna to transceive radio communications. Other embodiments include an energy-receiving device mounted to the support structure, and an electronic communications circuit mounted to the support structure and including a recharging circuit, the recharging circuit electrically coupled to the battery and the energy-receiving device to recharge the battery using energy received by the energy-receiving device.

Abstract: A wiring board is formed with a substrate designating either the upper surface or the lower surface as a first surface and the other as a second surface; an electronic component arranged inside the substrate; and a first conductive layer formed on the first-surface side of the substrate by means of a first insulation layer made up of a first lower insulation layer and a first upper insulation layer. In such a wiring board, the first lower insulation layer and the first upper insulation layer are made of different materials from each other. Moreover, the first lower insulation layer is positioned on the first surface of the substrate and the electronic component, and the material that forms the first lower insulation layer fills a clearance between the substrate and the electronic component.

Abstract: A method of forming a stackable treated via package includes coupling interconnection balls to terminals. The interconnection balls are encapsulated in a package body. Via apertures are formed in the package body to expose the interconnection balls. The interconnection balls are treated to form treated interconnection balls comprising treated surfaces. The treated interconnection balls of the stackable treated via package enhance bonding with interconnection balls of a stacked electronic component package thus maximizing yield.

Abstract: A method of making an electronic circuit device includes expelling air from a gap between a circuit board and an electronic element mounted on only a first side of the circuit board by filling the gap with a filling member, placing the circuit board in a mold cavity such that a second side of the circuit board is held in close contact with an inner surface of the cavity. The method further includes encapsulating the circuit board with a resin material by injecting the resin material into the cavity.

Abstract: An electronic apparatus includes, for example, a circuit board with an electronic component and a piezoelectric element, a reference potential pattern that gives a reference potential to at least one of the electronic component and the piezoelectric element, and a solder land connected to the reference potential pattern. On the circuit board, the electronic component is located on a downstream side in a transport direction of the circuit board during mounting of the piezoelectric element and the electronic component on the solder land, and the piezoelectric element is located on an upstream side in the transport direction.

Abstract: A method includes forming grooves in first regions included in a first wafer to form wiring regions defined by the grooves; forming insulating portions in the grooves; joining a surface of the first wafer on which the wiring regions are formed to a first surface of a device wafer including device forming regions after forming the insulating portions; forming through holes in the wiring regions of the first wafer after joining the first wafer to the device wafer, the holes extending through the first wafer; filling the holes with a conductive material; joining a second wafer to a second surface of the device wafer opposite the first surface, the second wafer including second regions; exposing the wiring regions by thinning the first wafer after joining the first wafer to the device wafer; and cutting the device wafer, the first wafer, and the second wafer after thinning the first wafer.

Abstract: A package substrate having embedded capacitor is provided. The package substrate includes a core circuit board, at least one dielectric layer, at least one embedded capacitor, and at least one metal layer. The core circuit board has at least one wiring layer, and the core circuit board has at least one conductive through hole connected to the wiring layer. At least one dielectric layer covers the wiring layer, and the dielectric layer has at least one conductive through hole. At least one embedded capacitor is embedded in the dielectric layer. At least one metal layer covers the dielectric layer and connected to the embedded capacitor, wherein the metal layer is connected to the wiring layer through the conductive through hole.

Abstract: An electro device embedded printed circuit board and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, a printed circuit board embedded with an electro device, in which a pair of electrodes are formed on either end, includes: a core substrate in which a first cavity is formed; a first passive device embedded in the first cavity and being thinner than the core substrate; and a second passive device stacked on an upper side of the first passive device such that the second passive device is embedded in the first cavity. The first passive device and the second passive device are stacked to cross each other.

Abstract: The present invention directs to fabrication methods of the embedded component package structures by providing preformed lamination structures, joining or stacking the preformed laminate structures and mounting at least one electronic component to the joined structures. By way of the fabrication methods, the production yield can be greatly improved with lower cycle time.

Abstract: A pad layout structure of a driver IC chip of a liquid crystal display device includes dummy power pads and dummy ground pads, which are disposed in corners of the driver IC chip and are connected to main power pads and main ground pads by metal lines in a chip-on-film (COF) package. Accordingly, it is possible to reduce the resistance of power supply lines and ground lines, to minimize a power dip of a block located far away from the main power pads and main ground pads, and to prevent a failure in power application, which may occur due to a decrease of adhesive strength at a specific position, by dispersing the adhesion positions of the power pads and ground pads.

Abstract: An integrated circuit package system includes: providing a substrate; mounting an integrated circuit above the substrate; connecting an interposer to the integrated circuit with a wire-in-film adhesive; connecting an exposed interconnect having an upper surface to the substrate; and encapsulating the integrated circuit with an encapsulation.

Abstract: An apparatus includes a coreless substrate with an embedded die that is integral to the coreless substrate, and at least one device assembled on a surface that is opposite to a ball-grid array disposed on the coreless substrate. The apparatus include an at least one stiffener layer that is integral to the coreless substrate and the stiffener layer is made of overmold material, underfill material, or prepreg material.

Abstract: The present invention generally relates to a new structure to be used with electronic modules such as printed circuit boards and semiconductor package substrates. Furthermore there are presented herein methods for manufacturing the same. According to an aspect of the invention, the aspect ratio of through holes is significantly improved. Aspect ratio measures a relationship of a through hole or a micro via conductor in the direction of height divided width. According to the aspect of the invention, the aspect ratio can be increased over that of the prior art solution by a factor of ten or more.

Abstract: Using die side capacitors and embedded resistors, an advantageous power delivery network may be achieved. In some embodiments, the embedded resistors may be more precisely controllable. The number of die side capacitors may be reduced by combining embedded resistors with these capacitors to reduce costs. The embedded resistors may be provided within the metallization layers either at an upper layer or a lower layer, as two examples.

Abstract: A chip includes a chip body having an upper surface on which an active surface is formed, and at least one side protrusion terminal protruding from a lateral surface of the chip body and electrically connected to the active surface. As a plurality of semiconductor chips or parts may be connected to one another on a single package, a one-chip or one-package of a package is possible and the thickness of the package can be reduced.

Abstract: In the present electronic structure, a substrate is provided in the form of a circuit board. First and second electronic devices are positioned on opposite sides of the circuit board, each having a plurality of contacts connected to the circuit board. Each of the contacts of the first device is connected to a contact of the second device by a connector though the circuit board. At least one of the contacts of the first device is connected to the contact of the second device which is most adjacent to that contact of the first device across the circuit board.

Abstract: This publication discloses a method for manufacturing a circuit-board structure.1. The structure comprises a conductor pattern (3) and at least one component (6), which is surrounded by an insulating-material layer (10), attached to it by means of a contact bump (5). According to the invention, the contact bumps (5) are made on the surface of the conductor pattern (3), before the component (6) is attached to the conductor pattern (3) by means of the contact bump (5). After attaching, the component (6) is surrounded with an insulating-material layer (10).

Abstract: Electronic circuits (1, 101) are disclosed. The electronic circuits comprise a first and a second integrated circuit (10a, 110a, 10b, 110b) and a printed circuit board (PCB) (15, 115). The PCB comprises dielectric layers (30a-c, 130) of polymer-based materials having different dissipation factors arranged in accordance with various embodiments for suppressing noise.

Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including: a first layer having a first conformable material; a second layer having a second conformable material; a third layer having a third material; and one or more electronic components embedded within the stack of layers, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a vertical filtering structure arranged periodically between the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: According to various aspects of the present disclosure, an apparatus is disclosed that includes a small form factor mobile platform including a system-on-package architecture, the system-on-package architecture arranged as a stack of layers including a first layer having a first conformable material; a second layer having a second conformable material; one or more electronic components embedded within the stack of layers; and a heat dissipating element configured dissipating heat generating from the one or more electronic components, wherein the first conformable material, the second conformable material, or both are configured to allow high frequency signal routing.

Abstract: A printed wiring board with a built-in resistive element comprising a first electrode formed on the surface of an insulating member, a second electrode provided adjacent to the first electrode to form a space therebetween, a resistor-filling part formed by the space between the first electrode and the second electrode, and a resistive element comprising a resistive material provided in the resistor-filling part wherein the resistor-filling part is substantially enclosed by the first electrode and the second electrode.

Abstract: Provided is a memory device comprising a circuit assembly including a flexible substrate and at least one flash memory chip mounted thereupon. The flexible substrate has upper and lower surfaces and a flash memory chip is preferably mounted on at least one the upper and lower surfaces. The flash memory chip may be configured as one of a thin small outline package (TSOP) package device, a very small outline package (WSOP) package device, and a chip on board (COB) device. The memory device may further comprise a hollow housing body having a hollow interior compartment sized and configured to receive the circuit assembly therewithin. A universal series bus (USB) connector may be mounted on a free end of the flexible substrate and is preferably configured to electrically connect the memory device to an electric device.

Abstract: A joint board is arranged between an upper package and a lower package. The arrangement of the joint board makes it possible to reduce the size of solder balls and to arrange them with narrower pitch. The joint board has slightly greater dimensions those of the upper package and the lower package. This makes it possible to prevent underfill from leaking and spreading.

Abstract: An electronic component built-in wiring board includes: at least a pair of wiring patterns; an insulating layer disposed between the pair of wiring board; an electronic component embedded in the insulating layer; and a metallic body provided at least on or above a main surface of the electronic component in the insulating layer and thermally contacted with the electronic component.

Abstract: An electronic component embedded printed circuit board and a method for manufacturing the same are disclosed. The method includes: providing a first carrier having a first circuit pattern formed on one surface thereof; providing a second carrier having a second circuit pattern formed on one surface thereof; flip-chip bonding an electronic component to the first circuit pattern; stacking one side of an insulator on one side of the first carrier to cover the electronic component; compressing the second carrier having the second circuit pattern formed on one surface thereof on an other side of the insulator; and removing the first carrier and the second carrier. The method can improve the degree of conformation for an electrical component by embedding the electrical component using a flip-chip bonding method and can improve the yield by simplifying the production process.

Abstract: A PCB having an embedded bare chip includes an insulated substrate having a penetration hole formed therein; a filler filling up an inside of the penetration hole; a bare chip embedded in the filler such that electrode pads formed on one side thereof are exposed at the surface of the filler; and an electrode bump attached to a surface of the electrode pads and protruded to be exposed to the outside.

Abstract: A versatile multi-layer electronic part built-in board compatible with different external circuits to be connected thereto is provided. Sensors are connected to a connector through connection lines that are connected to electronic parts. The electronic parts are directly connected to the connector and can be mounted on the top layer, the bottom layer or both the top and bottom layers of the multi-layer electronic part built-in board. When the sensor to be connected, for example, is changed to another having a different characteristic, an electronic part mounted on the top and bottom layers correspondingly to the sensor can be changed.

Abstract: A display panel is provided. The display panel includes a first substrate and a second substrate. The second substrate comprises a center region, a first border region and a second border region. The center region has a first center region edge and a second center region edge. The center region corresponds to an active area for displaying an image of the display panel. The first border region, adjacent to the center region and located outside the first center region edge, has a first border region edge. The second border region, adjacent to the center region and located outside the second center region edge, has a second border region edge. The distance between the first center region edge and the first border region edge is larger than the distance between the second center region edge and the second border region edge.

Abstract: Resilient electrical interposers that may be utilized to form a plurality of electrical connections between a first device and a second device, as well as systems that may utilize the resilient electrical interposers and methods of use and/or fabrication thereof. The resilient electrical interposers may include a resilient dielectric body with a plurality of electrical conduits contained therein. The plurality of electrical conduits may be configured to provide a plurality of electrical connections between a first surface of the electrical interposer and/or the resilient dielectric body and a second, opposed, surface of the electrical interposer and/or the resilient dielectric body. The systems and methods disclosed herein may provide for improved vertical compliance, improved contact force control, and/or improved dimensional stability of the resilient electrical interposers.

Abstract: Electronic module (10), and an electric motor (12) containing one, and also a production method for one, having an electrically conductive first substrate (16) which has a basic body (54) and which has a second electrically conductive substrate (18) mounted on it, and having at least one power component which is arranged on a first substrate (16), and the second substrate (18) is fitted with further components (40) on a side (32) which is remote from the first substrate (16), where the second substrate (18) has a smaller base area (19) than the basic body (54) of the first substrate (16), and the power components (22) are mounted on the first substrate (16) outside the outer perimeter (70) of the second substrate (18)—next to the latter.

Abstract: An electronic circuit device that suppresses deformation of an adhesive layer of a flexible printed circuit board during formation of a resin seal portion, and suppresses deterioration of the circuit board caused by deformation of the adhesive layer. The electronic circuit device includes a substrate mounted with an electronic component; a flexible printed circuit board electrically connectable to the substrate and an external device, and includes a wiring conductor and a pair of insulation films covering upper and lower surfaces of the wiring conductor; and a resin molding portion to seal the substrate and a portion of the circuit board. The wiring conductor of the circuit board is adhered through an adhesive layer to at least one of the pair of insulation films, and a dummy wiring material that does not function as wiring is disposed on an outer side of a border between the circuit board and an outer peripheral portion of the plastic molding portion, and disposed between the pair of insulation films.

Abstract: A base mechanism for use in a multi-chip module (MCM) is described. This base mechanism includes a substrate having top and bottom surfaces. The bottom surface includes first electrical connectors that convey power, and through-substrate vias (TSVs) between the top and bottom surfaces are electrically coupled to these electrical connectors. Furthermore, a bridge chip is rigidly mechanically coupled to the top surface. This bridge chip includes proximity communication connectors that communicate information via proximity communication with one or more island chips in the MCM. Additionally, spacers are rigidly mechanically coupled to the top surface of the substrate. In conjunction with the bridge chip, the spacers define cavities on the top surface, which include second electrical connectors. These second electrical connectors are electrically coupled to the TSVs, and communicate additional information with and convey power to the one or more island chips.

Abstract: A printed wiring board includes a mounting portion on which a dual core processor including two processor cores in a single chip can be mounted, power supply lines, ground lines, and a first layered capacitor and a second layered capacitor that are independently provided for each of the processor cores, respectively. Accordingly, even when the electric potentials of the processor cores instantaneously drop, an instantaneous drop of the electric potential can be suppressed by action of the layered capacitors corresponding to the processor cores, respectively. In addition, even when the voltage of one of the processor cores varies, the variation in the voltage does not affect the other processor core, and thus malfunctioning does not occur.

Abstract: A device includes a carrier and an integrated circuit chip having a first side supported by the carrier and a second side having contacts. The carrier has multiple carrier contacts supported by the carrier and separated from the integrated circuit chip. Multiple leads are coupled between the contacts on the integrated circuit chip and the multiple carrier contacts. A resin encapsulates the integrated circuit chip leaving the multiple carrier contacts at least partially uncovered for attaching to a card or board.