Shaped Lead On Components Patents (Class 361/773)
  • Patent number: 5373276
    Abstract: A self centering coil (200) includes a coil section (202) and also having curved end section (206) and (204) at opposite sides of the coil section (202). The curved end sections are preferably substantially flat and in a plane which is parallel to the center axis (306) of the coiled section (202).
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: December 13, 1994
    Assignee: Motorola, Inc.
    Inventors: Anthony J. Suppelsa, Fadia Nounou, Anthony B. Suppelsa
  • Patent number: 5366380
    Abstract: A contact element for an electrical connector or an integrated circuit which is used with a hold-down mechanism has a base portion, a spring portion having at least partially helical spring elements, and a tapered contact portion which mates in a biased manner with the conductive rim of a hole. The contact element is particularly useful for surface mount applications. The spring portion is preferably arranged with a partially helical spring configuration so that compression of the spring also effects a torsional rotation of the contact portion. The contact element can be fabricated from: a flat sheet with punching, rolling, and/or forming operations, thin walled drawn parts, or modular parts. Additionally, spring sections may be arranged in tandem, in either a co-rotational or counter-rotational manner to provide additional degrees of design freedom with respect to compression range, axial spring rate, and rotational rate.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: November 22, 1994
    Assignee: General DataComm, Inc.
    Inventor: Welles K. Reymond
  • Patent number: 5353199
    Abstract: A method of mounting fuse holding clips for a fuse holder on a circuit board by such an automatic part inserter as is used for inserting radial parts and including a pusher having a lower dead point set at 5 to 20 mm upwardly distant from an upper face of the circuit board and comprising a step of inserting a fuse holding clip while the pusher of the automatic inserter is engaging narrowed faces of a clip body which are to support a lower portion of a fuse until a bottom of the fuse holding clip is engaged with the upper face of the circuit board.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: October 4, 1994
    Assignee: Kyoshin Kogyo Co., Ltd.
    Inventor: Kozi Ohashi
  • Patent number: 5353196
    Abstract: A method of assembling an electrical packaging structure has a plurality of semiconductor chips arranged on a substrate and input wirings to the semiconductor chips connected thereto. The input wirings are distributed through a wiring board arranged on the substrate.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: October 4, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masanori Takahashi
  • Patent number: 5343365
    Abstract: A PCB relay comprising a housing having a bottom side, a top side and a circumferential wall and terminal pins protruding from the bottom side for being contacted to a printed circuit board. For conducting heavy load currents from the relay contacts and away from the printed circuit board in a quick manner and via a short pathway, at least two conducting strips are fastened to the circumferential wall of the housing, extending from the bottom side to the top side. The strips form soldering pins at the bottom end thereof and quick-connect plugs or terminals at the top end thereof. An electrically conducting connection between the strips and the terminal pins of the relay may be formed on the PCB or, alternatively, the elements may be directly connected to one another.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: August 30, 1994
    Assignee: Potter & Brumfield, Inc.
    Inventor: Klaus Lueneburger
  • Patent number: 5317479
    Abstract: A curved lead provides a mechanical and electrical connection between a board contact on a circuit board and a chip contact associated with a circuit chip. The chip can be mounted to the circuit board, to a chip carrier or to a multiple-chip module. The curved lead is substantially entirely plated with solder and is formed of a single piece of conductive material. The curved lead has a first surface for connection to the chip contact and a second surface, generally parallel to the first surface, for connection to the board contact. The first and second surfaces are connected by at least one curved portion and are arranged to mount the circuit chip to the circuit board with the solder in a compliant, generally parallel arrangement substantially free of stress.
    Type: Grant
    Filed: October 1, 1993
    Date of Patent: May 31, 1994
    Assignee: Computing Devices International, Inc.
    Inventors: Deepak K. Pai, Terrance A. Krinke
  • Patent number: 5313367
    Abstract: Actualized are fingers through which a semiconductor integrated circuit including high density electrode strings can be easily safely mounted on a circuit substrate in the same manner with the prior art. A conductor pattern capable of improving a packaging density of the integrated circuit including the fingers is actualized. The fingers are therefore configured using the multi-layered conductor pattern. The conductor pattern is multi-layered, i.e., consists of conductive layers and an insulating layer for separating these conductive layers. In addition to a wiring pattern serving as fingers for connecting an integrated circuit to a packaging substrate, an electrification path for interlayer connections is also formed in a thickness direction. The circuit substrate exhibiting a high packaging density can be actualized.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: May 17, 1994
    Assignee: Seiko Epson Corporation
    Inventor: Hisanobu Ishiyama
  • Patent number: 5299093
    Abstract: An electrical packaging structure has a plurality of semiconductor chips arranged on a substrate and input wirings to the semiconductor chips connected thereto. The input wirings are distributed through a wiring board arranged on the substrate.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: March 29, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masanori Takahashi
  • Patent number: 5297008
    Abstract: Electrical leads are provided for improving access to high density electronic devices. The leads include a polymeric dielectric core comprising a metallic conductive layer having at least two separate conductive paths thereon. The conductive paths are ideally suited to connect a pair of terminals disposed on a circuit element to a pair of conductive surfaces on a printed circuit board, without requiring any additional surface area to meet the lead requirements.
    Type: Grant
    Filed: December 31, 1991
    Date of Patent: March 22, 1994
    Assignee: Compaq Computer Corporation (COMPAQ)
    Inventor: Howard S. Estes
  • Patent number: 5294749
    Abstract: A surface mountable molded electronic component (100) is made from formed wire having a main portion (202) and end portions (102 and 104) connected to the main portion (202). The electronic component (100) includes a first and second recess areas (108 and 110) in molded section (114) for allowing the end portions (102 and 104) to lie inside and provide for the component (100) to be surfaced mounted onto a printed circuit board.
    Type: Grant
    Filed: September 23, 1991
    Date of Patent: March 15, 1994
    Assignee: Motorola, Inc.
    Inventors: James V. Lauder, Leng H. Ooi
  • Patent number: 5295045
    Abstract: A plastic-molded-type semiconductor device having a high degree of integration encases a plurality of semiconductor chips in a package unit with each chip situated perpendicular to the substrate for mounting. On a surface of each chip containing circuits or on a reverse surface of the same, a lead frame is attached with an insulating material interposed therebetween. The chip and lead frame are connected with each other by using wire. The lead frame is arranged perpendicularly to another lead frame provided in parallel and connected therewith by welding. A printed circuit board may be used in place of said latter lead frame. By arranging the chips in projections made of resin, the thermal resistance of the semiconductor device is decreased. The present invention is particularly effective for a memory IC.
    Type: Grant
    Filed: November 14, 1991
    Date of Patent: March 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kitano, Asao Nishimura, Akihiro Yaguchi, Nae Yoneda, Maya Obata, Ryuji Kohno, Mitsuaki Haneda
  • Patent number: 5276587
    Abstract: An electrical device to be electrically mounted to a cooling mounting structure so that the electrical device is in intimate physical contact with the mounting structure for cooling the electrical device. The electrical device having a first pivot allowing contact for allowing the electrical device to be pivoted as it is mounted to the cooling mounting structure so that the electrical device is in intimate physical contact with the cooling mounting structure and for providing an electrical connection to the cooling mounting structure and the electrical device further having a second nonpivot allowing contact having a shape for providing electrical contact with the mounting structure when the electrical device is in intimate physical contact with the cooling mounting structure.
    Type: Grant
    Filed: April 8, 1993
    Date of Patent: January 4, 1994
    Assignee: Sundstrand Corporation
    Inventor: Michael P. Ciaccio
  • Patent number: 5270492
    Abstract: A small bore or a cut portion is formed in a leading end portion of a lead terminal extended from a package main body. A gas produced when the leading end portion is contacted with and soldered to a land provided on a printed wiring board is allowed to escape through the small bore or the cut portion and, therefore, solder is easy to enter between the lead terminal and the land, which improves the soldering performance of the lead terminal. Also, the provision of the small bore or cut portion increases the area of a peripheral portion of the lead terminal to be in contact with the solder to thereby increasing the strength of the soldering.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: December 14, 1993
    Assignee: Rohm Co., LTD.
    Inventor: Masaro Fukui
  • Patent number: 5243217
    Abstract: A sealed semiconductor device, comprising at least one semiconductor chip, a wiring circuit board having the at least one semiconductor chip disposed thereon, at least one inner wire connecting the semiconductor chip to the wiring circuit board, a base board having the wiring circuit board disposed thereon, the base board enclosed on all sides forming a case, a silicon gel layer partially filling the case, a sealing resin layer disposed within the case above the silicon gel layer, a resin block in contact with the sealing resin layer, at least one inner terminal portion electrically connected to the wiring circuit board, at least one intermediate protruding portion electrically connected to, and projecting upwardly from, the at least one inner terminal portion, at least one aperture through the at least one intermediate protruding portion, the at least one aperture substantially disposed along a direction of a current passing through the at least one intermediate protruding portion within the case, and an out
    Type: Grant
    Filed: October 9, 1991
    Date of Patent: September 7, 1993
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Toshifusa Yamada
  • Patent number: 5241134
    Abstract: The prior art terminal for making a solder bond between a lead and a bond site is modified so as to enhance the reliability of the solder bond. In one embodiment, this modification entails solder relief terminals: solder relief holes through the terminal, notches, grooves or ridges on the surface of the terminal, or bending of the terminal. In a second embodiment, this modification entails predeposit of a predetermined and controlled amount of solid solder and flux on the terminal.
    Type: Grant
    Filed: July 1, 1992
    Date of Patent: August 31, 1993
    Inventor: Clarence S. Yoo
  • Patent number: 5233504
    Abstract: An improved electrical component package comprises a component attached to a substrate by a plurality of multisolder interconnections. Each interconnection comprises a preformed spacer bump composed of a first solder alloy, preferably a lead-base tin alloy containing greater than 90 weight percent lead. The spacer bump is directly metallurgically bonded to a metallic electrical contact of the component and rests against a corresponding metallic electrical contact of the substrate, but is not bonded thereto. Each interconnection further comprises a sheath portion formed of a second compositionally distinct solder alloy having a liquidus temperature less than the first alloy solidus temperature. A preferred second solder is a tin-lead alloy comprising between about 30 and 50 weight percent lead and the balance tin or indium.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: August 3, 1993
    Assignee: Motorola, Inc.
    Inventors: Cynthia M. Melton, Carl J. Raleigh, Steven Scheifers