Abstract: An interposer including: a substrate including a first layer and second layer, wherein the first layer and second layer are positioned parallel to each other; electrodes each having a concave-convex structure formed on each facing surface of the first layer and second layer of the substrate; a dielectric layer sandwiched between the electrodes which are formed on each facing surface of the first layer and second layer of the substrate; a first conductive part which vertically passes through the first layer of the substrate from a first outer surface of the substrate and is electrically connected to an electrode formed on a surface of the second layer of the substrate that faces the first layer of the substrate; and a second conductive part which vertically passes through the second layer of the substrate from a second outer surface of the substrate and is electrically connected to an electrode formed on a surface of the first layer of the substrate that faces the second layer of the substrate.

Abstract: A semiconductor device structure includes a semiconductor substrate, a resistor layer, and a capacitor layer. The resistor layer is configured to overlie the semiconductor substrate. The resistor layer has a resistor disposed therewithin. The capacitor layer is configured to overlie the resistor layer. The capacitor layer has a capacitor disposed over and electrically connected with the resistor. Further, a semiconductor device that generates a constant output voltage from an input voltage includes a semiconductor substrate, a resistor layer, and a capacitor layer. The resistor layer is configured to overlie the semiconductor substrate. The resistor layer has a resistor disposed therewithin. The capacitor layer is configured to overlie the resistor layer. The capacitor layer has a capacitor disposed over and electrically connected with the resistor.

Abstract: There is provided a variable device circuit according to the present invention, including: a substrate; at least one movable switch device formed on a first principal surface of the substrate; at least one fixed capacitor device formed on the first principal surface of the substrate; at least one variable capacitor device formed on the first principal surface of the substrate; at least one variable inductor device formed on the first principal surface of the substrate; and wiring lines for electrically connecting the devices to one another, the wiring lines being formed on the first principal surface of the substrate; wherein electrical connections among the devices can be selected by operation of the movable switch device, whereby achieving stable, low-loss circuit characteristics with lower manufacturing cost.

Abstract: An additive process disk drive suspension interconnect, and method therefor is provided. The interconnect has a metal grounding layer of typically stainless steel or copper metallized stainless steel, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: A multilayer printed wiring board includes a mounting portion supporting a semiconductor device and a layered capacitor portion including first and second layered electrodes and a ceramic high-dielectric layer therebetween. The first layered electrode is connected to a ground line and the second layered electrode is connected to a power supply line. The ratio of number of via holes, each constituting a conducting path part electrically connecting a ground pad to the ground line of a wiring pattern and passing through the second layered electrode in non-contact, to number of ground pads is 0.05 to 0.7. The ratio of number of second rod-shaped conductors, each constituting a conducting path part electrically connecting a power supply pad to the power supply line of the wiring pattern and passing through the first layered electrode in non-contact, to number of power supply pad is 0.05 to 0.7.

Abstract: A dielectric ceramic composition includes about 10% to about 40% by weight of BaO, about 20% to about 65% by weight of SiO2, about 6% to about 40% by weight of Al2O3, about 1% to about 15% by weight of B2O3, about 0.3% to about 3% by weight of Cr2O3, and about 1% to about 40% by weight of ZrO2. A multilayer ceramic substrate has a laminated structure including an inner layer portion and outer layer portions that have a smaller thermal expansion coefficient than that of the inner layer portion. The use of the dielectric ceramic composition for the outer layer portions enables the ceramic to be resistant to erosion caused by a plating liquid used for plating external conductive films, thus maintaining good adhesiveness between the external conductive films and the outer layer portions.

Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

Abstract: A multilayer printed wiring board includes: an insulating base including an indentation section formed thereon; a conductor pattern formed on the insulating base, the conductor pattern including a thick film section formed by embedding a conductor in the indentation section; and a via hole section formed in an upper layer of the insulating base, the via hole section including a bottom portion that is in contact with the thick film section.

Abstract: A wiring board comprising: a board core (11) having a core main surface (12) and a core reverse surface (13); a capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101?, 1101?, 1101??, 1101??, 1101???) having a capacitor main surface (102) and a capacitor reverse surface (103) and having a structure in which first inner electrode layers (141) and second inner electrode layers (142) are alternately laminated and arranged via a dielectric layer (105), the capacitor (101, 101A, 101B, 101C, 101D, 101E, 101F, 101G, 101H, 101J, 1101, 1101?, 1101?, 1101??, 1101??, 1101???) being accommodated in the board core (11) in a state in which the core main surface (12) and the capacitor main surface (102) are oriented on a same side; and a wiring laminated portion (31) having a structure in which interlayer insulating layers (33, 35) and conductor layers (42) are alternately laminated on the core main surface (12) and the capacitor main surface (102), wherein an inductor (251, 252, 253) or a resistor

Abstract: An embedded resistor and capacitor circuit and fabrication method is provided. The circuit includes a substrate, a conductive foil laminated to the substrate, and a thick film dielectric material disposed on the conductive foil. One or more thick film electrodes are formed on the dielectric material and a thick film resistor is formed at least partially contacting the thick film electrodes. A capacitor is formed by an electrode and the conductive foil. The electrodes serve as terminations for the resistor and capacitor.

Abstract: A method for manufacturing a printed circuit board having an embedded component is disclosed. The method includes: forming at least one contact bump and at least one electrode bump on one side of a base substrate; mounting the component such that the electrode bump is in correspondence with a contact terminal of the component; stacking an insulation layer, in which an opening is formed in correspondence to the component, on the one side of the base substrate, such that the contact bump penetrates the insulation layer; filling a filler in the opening; and stacking a metal layer on the insulation layer. Using the method, the reliability of circuit connections between the component and the circuit patterns can be improved, and the manufacturing process can be reduced in embedding the component in the printed circuit board.

Abstract: A multilayer printed wiring board includes a mounting portion supporting a semiconductor device and a layered capacitor portion including first and second layered electrodes and a ceramic high-dielectric layer therebetween. The first layered electrode is connected to a ground line and the second layered electrode is connected to a power supply line. The ratio of number of via holes, each constituting a conducting path part electrically connecting a ground pad to the ground line of a wiring pattern and passing through the second layered electrode in non-contact, to number of ground pads is 0.05 to 0.7. The ratio of number of second rod-shaped conductors, each constituting a conducting path part electrically connecting a power supply pad to the power supply line of the wiring pattern and passing through the first layered electrode in non-contact, to number of power supply pad is 0.05 to 0.7.

Abstract: The present invention incorporates electronic components into an electronic core structure that may be readily hot laminated by existing processes. The structure may include multiple desired electronic components, such as a display, battery or other power source, integrated circuits, switches, magnetic stripe emulator, antenna, smart chips or other input devices. The structure includes laminated buffer layers to bridge layers and compensate for variation in electronic component dimensions. The structure may also incorporate battery packaging as part of the core layer structure and use printed electronic circuitry as part of the electronic core layers to impart the desired characteristics. A variety of components may be incorporated in the structure.

Abstract: A method of making capacitive/resistive devices provides both resistive and capacitive functions. The capacitive/resistive devices may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive devices conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: A thin-film assembly (1) including a substrate (2) and at least one electronic thin-film component (8) applied on the substrate by thin-film technology, wherein a base electrode (4) is provided on the substrate, on which base electrode thin-film layers (21) forming part of the thin-film component are arranged together with an upper top electrode (9); the substrate (2) is comprised of a printed circuit board (2) known per se and including an insulation-material base body (3) and a metal coating as the conductor layer (5), wherein the conductor layer (5) forms the base electrode (4) and, to this end, is smoothed at least on the location of the thin-film component (8), and wherein a contact layer (18) is applied by thin-film technology between the smoothed, optionally reinforced, conductor layer (5) and the superimposed thin-film layers (21) of the thin-film component (8), which contact layer is physically or chemically adsorbed on the surface of the base electrode (4).

Abstract: A detonator assembly according to one arrangement includes a capacitor discharge unit having a capacitor and a resistor formed on a surface of the capacitor. At least one side of the resistor is electrically connected to one electrode of the capacitor. In another arrangement, another type of energy source besides the capacitor is used.

Abstract: A printed circuit board wiring system including a printed wiring circuit board having a plurality of conductive layers, at least one electronic part mounted on one side of the circuit board and configured to output signals via signal lines, and an auxiliary wiring package mounted on the other side of the circuit board and including a plurality of conductive layers configured to allow the signal lines from the electronic part to pass therethrough so as to be connected to the circuit board. Further, a first set of signal lines are immediately drawn from the at least one electronic part using half of the plurality of conductive layers of the circuit board without passing through the auxiliary wiring package, and a second set of signal lines are drawn from the at least one electronic part through the circuit board and the auxiliary wiring package using the other half of the plurality of conductive layers of the circuit board.

Abstract: A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.

Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias.

Abstract: A multilayer wiring board includes a first insulating film and a first patterned metal wiring film extending along a first major surface thereof, and a second insulating film a second patterned metal wiring film extending along a second major surface thereof. The wiring board includes solid metal interconnects connecting the first patterned metal wiring film to the second patterned metal wiring film, the interconnects extending through at least one of the first and second insulating films, and a microelectronic element disposed between the first and second patterned wiring films, the microelectronic element having bond pads conductively connected to the first patterned metal wiring films. The wiring board also includes a plurality of external contacts exposed at one or more external surfaces of the multilayer wiring board, the contacts being conductively connected to at least one of the first and second patterned metal wiring films.

Abstract: A printed wiring board manufacturing process comprises forming a conductive metal layer on at least one surface of an insulating film with a sputtered metal layer in between, selectively etching the conductive metal layer and the sputtered metal layer to produce a wiring pattern, treating the laminated film with a first treatment liquid capable of dissolving nickel of the sputtered metal layer, and treating with a second treatment liquid capable of dissolving chrome of the sputtered metal layer and also capable of eliminating the sputtered metal layer in the insulating film to remove a superficial surface of the insulating film exposed from the wiring pattern together with the residual sputtered metals in the superficial surface. A printed wiring board comprises an insulating film and a wiring pattern, wherein the insulating film in an area exposed from the wiring pattern has a thickness smaller by 1 to 100 nm than that of an area under the wiring pattern.

Abstract: An LCD capable of preventing and electrostatic discharge is provided. The LCD includes a liquid crystal panel for displaying an image, a PCB on which electronic devices are mounted to generate signals for driving the liquid crystal panel, and a protective pattern formed around an electronic device of the electronic devices, which is vulnerable to an electrostatic discharge.

Abstract: A component having an inductor to at least partially compensate for a capacitance in a circuit of the component, is described herein.

Abstract: A multi-conducting through hole structure is provided. The multi-conducting through hole structure has a substrate, at least two signal lines and at least a reference line. The substrate has a through hole passing therethrough. The signal lines are disposed on a portion of an inner surface of the through hole and extended through the through hole. The reference line is disposed on a portion of the inner surface of the through hole and extended through the through hole, wherein the reference line is disposed between the lines for signal. Because the signal lines are separated by the reference line, the electromagnetic coupling generated by signals can be reduced to lower the cross-talk interference between signals passing through the through hole, so as to promote the signal-transmission quality.

Abstract: The invention relates to a 3D electronic module comprising a stack (100) of at least a first slice (10) and a second slice (30), the first slice (10) having on a face (101) at least one set (4) of electrically conductive protrusions (41), and the second slice (30) comprising at least one zone (61) of electrically insulating material, traversing the thickness of the slice. The second slice (30) comprises at least one electrically conductive element (3) traversing said slice in a zone (61) of electrically insulating material, able to receive a set (4) of protrusions (41) of the first slice (10).

Abstract: Signal line conductors passing through vertical vias in an insulative substrate for supporting and interconnecting integrated circuit chips are provided with shielding conductors in adjacent vias that link respective power and ground planes. The shielding conductors' presence in positions around a signal via is made possible through the employment of power plane and ground plane conductive grids that are laid out in rhomboid patterns. The power plane and ground plane grids possess a left-right mirror relation to one another and are displaced to place the rhomboid's corners to avoid overlapping any of the grid lines.

Abstract: A protective layer for an electronic device and devices with a protective layer. In one exemplary embodiment, the protective layer includes two different layers which can be etched by the same etchant as which are at least one of optically or RF transparent.

Abstract: An electronics unit includes a low multi-point metallic mount on which an insulating layer is arranged. A conductor track system is arranged on the insulating layer and electronic power components are arranged on the conductor track system. The insulating layer is a sintered electrically insulating polymer layer on which the conductor track system, which comprises a sintered glass frit with a noble metal filling, is arranged.

Abstract: In a memory module, a plurality of memories are mounted on a module base plate, impedance between Vref and Vss near each memory is coupled to Vss by a decoupling capacitor and a Vref plane to achieve low impedance configuration in a wide frequency range, Vref planes are individually provided for the respective memories, and the Vref planes are connected to each other by using a high impedance wire, or a high impedance chip part. Accordingly, a wiring technique for a module which allows effective reduction of self noise and propagation noise can be provided.

Abstract: A method for manufacturing a printed circuit board having an embedded component is disclosed. The method includes: forming at least one contact bump and at least one electrode bump on one side of a base substrate; mounting the component such that the electrode bump is in correspondence with a contact terminal of the component; stacking an insulation layer, in which an opening is formed in correspondence to the component, on the one side of the base substrate, such that the contact bump penetrates the insulation layer; filling a filler in the opening; and stacking a metal layer on the insulation layer. Using the method, the reliability of circuit connections between the component and the circuit patterns can be improved, and the manufacturing process can be reduced in embedding the component in the printed circuit board.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: A multilayer circuit board includes: two or more layers of electrical insulative base members; and two or more layers of conductive patterned layers. At least two of the conductive patterned layers include coil patterns that will be a part of a coil, through holes are provided at predetermined positions of the electrical insulative base members, the positions being sandwiched between the coil patterns, so as to enable communication between respective end portions of the coil patterns, and conductive paste charged in the through holes allows electrical connection to be established between the respective end portions. The coil is formed so as to be wound in a direction perpendicular to a thickness direction of the multilayer circuit board. With this configuration, a multilayer circuit board can be provided, which facilitates increasing the winding number of a coil and has excellent flexibility of circuit design.

Abstract: A circuit board and a circuit apparatus using the same are provided, which have an improved heat radiation capability near through holes piercing through its metal substrate so as to address a requirement as to heat radiation capability. The circuit apparatus has the circuit board in which a metal substrate having pierced holes is formed as a core member. Protrusions are formed at the top ends of the pierced holes, and round corners are formed at the bottom ends of the same. Insulating layers are formed on both sides of the metal substrate, and wiring pattern layers are formed on the respective insulating layers. The insulator formed on one side of the metal substrate and the insulator formed on the other side of the metal substrate are extended to inside the pierced holes. The joining surface between the extended portions is shifted off the center position of the metal substrate in the thickness direction, toward the same side as where the protrusions are formed.

Abstract: An electrode connection structure between outer lead(s) of TCP(s), being first circuit board(s), and actuator member electrode(s) for connection to external circuitry, being second circuit board(s); actuator member(s) electrode(s) for connection to external circuitry being formed in or on floor(s) of recess(es) which is/are step(s) smaller in magnitude than thickness(es) of outer lead(s) protruding from polyimide substrate(s) of TCP(s); adhesive(s) having thickness(es) more or less equal to difference(s) between step(s) and thickness(es) of outer lead(s); and outer lead(s) being electrically and mechanically connected to electrode(s) for connection to external circuitry.

Abstract: An electronic control apparatus includes an exclusive power source line for a charge pump circuit which is discriminated from a common power source line. The exclusive power source line is connected to the common power source wiring via a via-hole va having an impedance larger than that of the exclusive source line. Similarly, the electronic control apparatus includes an exclusive ground line for the charge pump circuit which is discriminated from a common ground line. The exclusive ground line is connected to the common ground via an additional via-hole vb. Furthermore, a noise-suppressing capacitor C is connected between the exclusive power source and around lines.

Abstract: An electronic circuit, preferable as a sensor node, has a highly sensitive radio function and is capable of performing a low-power-consumption operation. The electronic device has a board; a connector for connecting a sensor; a first signal processor circuit receiving an input of sensor data from the sensor through the connector and forming transmission data; and a second signal processor circuit converting a transmission signal from the first signal processor circuit into a high-frequency signal. The connector and the first signal processor circuit are mounted on a first surface of the board, and the second signal processor circuit is mounted on a second surface of the board.

Abstract: A circuit substrate and a method of manufacturing a slot-shaped plated through slot thereon are provided. The circuit substrate has a linear slot. A slot-shaped plated through hole with a multiple transmission paths is formed in the linear slot so that a multiple of signals can be transmitted through the linear slot at one time. The circuit substrate and the method of manufacturing the slot-shaped plated through hole thereon can increase the level of integration of the circuit, decrease the average routing length of the circuit, boost the production efficiency and lower the production cost.

Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. Conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.

Abstract: A plurality of wiring patterns in a stripe form are formed to be parallel to one another on one surface of a base insulating layer. The wiring patterns each have a layered structure including a conductive layer and a wiring layer. A thin metal film is formed on the other surface of the base insulating layer, and a plurality of ground patterns in a stripe form are formed to be parallel to one another on the thin metal film. The wiring patterns and the ground patterns are provided in a staggered manner so that they are not opposed to one another with the base insulating layer interposed therebetween. In other words, the ground patterns are provided to be opposed to regions between the wiring patterns.

Abstract: In some embodiments, apparatuses and methods for improving ball-grid-array solder joint reliability in printed circuit boards. Such apparatuses may comprise, in an exemplary embodiment, a stiffened printed circuit board defining one or more cavities therein and including one or more stiffening members positioned, respectively, in the one or more cavities. The cavities and embedded stiffening members may be located proximate a ball-grid-array device footprint so as to resist deflection caused by the application of forces to the board by test probe pins during testing. Such methods may include, in an exemplary embodiment, creating one or more cavities in a middle sub-layer of a core layer of a stiffened printed circuit board and inserting one or more stiffening members, respectively, therein. Top and bottom sub-layers may then be secured to top and bottom surfaces of the middle sub-layer to complete the core layer. Other embodiments are also described and claimed.

Abstract: A printed circuit board with vias that reduce or eliminate radio frequency interference and method of forming the same. The printed circuit board includes non-conductive layers, conductive-layers interspersed between the non-conductive layers, vias extending through the non-conductive layers and the conductive layers, radio frequency absorbing material within each of the vias, where the radio frequency absorbing material is at a conductive layer within the printed circuit board at which a conductive trace is not connected to a via, an insulating layer over each radio frequency absorbing material, and a cylindrical conductive material within via and over each insulating layer.

Abstract: An information handling system has a printed circuit board with a split power plane having a plurality of sections that may be used for distributing different voltages on a single conductive foil layer of the printed circuit board to components on the printed circuit board. Capacitive coupling of the split power plane sections may be enhanced with a high dielectric fill between the portions.

Abstract: To provide a multilayer wiring board mainly used for an electronic device, in which a bump passing through an interlayer insulating film allows for interlayer connection between plural wiring films insulated from one another with plural interlayer insulating layers. In the multilayer wiring board, a circuit element such as an electronic part, a semiconductor chip, or a passive element is accommodated in the interlayer insulating films so as to connect its terminal with the corresponding wiring film. In particular, the semiconductor chip is polished to a thickness of 50 ?m or smaller, and the multilayer wiring board itself for the electronic device has the flexibility.

Abstract: Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.

Abstract: A flexible substrate comprises: a film; an insulating resin layer formed on each of a front face of the film and a rear face of the film, which rear face is opposite to the front face; a front-sided wiring pattern embedded in the insulating resin layer formed on the front face of the film, and a rear-sided wiring pattern embedded in the insulating resin layer formed on the rear face of the film; and a via which is located between the front-sided wiring pattern and the rear-sided wiring pattern and serves to electrically interconnect the front-sided wiring pattern and the rear-sided wiring pattern, wherein the insulating resin layer formed on each of the front face and the rear face of the film is thicker than the film.

Abstract: An electronic circuit, preferable as a sensor node, has a highly sensitive radio function and is capable of performing a low-power-consumption operation. The electronic device has a board; a connector for connecting a sensor; a first signal processor circuit receiving an input of sensor data from the sensor through the connector and forming transmission data; and a second signal processor circuit converting a transmission signal from the first signal processor circuit into a high-frequency signal. The connector and the first signal processor circuit are mounted on a first surface of the board, and the second signal processor circuit is mounted on a second surface of the board.

Abstract: The present invention relates to a capacitor-embedded PCB and a method of manufacturing the same. The capacitor-embedded PCB includes a dielectric layer, a lower electrode layer formed under the dielectric layer, and an upper electrode layer formed on the dielectric layer and configured to have at least one first blind via hole that is inwardly formed.

Abstract: A test board for testing a packaged integrated circuit has a set of contacts matching counterpart contacts on a socket. The contacts are each connected to a first voltage plane containing power, a second voltage plane carrying ground, and a set of terminals that will be connected to a tester system. The number of terminals necessary to operate the circuit is identified, both power terminal and signal-carrying terminals to the affected part of the circuit, and two of the three connections to the contacts are severed; e.g. the terminal carrying signals is disconnected from the power and ground. The disconnect from the voltage planes may be performed by an automated milling machine in a short time, providing much faster turnaround than a method that forms a custom-made board.

Abstract: The present invention provides an electromagnetic component formed from adjacent conducting layers of a multi-layer PCB and two additional conducting layers in contact with the PCB. The inventive component includes one or more winding turns formed by connecting the multiple layers of the multi-layer PCB with conductive vias and by connecting the additional conducting layers to respective top and bottom surfaces of the PCB. In one embodiment, one of the conducting layers is soldered to a top conducting layer of the PCB and the other of the conductive layers is soldered to a bottom conducting layer of the PCB, effectively increasing the cross-sectional area of the top and bottom winding layers. In another embodiment, the additional conducting layers are separated from the adjacent conducting PCB layers by a layer of insulation, permitting the additional conducting layers to form separate winding turns.

Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.