Thick Film Component Or Material Patents (Class 361/793)
  • Patent number: 5818699
    Abstract: An approximately lead-free mounting pad is formed on a first surface of a substrate having wiring circuits, and an electronic element having an approximately lead-free electrode is face-down mounted on the first surface. An approximately lead-free bump is formed on the approximately lead-free electrode of an electronic element. Mounting pads and approximately lead-free bumps are electrically and mechanically connected to each other by approximately lead-free conductive resin. An approximately lead-free sealing pattern is formed at the area which encloses the electronic element mounted area, of the first surface of the substrate. A weld ring made of Kovar is brazed onto the sealing pattern with approximately lead-free solder. The opening edge of a sealing cap made of Kovar disposed opposite to the weld ring and the weld ring are bonded at the deposited zone by welding.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: October 6, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Fukuoka
  • Patent number: 5740001
    Abstract: A patient monitoring/signal processing module with increased electrical isolation is disclosed. The combination of an inner isolation piece and an isolation film provide signal isolation and electrical over-voltage protection between a lower, isolated portion of the unit defined by a lower housing and the isolation piece and an upper, non-isolated portion of the unit, defined by an upper housing and the isolation piece, increasing the module's ability to survive an over-voltage condition without damage to itself or to the patient to whom it is coupled. The combination of the isolation film and the isolation piece results in a much thinner module than would otherwise have been necessary to achieve the same levels of signal and electrical isolation.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: April 14, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Erwin Flachslaender, Matthias Muehle, Wolfgang Kehrer
  • Patent number: 5488542
    Abstract: The multichip module includes a ceramic multilayer substrate, a thick film wiring, a thick film insulator, a thin film multilayer wiring portion and semiconductor chips. The thick film wiring and the thick film insulator are laminated on the ceramic multilayer substrate. The thin film multilayer wiring portion is formed on the thick film insulator. In this thin film multilayer wiring portion, thin film wirings and thin film insulators are alternately laminated. The semiconductor chips are mounted on the thin film insulator of the thin film multilayer wiring portion, and the chips are electrically connected to a plurality of bonding pads made of the thin film wirings of the thin film multilayer wiring portion. A thick film wiring is situated underneath each bonding pad, and the thick film wiring is electrically connected to the thin film wiring in order to serve as a part of the wiring.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: January 30, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenji Ito
  • Patent number: 5365407
    Abstract: A DC power supply device for use with a video tape recorder with a built-in camera has a plurality of power supply blocks for supplying a plurality of voltages, each of the power supply blocks being composed of a switching circuit for being supplied with a DC voltage and a smoothing circuit connected to an output terminal of the switching circuit. The power supply blocks are mounted on a multilayer circuit board which includes a layer of a ground pattern with an electric conductor extending substantially fully thereover, the ground pattern being separated into a plurality of ground pattern portions by a plurality of recesses defined therein, the power supply blocks having respective ground terminals connected to the ground pattern portions, respectively.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: November 15, 1994
    Assignee: Sony Corporation
    Inventors: Toshiya Nakabayashi, Hirokazu Nakayoshi, Kazuo Hashimoto
  • Patent number: 5337219
    Abstract: A method for altering an electrical connection in an electronic package including one or more semiconductor chips overlying, i.e., mounted directly onto, or mounted onto one or more modules which are mounted onto, a substrate such as a printed circuit card or printed circuit board, as well as the resulting electronic package, is disclosed. In accordance with a preferred embodiment of the inventive method, at least one plated, solder-filled hole in the substrate is drilled out to eliminate an unwanted electrical connection. A solder region, e.g., a solder ball, is inserted into the drilled out hole into contact with an electrically conductive member, e.g., an electrically conductive pin, extending from, for example, a module into the hole. A cylinder, including a central core of electrically conductive material, encircled by an annulus of electrically insulating material, is inserted into the hole.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: August 9, 1994
    Assignee: International Business Machines Corporation
    Inventors: Dennis C. Carr, Edward P. McLeskey, Frank H. Sarnacki
  • Patent number: 5315486
    Abstract: A hermetic package particularly adapted for high density interconnect (HDI) electronic systems employs a ceramic substrate which serves as a base for the hermetic package. The substrate comprises a cofired body including buried conductors which provide electrical continuity between a set of inner contact points and a set of outer contact points bridging a seal ring that comprises either a solder seal or a weldable seal for the hermetic package lid. The outer contact points may be directly connected to a leadframe. The leadframe leads, after severing, can be directly attached to a printed circuit board.
    Type: Grant
    Filed: June 7, 1993
    Date of Patent: May 24, 1994
    Assignee: General Electric Company
    Inventors: Raymond A. Fillion, William P. Kornrumpf, Edward S. Bernard
  • Patent number: RE34887
    Abstract: A ceramic multilayer circuit board comprising ceramic layers and wiring conductor layers laminated alternately, in which the ceramic layer has a thermal expansion coefficient lower than that of the wiring conductor and not lower than one half of that of the conductor layer and is formed from a glass which softens at a temperature not higher than the melting point of the wiring conductor layer; a semiconductor module having a high reliability in its solder joint part comprising said ceramic multilayer circuit board mounted with a ceramic carrier substrate being mounted with a semiconductor device, said board being able to use a silver or copper conductor having a good electro-conductivity; and an amorphous glass powder for said ceramic multilayer circuit board.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: March 28, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyuki Ushifusa, Hiroichi Shinohara, Kousei Nagayama, Satoru Ogihara, Tasao Soga