Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.

Abstract: An antiferromagnetic nanostructure according to one embodiment includes an array of at least two antiferromagnetically coupled magnetic atoms having at least two magnetic states that are stable for at least one picosecond even in the absence of interaction with an external structure, the array having a net magnetic moment of zero or about zero, wherein the array has 100 atoms or less along a longest dimension thereof. An atomic-scale structure according to one embodiment has a net magnetic moment of zero or about zero; two or more stable magnetic states; and having an array of atoms that has magnetic moments that alternate between adjacent magnetic atoms along one or more directions. Such structures may be used to store data at ultra-high densities.

Abstract: The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of MTJ memory elements coupled in series. The method detects the resistance states of individual MTJ memory elements in an MLC by sequentially writing each memory element to the low resistance state in order of ascending parallelizing write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.

Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

Abstract: According to one embodiment, a memory device includes: a first signal line; a second signal line; a transistor; a first memory region; and a second memory region. The transistor controls a conduction of each of a current flowing between the first and the second signal lines and an opposite current. The first memory region has a first magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and the magnetization direction becomes antiparallel when a current in another direction. The second memory region has a second magnetic tunnel junction element. A magnetization direction thereof becomes parallel when a current flows in one direction, and becomes antiparallel when a current flows in another first direction.

Abstract: Magnetic devices, magnetoresistive structures, and methods and techniques associated with the magnetic devices and magnetoresistive structures are presented. For example, a magnetic device is presented. The magnetic device includes a ferromagnet, an antiferromagnet coupled to the ferromagnet, and a nonmagnetic metal proximate to the ferromagnet. The antiferromagnet provides uniaxial anisotropy to the magnetic device. A resistance of the nonmagnetic metal is dependent upon a direction of a magnetic moment of the ferromagnet.

Abstract: The present disclosure concerns a magnetic memory element suitable for a thermally-assisted switching write operation, comprising a current line in electrical communication with one end of a magnetic tunnel junction, the magnetic tunnel junction comprising: a first ferromagnetic layer having a fixed magnetization; a second ferromagnetic layer having a magnetization that can be freely aligned at a predetermined high temperature threshold; and a tunnel barrier provided between the first and second ferromagnetic layer; the current line being adapted to pass a heating current through the magnetic tunnel junction during the write operation; wherein said magnetic tunnel junction further comprises at least one heating element being adapted to generate heat when the heating current is passed through the magnetic tunnel junction; and a thermal barrier in series with said at least one heating element, said thermal barrier being adapted to confine the heat generated by said at least one heating element within the magnet

Abstract: A magnetic memory according to an embodiment includes: a magnetic nanowire; a first electrode and a second electrode provided to different locations of the magnetic nanowire; a third electrode including a magnetic layer, the third electrode being provided to a location of the magnetic nanowire between the first electrode and the second electrode; an intermediate layer provided between the magnetic nanowire and the third electrode, the intermediate layer being in contact with the magnetic nanowire and the third electrode; a fourth electrode of a nonmagnetic material provided onto the magnetic nanowire and being on the opposite side of the magnetic wire from the third electrode; and an insulating layer provided between the magnetic nanowire and the fourth electrode, the insulating layer being in contact with the magnetic nanowire and the fourth electrode.

Abstract: In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer.

Abstract: A memory element is provided that includes a ferromagnetic (FM) layer having one or more ferromagnetic materials. One or more first molecule layers are positioned on the FM layer where charge transfer and interface chemistry between the one or more first molecule layers and FM layer induces a magnetic moment in the one or more first molecule layers. The magnetic moment is stored in the one or more first molecule layers acting as bit information that is retained or written into the one or more first molecule layers. One or more spin-filter layers are positioned on the one or more first molecule layers. The one or more spin-filter layers are positioned on the one or more spin-filter layers to form a physical or a chemical ?-dimer layer structure.

Abstract: Disclosed is a memory circuit and method of forming the same. The memory circuit comprises a lower metallization layer defining first conducting lines. A continuous magnetic storage element stack is atop the lower metallization layer wherein a bottom electrode of the stack is in direct contact with the first conducting lines. An upper metallization layer is atop the continuous magnetic storage element stack, the upper metallization layer defining second conducting lines, which are in direct contact with said continuous magnetic storage element stack. Localized areas of the continuous magnetic storage element stack define discrete magnetic bits, each energizable through a selected pair of the first and second conducting lines. In a second aspect and a third aspect, the continuous magnetic storage element stack is respectively partially and fully etched through a single mask, to define the discrete magnetic bits.

Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Abstract: In accordance with one aspect of the invention, a magnetic memory element records information in a spin valve structure having a free layer, a pinning layer, and a nonmagnetic layer sandwiched therebetween. The magnetic memory element further has, on the free layer, a separate nonmagnetic layer and a magnetic change layer having magnetic characteristics which change according to temperature. Multiple cutouts, including one cutout with a different shape, are provided in a peripheral portion of the spin valve structure. A method of driving the magnetic memory element is characterized in that information is recorded by applying unipolar electric pulses.

Abstract: A magnetic memory according to an embodiment includes: a magnetic nanowire; first insulating layers provided on a first surface of the magnetic nanowire, each of the first insulating layers having a first and second end faces, a thickness of the first insulating layer over the first end face being thicker than a thickness of the first insulating layer over the second end face; first electrodes on surfaces of the first insulating layers opposite to the first surface; second insulating layers on the second surface of the magnetic nanowire, each of the second insulating layers having a third and fourth end faces, a thickness of the second insulating layer over the third surface being thicker than a thickness of the second insulating layer over the fourth end face; and second electrodes on surfaces of the second insulating layers.

Abstract: A memory element has a layered structure, including a memory layer that has magnetization perpendicular to a film face in which a magnetization direction is changed depending on information, and includes a Co—Fe—B magnetic layer, the magnetization direction being changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer, a magnetization-fixed layer having magnetization perpendicular to a film face that becomes a base of the information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, a first oxide layer and a second oxide layer.

Abstract: A magnetic junction is described. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The magnetic junction may also include an additional nonmagnetic spacer layer and an additional pinned layer opposing the nonmagnetic spacer layer and the pinned layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer is configured to be switchable using a write current passed through the magnetic junction. The free layer is also configured to be thermally stable in a quiescent state and have a reduced thermal stability due to heating from the write current being passed through the magnetic junction. In some aspects, the free layer includes at least one of a pinning layer(s) interleaved with ferromagnetic layer(s), two sets of interleaved ferromagnetic layers having different Curie temperatures, and a ferrimagnet having a saturation magnetization that increases with temperature between ferromagnetic layers.

Abstract: A method and system for setting the direction of pinned layers in a magnetic junction are described. In one aspect, a magnetic field greater than the coercivity of the layers in a pinned layer but less than the coupling field between the layers is applied. In another aspect the pinned layers are switched from an anti-dual state to a dual state using a spin transfer torque current. In another aspect, a magnetic junction having a partial perpendicular anisotropy (PPMA) layer in the pinned layer is provided. In some aspects, the PPMA layer is part of a synthetic antiferromagnetic structure. In some embodiments, a decoupling layer is provided between the PPMA layer and another ferromagnetic layer in the pinned layer.

Abstract: There is disclosed a memory element including a memory layer that has a magnetization perpendicular to a film face and a magnetization direction thereof varies corresponding to information; a magnetization-fixed layer that has a magnetization that is perpendicular to the film face; and an insulating layer that is provided between the memory layer and the magnetization-fixed layer, wherein the memory layer has a lamination structure of a Co—Fe—B layer and an element belonging to any one of 1A group, 2A group, 3A group, 5A group, or 6A group, an electron that is spin-polarized is injected in a lamination direction of a layered structure, and thereby the magnetization direction of the memory layer varies and a recording of information is performed with respect to the memory layer, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: A magnetic memory cell includes: a magnetization recording layer; and a magnetic tunneling junction section. The magnetization recording layer includes a ferromagnetic layer with perpendicular magnetic anisotropy. The magnetic tunneling junction section is used for reading information in the magnetization recording layer. The magnetization recording layer includes two domain wall moving areas.

Abstract: Magnetic wires that include two antiferromagnetically coupled magnetic regions show improved domain wall motion properties, when the domain walls are driven by pulses of electrical current. The magnetic regions preferably include Co, Ni, and Pt and exhibit perpendicular magnetic anisotropy, thereby supporting the propagation of narrow domain walls. The direction of motion of the domain walls can be influenced by the order in which the wire's layers are arranged.

Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.

Abstract: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a first ferromagnetic layer, a first nonmagnetic spacer layer proximate to the first ferromagnetic layer, a second ferromagnetic layer proximate to the first nonmagnetic spacer layer, and a first antiferromagnetic layer proximate to the second ferromagnetic layer. For example, the first ferromagnetic layer may comprise a first pinned ferromagnetic layer, the second ferromagnetic layer may comprise a free ferromagnetic layer, and the first antiferromagnetic layer may comprise a free antiferromagnetic layer.

Abstract: A magnetoresistive device having a magnetic junction including a first fixed magnetic layer structure, a second fixed magnetic layer structure, and a free magnetic layer structure, wherein the first second and free magnetic layer structures are arranged one over the other. The first second and free magnetic layer structures have respective magnetization orientations configured to orient in a direction at least substantially perpendicular to a plane defined by an interface between the free magnetic layer structure and either one of the first fixed magnetic layer structure or the second fixed magnetic layer structure. The respective magnetization orientations of the first and the second fixed magnetic layer structures are oriented anti-parallel to each other, and the first fixed magnetic layer structure is a static fixed magnetic layer structure having a switching field that is larger than a switching field of the free magnetic layer structure.

Abstract: Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.

Abstract: A magnetic memory device includes: a free layer for storing information; and a reference layer disposed on a first surface of the free layer. The reference layer includes at least two magnetic domains and a magnetic domain wall between the at least two magnetic domains. The reference layer extends past both ends of the free layer. The magnetic memory device further includes a switching element connected to a second surface of the free layer. Another magnetic memory device includes: a first reference layer having a first magnetic domain wall; a second reference layer having a second magnetic domain wall; and a memory structure between the first and second reference layers. The memory structure includes: a first free layer adjacent to the first reference layer; a second free layer adjacent to the second reference layer; and a switching element between the first and second free layers.

Abstract: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

Abstract: A semiconductor storage device according to the present embodiment includes a plurality of bit lines, a plurality of word lines, and a plurality of memory cells each including a storage element and a switching element which are connected in series between adjacently paired ones of the bit lines. Gates of the switching elements of the memory cells connected between one of the adjacently paired ones of the bit lines are respectively connected to different ones of the word lines. A plurality of the storage elements and a plurality of the switching elements of the adjacent memory cells are alternately connected in series.

Abstract: A spin-valve element has a pair of ferromagnetic layers having mutually different coercive forces, sandwiching an insulating layer or a nonmagnetic layer therebetween. The in-plane shape of the spin-valve element is substantially circular in shape but is provided, in the peripheral portion, with a plurality of cutouts NS, NW, NE, NN. Preferably, the shape of at least one cutout be made different from that of others. Moreover, a storage device that employs such a spin-valve element is provided.

Abstract: A magnetic unit includes: a magnetic pinned layer, a first function body, and a second function body. The magnetic pinned layer is provided that a magnetization direction is pinned. The first function body is provided in contact with the magnetic pinned layer and performs a function with the magnetic pinned layer. The second function body is provided in contact with the magnetic pinned layer. The second function body is any of a nonmagnetic conductor, a nonmagnetic insulator, and a function body. The magnetic pinned layer includes: a plurality of magnetic substance layers, and a nonmagnetic conductive layer provided between the plurality of magnetic substance layers. The nonmagnetic conductive layer ferromagnetically or antiferromagnetically couples magnetic substance layers on both sides. A total amount of magnetizations of the plurality of magnetic substance layers is approximately zero.

Abstract: A memory device includes a memory unit including a plurality of first conductive lines and a plurality of second conductive lines that cross the first conductive lines, and a driving unit module coupled with the plurality of the first conductive lines through respective ones of a plurality of contacts and coupled with and the plurality of the second conductive lines through respective ones of the plurality of contacts, wherein as the first conductive lines become farther from the driving unit module along a direction that the second conductive lines extend, the respective contacts of the first conductive lines have lower resistance values.

Abstract: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive element includes a first reference layer, a first nonmagnetic layer, a recording layer, a second nonmagnetic layer, and a second reference layer which are sequentially stacked, the recording layer being connected to a terminal to which a high-level voltage is applied, a magnetization direction of the recording layer being variable, magnetization directions of the first and second reference layers being invariable and antiparallel, a first selection transistor connected between a first bit line and the first reference layer, and constituted of an N-channel MOSFET, a second selection transistor connected between a second bit line and the second reference layer, and constituted of an N-channel MOSFET, and a word line connected to gates of the first and second selection transistors.

Abstract: A data storage method includes writing data to a ferromagnetic shape-memory material in its ferromagnetic state, the material exhibiting more than two stable states. A data storage device includes a non-volatile memory element containing a ferromagnetic shape-memory alloy in a martensite state, the shape-memory alloy being ferromagnetic in a plurality of stable states of the memory element.

Abstract: A magnetic tunnel junction having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation, the ferromagnetic free layer switchable by spin torque. The magnetic tunnel junction includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than 700 Oe and positioned to apply a magnetic field on the free layer.

Abstract: A flip-flop has an output control node and an isolation switch selectively couples a retention sense node to the output control node. A sense circuit selectively couples an external sense current source to the retention sense node and to magnetic tunneling junction (MTJ) elements. Optionally a write circuit selectively injects a write current through one MTJ element and then another MTJ element. Optionally, a write circuit injects a write current through a first MTJ element concurrently with injecting a write current through a second MTJ element.

Abstract: According to one embodiment, a magnetoresistive element includes first and second magnetic layers and a first nonmagnetic layer. The first magnetic layer has an axis of easy magnetization perpendicular to a film plane, and a variable magnetization. The second magnetic layer has an axis of easy magnetization perpendicular to a film plane, and an invariable magnetization. The first nonmagnetic layer is provided between the first and second magnetic layers. The second magnetic layer includes third and fourth magnetic layers, and a second nonmagnetic layer formed between the third and fourth magnetic layers. The third magnetic layer is in contact with the first nonmagnetic layer and includes Co and at least one of Zr, Nb, Mo, Hf, Ta, and W.

Abstract: A method of writing data in a resistive memory device includes performing a test operation to distinguish normal memory cells from weak memory cells, during a write operation directed to normal memory cells using a write current and during a weak write operation directed to weak memory cells using a higher write current.

Abstract: A first write driver applies a first voltage above a fixed potential to a first terminal. A second write driver applies a second voltage that is higher above the fixed potential than the first voltage to a second terminal. There is at least one magnetic tunnel junction (MTJ) structure coupled at the first terminal at a first side to the first write driver and coupled at the second terminal at a second side to the second write driver. The first side of the MTJ structure receives the first voltage and the second side of the MTJ structure receives a ground voltage to change from a first state to a second state. The second side of the MTJ structure receives the second voltage and the first side of the MTJ structure receives the ground voltage to change from the second state to the first state.

Abstract: Systems and method for reading/sensing data stored in magnetoresistive random access memory (MRAM) cells using magnetically annealed reference cells. A MRAM includes a reference circuit comprising at least one magnetic storage cell, wherein each magnetic storage cell in the MRAM is programmed to the same state. The reference circuit includes a load element coupled to the magnetic storage cell, wherein the load element is configured to establish a reference voltage during a read operation.

Abstract: An integrated circuit and method for manufacturing an integrated circuit are described. In one embodiment, the integrated circuit includes a memory cell that includes a resistivity changing memory element. The resistivity changing memory element is electrically coupled to a select transistor that includes a FinFET including a source, a drain, and a fin structure formed above a surface of a substrate between the source and the drain. The fin structure includes a channel area extending in a direction substantially parallel to the surface of the substrate, and a dielectric layer formed around at least a portion of the channel area such that an effective channel width of the select transistor depends at least in part on a height of the fin structure.

Abstract: A magnetic memory cell including a soft magnetic layer and a coupling layer, and methods of operating the memory cell are provided. The memory cell includes a stack with a free ferromagnetic layer and a pinned ferromagnetic layer, and a soft magnetic layer and a coupling layer may also be formed as layers in the stack. The coupling layer may cause antiferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction antiparallel to the magnetization of the soft magnetic layer, or the coupling layer may cause ferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction parallel to the magnetization of the soft magnetic layer. The coupling layer, through a coupling effect, reduces the critical switching current of the memory cell.

Abstract: A magnetic random access memory (MRAM) cell including a magnetic tunnel junction including a tunnel barrier layer between a first magnetic layer having a first magnetization direction, and a second magnetic layer having a second adjustable magnetization to vary a junction resistance of the magnetic tunnel junction from a first to a second junction resistance level; said magnetic tunnel junction further including a switching resistant element electrically connected to the magnetic tunnel junction and having a switching resistance switchable from a first to a second switching resistance level when a switching current is passed through the switching resistant element, such that a resistance of the MRAM cell can have at least four different cell resistance levels depending of the resistance level of the junction resistance and the switching resistance. The disclosed MRAM cell achieves improved read margin and allows for writing at least four different cell resistance levels.

Abstract: A non-volatile memory device includes a first electrode, a resistive switching material stack overlying the first electrode. The resistive switching material stack comprising a first resistive switching material and a second resistive switching material. The second resistive switching material overlies the first electrode and the first resistive switching material overlying the second resistive switching material. The first resistive switching material is characterized by a first switching voltage having a first amplitude. The second resistive switching material is characterized by a second switching voltage having a second amplitude no greater than the first switching voltage. A second electrode comprising at least a metal material physically and electrically in contact with the first resistive switching material overlies the first resistive switching material.

Abstract: A magneto-resistive device having a large output signal as well as a high signal-to-noise ratio is described along with a process for forming it. This improved performance was accomplished by expanding the free layer into a multilayer laminate comprising at least three ferromagnetic layers separated from one another by antiparallel coupling layers. The ferromagnetic layer closest to the transition layer must include CoFeB while the furthermost layer is required to have low Hc as well as a low and negative lambda value. One possibility for the central ferromagnetic layer is NiFe but this is not mandatory.

Abstract: An array of rows and columns of SMT MRAM cells has each of the columns associated with one of its adjacent columns. Each of the SMT MRAM cells of the column is connected to a true data bit line and each of the SMT MRAM cells of the associated pair of columns is connected to a shared complement data bit line. A shunting switch device is connected between each of the true data bit lines and the shared complement data bit line for selectively connecting one of the true data bit lines to the shared complement data bit line to effectively reduce the resistance of the complement data bit line and to eliminate program disturb effects in adjacent non-selected columns of the SMT MRAM cells.

Abstract: Provided is a spin valve element capable of performing multi-value recording, which includes a pair of ferromagnetic layers having different coercivities from each other, and sandwiching an insulating layer or a non-magnetic layer. The ferromagnetic layer having the smaller coercivity has a substantially circular in-plane profile, and a plurality of island-shaped non-magnetic portions IN, IE, IW, and IS are included. In addition, a storage device is manufactured by using such a spin valve element.

Abstract: A device comprising: an assembly consisting of two, respectively upper and lower thin layers each forming a ferromagnetic element and separated by a thin layer forming a non magnetic element, said assembly being made up so that the layers forming the ferromagnetic elements are magnetically coupled through the layer forming a non magnetic element; an electrode, a layer forming a ferroelectric element in which the polarization may be oriented in several directions by applying an electric voltage through said layer, said layer forming a ferroelectric element being positioned between the layer forming a lower ferromagnetic element and the electrode; said device being configured so as to allow control of the magnetic configuration of the layers forming ferromagnetic elements by the direction of the polarization in the layer forming a ferroelectric element.

Abstract: Techniques for determining access information describing an accessing of a phase change memory (PCM) device. In an embodiment, an initial read time for a PCM cell is determined based on a final read time for the PCM cell, set threshold voltage information and a reset threshold voltage drift, wherein the final read time and the initial read time define a time window for reading the PCM cell. In another embodiment, a time window extension is determined based on a reset threshold voltage drift.

Abstract: A magnetic memory includes magnetic memory elements corresponding to magnetic memory cells and at least one shift register. Each magnetic memory element includes a pinned layer, a free layer, and a nonmagnetic spacer layer between the pinned and free layers. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic memory element. The shift register(s) correspond to the magnetic memory elements. Each shift register includes domains separated by domain walls. A domain is antiparallel to an adjoining domain. The shift register(s) are configured such that an equilibrium state aligns a portion of the domains with the magnetic memory elements. The shift register(s) are also configured such that each domain wall shifts to a location of an adjoining domain wall when a shift current is passed through the shift register(s) in a direction along adjoining domains.