Abstract: A method and system provide routing of signals through a communications network. A transmitted signal is received. The signal has an associated parameter that is monitored as the signal is received. The parameter indicates the extent to which prior retransmission of the signal has occurred. The signal is retransmitted only if its parameter satisfies at least one predetermined criterion.

Abstract: A clock synchronization buffer for a counter clock flow pipelined circuit including a cascade of processing modules that receive data from a previous module and provide output results to a following module. The clock synchronization buffer receives a clock input signal and provides clock signals to a local processing module and to the next pipeline stage. The clock synchronization buffer includes a selectable delay stage that receives a clock input signal and a delay select signal and outputs a clock signal having a selected delay. An amplifier connected to the selectable delay stage provides the delayed clock signal to a local processing module that corresponds to the clock synchronization buffer circuit. An inverting amplifier connected to the selectable delay stage provides the delayed clock signal to the next pipeline stage. A clock synchronization controller synchronizes the phases of reference clock input and synchronized clock input signals.

Abstract: A nodal division multiple access technique for multiple access to a communications channel such as a satellite transponder. The present invention provides multiple access into a communications channel where each accessing site utilizes one signal from a composite amplitude/phase digital signal constellation, such that demodulators receive the composite signal without changes in the system design related to the multiple access operation.

Abstract: Systems and methods for adapting a de-jitter buffer to conform to air link conditions. An air link characteristic may be detected before that characteristic begins to affect packet delivery, such as by slowing or speeding delivery delay at a subscriber station. A receiver-side de-jitter buffer, which adds delay to received packets, may adaptively adjust its size based upon the detected air link characteristic, such that the de-jitter buffer is appropriately sized for anticipated data packets before they are received at the subscriber station.

Abstract: It is an object of this invention to improve speech quality in voice communications. Provided is a jitter buffer controller for controlling a jitter buffer in which arrived packets are accumulated, including: a jitter measuring portion for measuring jitters in the arrived packets; a judging portion for judging whether or not the jitters of the packets can be absorbed with an accumulation capacity of the jitter buffer; a determining portion for determining levels of importance of the packets; and a control portion for performing reproduction processing or discarding processing on a packet, among the packets accumulated in the jitter buffer, having jitter that cannot be absorbed with the accumulation capacity of the buffer, depending on a level of importance of the packet.

Abstract: In a method and a device for virtual concatenation transmission which multiplex traffics of low-speed frames into a high-speed frame based on a virtual concatenation, a virtual concatenation with an excellent transmission efficiency is provided. Specifically, in order to provide the transmission method and the device which do not waste channels, require little labor of operators, do not cause an instantaneous interruption, and require no memory capacity, a plurality of low-speed frames are multiplexed into arbitrary positions within a high-speed frame to compose a virtual concatenation, and are transmitted together with virtual concatenation information indicating a concatenation state of positions of the low-speed frames, with a phase relationship being maintained.

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to be measured in the signal-under-measurement, a filter for removing carrier frequency components of the signal-under-measurement from the pulse signal and a jitter calculator for calculating the jitter in the signal-under-measurement based on the signal outputted out of the filter.

Abstract: The present invention provides a system, apparatus, and method for determining latency differences in channels within a link at a single test site. In particular, the method allows for a single transmitting device to determine distinct latency differences on both transmitter and receiver-side paths without requiring a terminating node on the other side of the connection. In other words, a switch is used, in lieu of such a terminating node, at the other side of the paths that switches at least one channel's content onto another channel and sends it back for a round trip on various transmitter-and-receiver-side-paths combinations. The present invention is based on round trip measurements and switching capability of the receiving node.

Abstract: A tester that generates various data patterns to assure that link receivers and transmitters are functioning properly (i.e., are functioning according to a relevant network specification) across the entire storage area network. In various embodiments, this tester may be used in Fibre Channel type SANs or in fiber connectivity (FICON) type SANs.

Abstract: A supervisory communications node monitors and controls communications with a plurality of remote devices throughout a widely distributed network. A method is provided to convey and maintain information used to synchronize the packetization and burst operations within the network. During session setup, jitter constraints indirectly are used to explicitly communicate a synchronization timing reference. The timing reference is set at the beginning of a phase/period boundary used to service the session. In an embodiment, the announcement of the first grant is used as an explicit indication of the synchronization timing reference value. In another embodiment, the synchronization timing reference value is inferred if a remote device receives contiguous voice grants meeting certain conditions. In an embodiment implementing periodic scheduling, the actual arrival of the first grant is used to infer the synchronization timing reference value.

Abstract: Communication methods and apparatuses are provided.

Abstract: A digital broadcasting system and method of processing data are disclosed. Herein, a method of processing data in a transmitting system includes creating a data group including a plurality of mobile service data packets, re-adjusting a relative position of at least one main service data packet of a main service data section, the main service data section including a plurality of main service data packets, and multiplexing the mobile service data of the data group and the main service data of the main service data section in burst units. Herein, a position of an audio data packet among the main service data packets of the main service data section may be re-adjusted. Also, a position of an audio data packet included in the main service data section may be re-adjusted based upon a multiplexing position of the main service data section.

Abstract: A method, apparatus and system for employing an automatic data aligner for multiple serial receivers in serial link technologies is provided. In one embodiment, converting a transmission data path of a single bit into a parallel bit via a data aligner, wherein the data is being transmitted via one or more ports. Further, binding data transmission channels to reduce latency in transmission of the data, wherein the binding of the data transmission channels further includes inserting delay to match latency via the one or more ports.

Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

Abstract: This invention provides a method of detecting time alignment of an analog audio signal and a digital audio signal in a hybrid radio system. The method comprises the steps of filtering the analog audio signal to produce a filtered analog audio signal, filtering the digital audio signal to produce a filtered digital audio signal, and using the filtered analog audio signal and the filtered digital audio signal to calculate a plurality of correlation coefficients, wherein the correlation coefficients are representative of time alignment between the analog audio signal and the digital audio signal. An apparatus for performing the method is also provided.

Abstract: Serial data communication methods and apparatus using a single line are provided. The data communication methods may include: setting a rising edge of a serial pulse signal so that a cycle of the serial pulse signal begins therefrom; setting a falling edge of the serial pulse signal within the cycle of the serial pulse signal according to a data value recorded within the cycle of the serial pulse signal; and transmitting a packet formed by combining at least one cycle of the serial pulse signal in series via a single line.

Abstract: Systems and methods that measure the delay (latency) through a digital processor or circuit. A waveform generator outputs a primary (chirp) signal to the digital circuit, along with an auxiliary pulse signal to a delay circuit. The auxiliary signal corresponds to a sample of the primary signal that is input to and output from the digital circuit. A clock circuit provides input and output clock signals to the digital circuit and delay circuit. Clocked outputs of the digital circuit and delay circuit are input to an analyzer. The time delay between the auxiliary signals and delayed auxiliary signals are measured by a time measurement circuit. The analyzer processes the outputs of the processor and delay circuit and the time delay (reference time) using an analysis routine to determine the latency of the digital circuit.

Abstract: A data communication system includes a data transmitting apparatus and a data receiving apparatus. The data transmitting apparatus includes a packetizing section that generates data packets, an encoding section that performs redundant encoding on the data packets in predetermined time units and generates encoded blocks, a data transmitting section that transmits each encoded block to the data receiving apparatus, a data-size acquiring section that acquires a data size of transmission data in each predetermined time unit, and a packet-size determining section that, on the basis of the acquired data size, in each predetermined time unit, determines a packet size of each data packet. The data receiving apparatus includes a data receiving section that acquires data packets of the transmission data by receiving each encoded block transmitted, and a depacketizing section that analyzes the data packets of the acquired transmission data and reconfigures the transmission data.

Abstract: A demodulation section 13 receives a TDMA-TDD based phase-modulated burst signal of mobile communications and demodulates the burst signal by a synchronous detection system (or a quasi-synchronous detection system). The demodulation section 13 includes a frequency deviation compensation section and a carrier recovery section each having a loop filter 14 with three or more stages of time constants. The time constants are switched by a selector switch 15 based on a control signal from a demodulation control section 16. This achieves quick pull-in and jitter after convergence is minimized, thereby allowing highly efficient performance of frequency deviation compensation, etc. that is required for synchronous detection (or quasi-synchronous detection) without increasing the size of circuit.

Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.

Abstract: Methods for using communication network statistics in the operation of a real-time communication system are disclosed. Embodiments of the invention may provide improved playback of real-time media streams by incorporating into the algorithms used for playback of the media stream network statistics typically calculated by some transport protocols. An additional aspect of the present invention may include machine-readable storage having stored thereon a computer program having a plurality of code sections executable by a machine for causing the machine to perform the foregoing.

Abstract: The present invention relates to a method of validating the detection of a correlation peak between a signal transmitted by a plurality of navigation satellites and received by an RNSS satellite radio navigation receiver, said signal corresponding to a sum of signals each sent by a satellite and each modulated by a spread spectrum signal characteristic of said satellite and a local replica generated by said receiver of a spread spectrum signal characteristic of a satellite that is being looked for. Said method includes a step of determining the correlation function 3 as a function of time between said received signal and said local replica and further includes a step of comparing said correlation function 3 with the theoretical autocorrelation function 2 as a function of time of said spread spectrum signal characteristic of said satellite that is being looked for.

Abstract: Circuitry and methods for supporting serial communications over serial interconnects between circuit modules are provided. A data recovery circuit receives incoming serial data from the serial interconnect path with zero delay. The data recovery circuit includes a data sampler that samples the incoming serial data using a multiphase clock. Data samples are provided to a multiplexer that selects an optimum sampled data signal to use as a recovered data signal. The multiplexer has a control input that receives a phase pointer signal. Control circuitry in the data recovery circuit analyzes the sampled data signals and a current value of the phase pointer to compute a clock phase shift error. If the clock phase shift error exceeds a predetermined value, the phase pointer signal can be updated. The data recovery circuit may be implemented using hardwired circuitry or programmable logic.

Abstract: In a jitter correction method and circuit, combination data combined by adding, to referenced data, an end bit of data 1 clock prior to and a head bit of data 1 clock subsequent to the referenced data is sequentially generated. Each bit of the combination data is sequentially referred. When a change between a referenced bit and a bit directly adjoining the referenced bit is detected, and when a number of references reaches a multiplication number of the oversampling and a change between at least three adjoining bits including the referenced bit is not detected, change position display data regarding the directly adjoining bit as a change bit of the referenced data is generated and the number of references is initialized. When the change is not detected and the number of references does not reach the multiplication number, the number of references is incremented.

Abstract: A method and system for adjusting a clock signal in a network element of a data network adjusts the clock signal based on difference values formed by received synchronizing messages. Each difference value is a difference of a reception and transmission values of a received synchronizing message. The reception value depends on a cumulated number of periods of the clock signal at a moment of arrival of the synchronizing message. The transmission value depends on a position of the synchronizing message in a chronological transmission order of synchronizing messages. When adjusting, an adjusting effect of the difference values belonging to a lower part of a margin of fluctuation of the difference values is weighted more heavily than that of an upper part. Thus, for clock signal adjustment, that share of information represented by the received synchronizing messages that has the least interference is used, irrespective of the data network load.

Abstract: A system and a method of transmitting data from a first device to a second device, both devices receiving a clock signal, the first device acting on a first flank of the clock signal and the second device acting on a second flank of the clock signal. A chain of this type of devices may be used, where every second device acts on the first flank and the others on the second flank. In this manner, the data transport may be provided at the clock frequency while allowing backpressure.

Abstract: This invention relates to methods, a computer program product and apparatuses in the context of frame buffering. A buffering time for one or more frames received by a frame buffer is determined based on a specific buffering time associated with a specific frame and on information representative of a specific amount of data stored in the frame buffer.

Abstract: An adaptive clock recovery (ACR) subsystem processes an input phase signal indicative of jittery packet arrival times to generate a relatively smooth and bounded output phase signal that can be used to generate a relatively stable recovered clock signal. The input phase signal is also processed to detect and measure step-delays corresponding, for example, to path changes in the network routing of the packets. Step-delay pre-compensation is performed, in which the input phase signal is phase-adjusted, upstream of the ACR subsystem, based on the sign and magnitude of each detected step-delay. As a result, the ACR subsystem is substantially oblivious to the existence of such step-delays.

Abstract: A latency control mechanism for a communication system provides a known constant end-to-end delay between an audio source and one or more end node destinations, even in the case where different paths are used to reach the end nodes. A very low jitter time on the end-to-end latency is obtained, and the latency is controllable within a given range in dependence on the constraints imposed by the implementation. A block RX DPLL and latency control unit adjusts the reading moment and position from the RX buffer so that a delay between the time stamp taken at the source side by the transmitter time stamp unit, and the time stamp taken at the receiver side by receiver time stamp unit is constant and equal to a given value.

Abstract: A terminal (30, 30B) receives transmissions in a form of a media stream. The terminal comprises a jitter buffer (40) which receives data comprising the media stream and a buffer manager (80). The buffer manager (80) makes a selection between plural playback pointers as an operative playback pointer from which the data comprising the media stream is played out of the jitter buffer. In an example implementation, the buffer manager (80) updates at least one of the plural playback pointers. The manner and timing of the updating of the least one of the plural playback pointers can occur in any of a variety of ways. The terminal (30, 30B) can take various forms, and may be (for example) either a wireless terminal which receives the media stream across a radio interface, or a wireline terminal.

Abstract: The subject matter disclosed herein provides methods and apparatus, including computer program products, for detecting a preamble to enable acquisition of a downlink. In one aspect, there is provided a method. The method may include receiving a plurality of symbols. From an autocorrelation of the received symbols, a guard interval may be detected. The guard interval may represent a receive/transmit transition gap (RTG). A metric may be used to verify whether at least one symbol positioned after the detected guard interval is a preamble. Related systems, apparatus, methods, and/or articles are also described.

Abstract: The present invention relates to an apparatus and method for maintaining voice call quality over a packet network by providing optimal de jitter buffer depth and rate of change of depth. Buffer depth and rate of change of buffer depth may be initially determined by classifying the incoming call. Classification of the incoming calls may be accomplished by categorizing calls into groups based on characteristics of the calls. The buffer depth and rate of change of depth may be further optimized at the start of calls based on voice-path delay and packet loss probability measurements over one or more calls of the same class such that the voice-path delay is minimized while maintaining a certain packet loss probability, the packet loss probability is minimized while maintaining a certain voice-path delay, or an R-factor, which is an objective measure of voice quality, is maximized.

Abstract: A method is provided for compensating for clock drift error and movement error of an access terminal. A forward link error is obtained that is attributable to at least a first error (e.g., clock drift error) component and a second error (e.g., movement error) component. The first error component and the second error component are estimated based on the obtained forward link error. A receive clock of the access terminal is compensated based on a combination of the first error component and the second error component. A transmit clock of the access terminal is compensated based on a difference between the first error component and the second error component. The forward link error may include a timing synchronization error between the access terminal and an access point as well as a frequency synchronization error between a forward link frequency and a baseband reference frequency.

Abstract: Various exemplary embodiments relate to a method and related node for outputting packets from a playout buffer in a node in a packet-switched network including one or more of the following: configuring a Time-Division Multiplexing (TDM) pseudowire terminating at the node; receiving a plurality of fixed-length packets transmitted over the TDM pseudowire; adding the plurality of fixed-length packets to the playout buffer such that the playout buffer reaches a current fill level; inserting at least one dummy packet into the playout buffer, wherein a total length of the at least one dummy packet is equal to a target fill level of the playout buffer minus the current fill level and the target fill level represents a minimum fill level required before output of packets from the playout buffer; and outputting the plurality of fixed-length packets and the at least one dummy packet from the playout buffer.

Abstract: A method and arrangement in a receiving communication device for compensating for the difference between the clock-frequency controlled sample rate of the receiving device and the sample rate of a sending communication device. The sending device transmits packets comprising M audio samples to be stored in a buffer in the receiving device accommodating at least 2·M samples before play-out. An estimation of the clock skew is continuously updated from a calculated accumulated difference between an expected and an actual point of time of reception of the M audio samples. Before play-out, an adjusted number N of audio samples to be read from the buffer before play-out is calculated using the estimated clock skew. Thereafter, the N audio samples are resampled by interpolation to M audio samples to play-out.

Abstract: A system and method are presented for providing packet and time division multiplex (TDM) services in a data communication interface. The method accepts packets at a first rate over a packet interface, and transfers time-sensitive data in the packets as packet data units (PDUs) having a smaller number of bits than a packet and a second rate, faster than the first rate. The method transforms the PDUs into frames in a first TDM protocol. Typically, the PDUs are transformed into units having a smaller number of bits than the PDU and a third rate, faster than the second rate. Then, the TDM frames are transmitted over a line interface.

Abstract: A method and apparatus for synchronizing related data streams in interconnection networks. Some embodiments of an apparatus include a transmitter to transmit a data stream to a second apparatus, where the transmitter transmits a data packet to the second apparatus. The apparatus further includes a clock, with the apparatus providing a first timestamp for the data packet using the clock upon transmission of the data packet. The apparatus includes a receiver to receive responses from the second apparatus, with the apparatus providing a second timestamp upon receiving a returned packet from the second apparatus, with the returned packet containing timestamps for the receipt and transmission of the packet by the second apparatus. The apparatus includes a network unit to direct the operation of the apparatus, the network unit to determine a start time for decoding of the data stream by the second apparatus based at least in part on the timestamps for the packet.

Abstract: Clock correlation can be achieved, for example, utilizing the RTP stream between a sender and receiver by determining a baseline at the start of, for example, a communication. This baseline is derived as a point in time from an arriving packet and represents a point from which subsequent packets deviate. Using this baseline, an early packet or a late packet can be detected. An early packet pushes the baseline down to that earlier point, while late arriving packets, if they are arriving late for a continuous period of time, represents a shift in the opposite direction from the baseline, resulting in a baseline moving to the “earliest” packet out of the sequence of the late arriving packets.

Abstract: A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a call discriminator. The voice exchange is capable of exchanging voice signals between a switched circuit network and a packet based network. The signal processing system also includes a data exchange capable of exchanging data signals modulated by a voiceband carrier on the switched circuit network with unmodulated data signal packets on the packet based network. The data exchange is performed by demodulating data signals from the switched circuit network for transmission on the packet based network, and modulating data signal packets from the packet based network for transmission on the switched circuit network. The call discriminator is used to selectively enable the voice exchange and data exchange.

Abstract: In a method, apparatus and system for transmitting packet loss concealment (PLC) information, a subscriber device divides a voice sample into a plurality of packets, each including a plurality of successive frames having portions of the voice sample. The subscriber device determines if a predetermined look ahead time duration from the final frame of the plurality of successive frames in a current packet of the plurality of packets includes a noise to voice transition. When the predetermined look ahead time duration is determined to include the noise to voice transition, the subscriber device packs packing information regarding the predetermined look ahead time duration into the current packet. Finally, the subscriber device encodes the plurality of successive frames into the current packet for transmission.

Abstract: An apparatus for maintaining synchronization with a plurality of asynchronous communication links includes a first counter that generates a first local network clock, and a second counter that generates a second local network clock. The apparatus also includes an offset controller coupled with the first counter and coupled with the second counter, the offset controller configured to load a current network clock value of a first network clock of a first communication link into the first counter, and to load a current network clock value of a second network clock of a second communication link into the second counter. The apparatus further includes a drift controller coupled with the first counter and with the second counter, the drift controller configured to correct a drift between the first local network clock and the first network clock and to correct a drift between the second local network clock and the second network clock.

Abstract: A system, method, and computer program product are provided for estimating a clock signal. Specifically, during use, a clock signal associated with an audio signal is digitally estimated.

Abstract: Methods for transmitting first packets encapsulated in second packets in a transmission system in which part of the first packets contain a first timing reference for synchronization of a receiver clock and at least part of said second packets contain a second timing reference for reducing transmission jitter of the second packets at the receiver is described. This method provides, at the transmitter, collecting first packets, determining whether a collected first packet contains a first timing reference and triggering transmission of a second packet encapsulating collected first packets including the first packet containing the first timing reference in response to a positive determination.

Abstract: In an information processing apparatus such as digital cellular phone with a camera, a frame extracting portion extracts audio data in frames in accordance with a codec scheme. A packet creating portion creates an RTP packets based on the audio data in frames. A post-packetizing buffer holds the created RTP packets. A packet transmitting portion stores the RTP packets in a baseband packet and transmits the baseband packet to a headset. A streaming transfer managing portion determines whether any RTP packet is held in the post-packetizing buffer or not. A transmission stop controller controls to temporarily stop the transmission of the RTP packets in the packet transmitting portion.

Abstract: Devices, softwares and methods are provided for redundantly encoding a data stream into frames for network transmission as packets. A main encoder encodes a data stream into main frames, while a redundant encoder encodes it into redundant frames. The redundant frames have a redundant-coding delay from the main frames that is adjustable to accommodate many different sets of network conditions.

Abstract: A packet sending apparatus that improves packet transmission quality by preventing loss of packet information, while minimizing a reduction in transmission rate. A clock frequency deviation correction calculation section calculates a valid packet sending period in which valid packets packet information of which is not lost due to clock frequency deviation between the packet sending apparatus and a packet receiving apparatus are included and the number of valid packets included in the valid packet sending period.

Abstract: A method for adding latency and jitter to a number of selected packets transmitted between end systems within a network of end systems is described. The method includes receiving a packet identifier, the packet identifier indicating a selected packet to which latency and jitter is to be added, receiving a selected latency and jitter for the selected packet, receiving a packet, determining if the received packet is the selected packet, and forwarding the received packet to its destination if the received packet is not the selected packet. If the received packet is the selected packet, the method continues by reading a real time clock, computing a transmit time for the received packet based on the selected latency and jitter for the selected packet, and forwarding the received packet to its destination when the real time clock reaches the computed transmit time.

Abstract: An embodiment of the invention provides for dynamically calibrating a jitter buffer based on a percentage used of the jitter buffer. Such a solution provides for efficiently adapting the size of a jitter buffer without the need for complex and processor intensive operations. By adjusting the size of a jitter buffer in a simple and dynamic fashion, undesirable delay can be removed from a service session, and gaps prevented. Similarly, delay can be easily introduced into a service session when necessary. In an embodiment of the invention, a communication system comprises a jitter buffer and a processing system. The jitter buffer is configured to buffer traffic. The processing system is configured to determine the percentage used of the jitter buffer by the buffered traffic, and calibrate the size of the jitter buffer in response to the percentage used of the jitter buffer.

Abstract: The A/D converter changes sampling timing of a received signal in a synchronization acquisition mode and a synchronization tracking mode. The A/D converter generates an internal clock of a sampling frequency eight times a symbol rate under the control of the clock control unit in the synchronization acquisition mode. On the other hand, in the synchronization tracking mode, the A/D converter generates an internal clock with a symbol point and one each point before and after the symbol point as sampling timing under the control of the clock control unit. The A/D converter further corrects the sampling timing of the symbol point based on the squares of the maximum value of a correlation value between the received signal and a reference signal and the absolute values of correlation values before and after the maximum value.

Abstract: A method distributing data in a network is provided. The method comprises measuring the path lengths between a reference clock and a plurality of remote destinations and sending a timing signal from the reference clock to the plurality of remote destinations. The method further comprises measuring the phase between the reference clock and a return signal from each of the plurality of remote destinations and adjusting the phase of the data such that each remote destination receives the data within a skew tolerance.