Abstract: A device is disclosed for transmitting packets in a packet communication network comprising at least two stations, including in particular means for generating a first timestamp from a sampled value of a master counter, means for generating a second timestamp from a sampled value of a second counter synchronized on the at least two stations and means for transmitting jointly the two timestamps in the packet communication network. A device is further disclosed for receiving packets in a packet communication network, which uses the double timestamp generated by the transmitter device.

Abstract: A method of managing a signal over a symbol period includes supplying samples of the signal at beginning and end portions of the symbol period. The method further includes suppressing the supply of samples of the signal at a middle portion of the symbol period.

Abstract: An improved system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty. The proposed system and method perform clock recovery by including an improvement in the form of dynamically varying thresholds. Reconstruction of the clock signal is performed in accordance with the minimum network delay estimation based on an adjustable threshold, i.e., the latency change threshold, which increases when the noise threshold increases and decreases when the noise threshold decreases.

Abstract: Methods and apparatus for a play-out buffer that may adjust offsets between clocks of two ends of a network link with an adaptive play-out buffer and adaptive clock control. The play-out buffer is a circular jitter buffer that permits the absorption of a frequency offset using controlled slips between two nodes of a network. The play-out buffer also accommodates some wander introduced by the time-delay variation across the network. The adaptive clock control reduces the frequency offset between the clocks of the two nodes. In this manner, even though some offsets between two nodes would render communication inefficient, embodiments of the present invention allow the effects of these offsets to be mitigated, thus providing for a better quality coupling.

Abstract: A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions.

Abstract: Systems and methods are described which allow the detection of gaps in a set of data. These systems and methods may include defining streams of data from a network topology, associating incoming data with one or more of these streams, and processing these streams. A gap may be detected by comparing the times of events in the stream. If a gap is detected remedial action may be taken, and processing of the streams temporarily halted. Processing of the streams may continue when data for a certain stream is received, or after the lapse of a certain period of time.

Abstract: An apparatus and method for measuring metrics associated with a wireless network is described. One embodiment includes capturing, at a capturing device, a packet transmitted in a wireless network. A congestion indicator is calculated based on a delay associated with the packet.

Abstract: A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions.

Abstract: A system and a method providing UMS services using VoIP (Voice over Internet Protocol), upon transmitting voice data to a VoIP gateway, a VoIP-UMS having a VoIP interface transmits the voice data in a burst mode using the UMS's characteristic of sending the voice data that has been already recorded, and the VoIP gateway receives voice data that will listen to a user, stores the voice data in a buffer in advance, and reproduces the voice data at constant intervals so that the user listens to the voice, thereby eliminating noises due to delay and jitter.

Abstract: A method and apparatus for processing a radio frequency signal. The method includes compensating a digital in-phase signal and a digital quadrature signal for any imbalance; converting the compensated digital in-phase signal and the compensated digital quadrature signal into a frequency domain digital OFDM symbol; generating a plurality of channel estimates, wherein each channel estimate corresponds to an estimate of the channel for a corresponding sub-carrier of the frequency domain digital OFDM symbol; and generating (i) a most likely estimate of the imbalance between the digital in-phase signal and the digital quadrature signal and (ii) a most likely estimate of a common phase error in the plurality of channel estimates. The most likely estimate of the imbalance is used to compensate the digital in-phase signal and the digital quadrature signal, and the most likely estimate of the common phase error is used to compensate the plurality of channel estimates.

Abstract: Disclosed is a method and apparatus for dynamically adjusting the playout delay for audio signals, which mainly includes three parts of dynamic adjustment, i.e., playout delay, silence length, and jitter buffer size. In the invention, the time for playout delay is real-time adjusted according to the probability distribution of the number of packets buffered in a jitter buffer. A voice active detection mechanism is taken to detect silence within a voice packet. By dynamically adjusting the silence length in the voice packets, the present invention reduces the network variation impact on the voice quality. It also overcomes the drawback of conventional techniques for estimating playout delay, and reduces the whole computation complexity of the playout delay for the voice packets.

Abstract: A differential clock pulse compensation is performed between the clock-pulse system (23) of a digital line-connected data interface and the asynchronous clock-pulse system (22) of a digital wireless data interface. A characteristic variable (20, 21) for the asynchronous differential clock pulse between the clock-pulse systems (22, 23) is monitored hereby. The data rate of the data (15, 16) transmitted over the line-connected data interface is adapted depending on the characteristic variable (20, 21).

Abstract: The invention relates to determining a quantity to be measured from a communication system, such as a transmission delay or the phase difference of clock times. Measurement messages are transmitted (501, 502) between the two areas of the communication system in both transmission directions. Values of the time difference are calculated (503) for the measurement messages transmitted in at least one of the transmission directions, each of which values is the difference between the instant of reception measured at the reception and the instant of transmission measured at the transmission of the measurement message. The values of the time difference are used to calculate (504) an estimate of the distribution of the time difference, on the basis of which an estimate of the minimum value of the time difference is calculated (504).

Abstract: An integrated circuit having a corresponding method comprises one or more ports to transmit and receive packets of first data; and a forwarding engine to transfer the packets of the first data between the ports; wherein at least one of the ports comprises a packet generator to originate a first packet of the first data comprising second data representing a time of transmission of the first packet of the first data, a network transmit interface to transmit the first packet of the first data, and a network receive interface to receive a second packet of the first data transmitted in reply to the first packet of the first data; and a controller to calculate a network delay based on the second data representing the time of transmission of the first packet of the first data and the second packet of the first data.

Abstract: A method of rank order filtering and a rank order filter apparatus is defined by an established rank order and accepts into a buffer, data points to be filtered, each data point having a data value and an associated time stamp. Data points are accepted until the buffer contains data points representing a minimum predefined time span. The filter calculating an amount of time the data values in the buffer are above an approximate filter value and adjusts the approximate filter value based upon the relationship of the amount of time to the rank order. The steps iterate to approach a value defined by the rank order and the approximate filtered value is output.

Abstract: A guard section length detection method is disclosed. In the method, a guard section length detection method is used in an OFDM system. The OFDM symbol includes a data interval having a first length, and a guard section having a guard section length. The method detects a first symbol boundary and a second symbol boundary, and determines the guard section length based on a length between the first symbol boundary and the second symbol boundary.

Abstract: A programmable logic device integrated circuit (“PLD”) includes high-speed serial interface (“HSSI”) circuitry in addition to programmable logic circuitry. The HSSI circuitry includes multiple channels of nominal data-handling circuitry (typically including clock and data recovery (“CDR”) circuitry), and at least one channel of nominal clock management unit (“CMU”) circuitry (typically including phase-locked loop (“PLL”) circuitry or the like). To increase the flexibility with which the channels can be used, the nominal data-handling channels are equipped to alternatively perform CMU-type functions, and the nominal CMU channel is equipped to alternatively perform data-handling functions.

Abstract: A system and method for discarding or inserting audio frames in a jitter buffer is described. The system and method provides improved audio quality as compared to conventional jitter buffer management systems. In one embodiment, buffer control logic determines whether to discard audio frames to be stored in a jitter buffer or to insert audio frames among audio frames to be output from a jitter buffer based not only on the number of audio frames currently stored in the jitter buffer but also based on the power of the current audio frame to be stored in or output from the jitter buffer. The system and method is generally applicable to any wireless or wired communication system in which audio signals are transmitted between entities operating in different clock domains.

Abstract: When packets reach from the 0 system and the 1 system, the packet selecting means 21 determines, based on the sequence numbers held in the packet output record register 22, whether or not the corresponding packet has passed, interrupts passing of the corresponding packet to the output side if passed, and allows the corresponding packet to pass to the output side if not passed. When the packet selecting means 21 selects a packet and allows the packet to pass to the output side, the packet output record register 22 holds the sequence number of the corresponding packet as a packet output record. Phase adjusting means that absorbs an average difference in delay for transmission between the systems may be provided at a stage before the packet selecting means 21.

Abstract: In a method of recovering timing information over packet networks, a receiver receives a plurality of packet streams over different paths from the same source. The raw delays experienced by the timing packets for each stream are filtered to provide a filtered delay for each stream. The filtered delays are weighted based on the quality of each stream, and the weighted filtered delays are then combined to form an aggregate delay estimate. Frequency adjustments for a local clock at the receiver are derived from the aggregate delay estimate.

Abstract: A method of dynamically adjusting the buffer delay of an adaptive jitter buffer of a network node receiving packets of a media stream from a packet switched network. The method comprises inserting packets arriving to the network node into the jitter buffer and executing a jitter buffering procedure once every Trepin, wherein Trepin is equal to the jitter buffer play-out interval. Executing the jitter buffer procedure involves updating a jitter protection time, Tjit, wherein jit, defines a current target value for the maximum buffering delay, on the basis of the variation of the number of pending packets, N in the jitter buffer.

Abstract: An improved method and system for the determination of jitter buffers enables the generation of buffers having sizes and delays such that, as designed, the buffers capture a substantial majority of packets while not being resource intensive. The present methods and systems provide for improved jitter buffer management by deriving playout buffer adjustments from a plurality of variances, centered around a distribution peak, or mean average delay. The playout buffer monitor uses the buffer adjustments, in size and delay, to select, store and playout packets at their adjusted playout time. The present invention may be employed in a media gateway that enables data communications among heterogenous networks and may be specifically deployed to manage jitter experienced in the course of receiving packetized data and processing the data for further transmission through a packet-based or circuit-switched network.

Abstract: Adaptive De-Jitter Buffer for Voice over IP (VoIP) for packet switch communications. The de-jitter buffer methods and apparatus presented avoid playback of underflows while balancing end-to-end delay. In one example, the de-jitter buffer is recalculated at the beginning of each talkspurt. In another example, talkspurt packets are compressed upon receipt of all remaining packets.

Abstract: An arrangement that allows transmission of client signals with higher clock fidelity is achieved by developing a phase offset measure at an ingress node, communicating it to the egress node, and recovering the client's clock from the received data and from the received phase-offset information. The ability to recover the client's clock with high fidelity is enhanced by adaptive pointer processing in intermediate nodes and the egress node of the network that the client's signal traverses. The adaptive pointer processing filters incoming pointers from upstream nodes and injects new positive and negative pointer justifications in excess of what is minimally necessary to allow them to be filtered by successive nodes and insure proper transmission over a network that employs a protocol involving framing layer frames embedded in communication layer frames. Illustratively, the network protocol is an extended ITU Recommendation G.709 Digital Wrapper protocol, arranged to employ frames of 15240 columns by four rows.

Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

Abstract: Presented herein are system(s) and method(s) for handling audio jitters. In one embodiment; there is presented a method for decoding an audio signal. The method comprises receiving a portion of the audio signal, the portions of the audio signal associated with a time stamp; comparing the time stamp associated with the portion of the audio signals to a reference time; generating another portion of the audio signal, if the time stamp is later than the time reference by over a certain margin or error; and dewindowing the another portion with a previously played portion of the audio signal, thereby resulting in a an another dewindowed portion.

Abstract: A method and mechanism for monitoring performance in a network computing system. A user application on a source system is configured to communication with a destination system. The application is configured to load a dynamic linked library upon execution. The dynamic linked library is configured to store packet identifiers and time stamp information for communication packets received from the application prior to the packets being conveyed to the destination system. Upon receipt of an acknowledgement packet from the destination system, the library code is configured to retrieve the previously stored time stamp information, determine transit latency information corresponding to the communication packet, and log the determined transit latency information. Acknowledgement packets may further include time stamp information which may be utilized to determine additional latency information corresponding to the communication packet and/or acknowledgement packet.

Abstract: Adaptive De-Jitter Buffer for Voice over IP (VoIP) for packet switch communications. The de-jitter buffer methods and apparatus presented avoid playback of underflows while balancing end-to-end delay. In one example, the de-jitter buffer is recalculated at the beginning of each talkspurt. In another example, talkspurt packets are compressed upon receipt of all remaining packets.

Abstract: The present invention discloses a method and Ethernet device for clock synchronization, a method for clock synchronization in an entire Ethernet, and the relevant Ethernet. The method for clock synchronization in an Ethernet device includes: the PHY layer unit of the Ethernet device extracts a clock from the data sent by the receive unit; the MAC layer unit makes adjustments to the extracted clock according to the local clock and takes the adjusted clock as the transmit clock of the Ethernet device. The method for clock synchronization in an entire Ethernet includes: clocks of all Ethernet devices are synchronized to the clock generated by the Ethernet device at the highest level. The invention provides a method for clock synchronization so that sending and receiving of clocks in Ethernet devices can be synchronized and clock synchronization can be realized in the entire Ethernet.

Abstract: The present invention is directed to the use of two or more buffers, at a common receiving node, to reduce the effects of jitter, packet loss, and/or packet latency and/or synchronize different types of packets.

Abstract: Disclosed are a method and system to estimate the maximum error in the clock offset and skew estimation between two clocks in a computer system. The method comprises the steps of obtaining a first set of data values representing a forward delay between the first and second clocks, and obtaining a second set of data values representing a negative backward delay between the first and second clocks. The method comprises the further step of forming a lower convex hull for said first set of data values, and forming an upper convex hull for said second set of data values. First and second parallel lines are formed between the upper and lower convex hulls, and these parallel lines are used to estimate the worst case error for the offset, skew rate and dispersion of said first and second clocks.

Abstract: A system and method is provided for estimating the T1 timing error and clock recovery errors by processing timing information from the associated pseudowire packet stream(s) from which the T1 is derived. The timing errors are presented as MTIE measurements which are used to present alarms for a Network Operation Control centre and are used to accurately alarm error conditions where the regenerated or derived T1 signal does not meet MTIE or clock accuracy errors. This alarm is intended to detect conditions of excessive packet jitter, wander or phase transients which may exist in the data network over which the pseudowire stream is transported. In another aspect, the errors are used to control the regeneration of the T1 clock information.

Abstract: An apparatus and method for synchronization between uncoordinated Time Division Duplex (TDD) communication networks includes a first step (300) of measuring an interference level on channels available to a base station. A next step (302) includes choosing the channel having the lowest interference level. A next step (304) includes determining that the interference is from a base station. A next step (306) includes calculating an interference profile over the frame cycle. A next step (308) includes establishing a peak interference level. A next step (310) includes aligning the base station frame timing in response to the peak interference level.

Abstract: A packet flow side channel encoder and decoder embeds and extracts a side channel communication in an overt communication data stream transmitted over a network. The encoder selects more than one group of related packets being transmitted on the network, relates a packet of one group to a packet of another group to form a pair of packets; and delays the timing of at least one packet from each pair of packets The decoder determines inter-packet delays that are the difference in timing between two packets in a pair of packets; determines at least one inter-packet delay difference between two or more determined inter-packet delays; and extracts a bit using the at least one interpacket delay difference.

Abstract: A network entity, which comprises an input configured to receive from an upstream network entity a stream of first media data elements; an output configured to release towards a downstream network entity a stream of second media data elements; a processing engine configured to effect processing tasks on the first media data elements, thereby to generate the second media data elements, the processing tasks being effected in a set of processing intervals; and a control entity. The control entity is configured for receiving a request for a first phase adjustment from the downstream network entity; modifying the set of processing intervals in which are effected the processing tasks in an attempt to accommodate the first phase adjustment; determining a second phase adjustment based on arrival characteristics of the first media data elements and the modified set of processing intervals; and releasing towards the upstream network entity a request for the second phase adjustment.

Abstract: Output clock adjustment for a digital I/O between physical layer devices and media access controller. A method is disclosed for transferring data received on the input of a physical layer device from a transmission medium to an output associated with the physical layer device and to a media independent layer, the transferred data associated with transferred timing information from the physical layer device to the media independent layer. A receive clock is generated and then the data transitions in the received data are synchronized to at least one edge of the receive clock to provide synchronized receive data. The synchronized received data is then transmitted to the media independent layer. The generated receive clock is delayed by a predetermined clock delay to provide a delayed receive clock, and wherein the data transitions in the synchronized receive data is positioned relative to the rising edge of the delayed receive clock at a predetermined position therein following the rising edge thereof.

Abstract: A multi-carrier (MC) receiver receives a multi-carrier signal containing data symbols as well as pilot symbols. The MC receiver estimates a carrier frequency offset in a downconverted base-band multi-carrier signal in the frequency domain based on deviations of one or more characteristics of the pilot signals from predetermined values, and corrects for the offset in the time domain. In an embodiment, a second order phase locked loop (PLL) estimates the phase of the pilot signals to determine the carrier frequency offset. Changes in pilot phases caused due to the time domain correction are cancelled to allow the PLL to minimize deviations from the lock position.

Abstract: Adaptive De-Jitter Buffer for Voice over IP (VoIP) for packet switch communications. The de-jitter buffer methods and apparatus presented avoid playback of underflows while balancing end-to-end delay. In one example, the de-jitter buffer is recalculated at the beginning of each talkspurt. In another example, talkspurt packets are compressed upon receipt of all remaining packets.

Abstract: A wireless communications system incorporates a plurality of synchronized wireless units. Each unit minimizes energy requirements by entering a low current, inactive, state between synchronizing signals. The unit automatically enters an active state prior to receipt of the next synchronizing signal.

Abstract: An apparatus and method for adjusting transmission phasing in a point-to-point communication link is disclosed. The relative phases of the transmissions from each antenna are adjusted before transmission to give optimum gain when received by two or more antenna elements and a signal combining element. The signal includes a data component, consisting of a subset of the subcarriers modulated with the input data, which is common to transmissions from all antenna elements; and a phase reference component consisting of a subset of the subcarriers that are modulated with a predetermined phase. The signal combining element is operable to receive the components and extract phase information.

Abstract: A jitter buffer control apparatus has a buffer for storing data included in an input packet transmitted from a telecommunications network, and a jitter buffer controller for controlling the buffer to store the input data into the buffer and take out the stored data from the buffer on the basis of a sequence number included in the input packet in a processing period. When under-running occurs in the buffer, the jitter buffer controller stores input data into the buffer with a storage location skipped which corresponds to the processing period associated with packet loss due to the under-running.

Abstract: Virtual concatenation circuitry is disclosed for implementation in a network element of a data communication network. The virtual concatenation circuitry in a preferred embodiment is operative: (i) to maintain, for each of the individual member streams of a virtual concatenation stream, a corresponding counter which tracks pointer adjustments for that member stream; and (ii) to generate pointers based on values of the counters so as to substantially equalize incoming and outgoing pointer adjustments for the member streams at the network element.

Abstract: Methods and apparatuses for establishing time at a first basestation, and synchronizing the first basestation with other basestations in a cellular network. The method may be performed using a mobile (cellular communication) station that includes a satellite position system receiver. One method comprises determining a location of the mobile station, determining a time indicator that represents a time-of-day at the mobile station, wherein the time indicator is determined relative to a signal available at the first basestation, transmitting at least one of the position information and location, and transmitting the time indicator from the mobile station. The time indicator and at least one of the position information and the location are used to establish a time at the first basestation such that the first basestation is synchronized to other basestations in the cellular communication system. Other methods and apparatuses are also described for synchronizing basestations in a cellular network.

Abstract: Disclosed is an adaptive method for training a source synchronous parallel receiver. The adaptive method for training, or aligning, parallel data channels permits a parallel communication receiver to adaptively adjust the timing of data channels to align the data channels with a frame channel and achieve a source synchronous signal for the parallel data channels. Further, portions of the frame channel training pattern may be used because possible time shift accuracy error is accounted for between the communication channels and a determination is made as to which portion of the frame pattern is currently being received. The data channels are then aligned appropriately.

Abstract: A method and apparatus for transmitting a packet in a wireless communications network is presented. A packet is constructed to include synchronization header, a physical layer header, and a payload. A preamble and a start of frame delimiter is inserted in the synchronization header. Multiple pairs of cores and of suffixes are inserted in the start of frame delimiter, and then the packet is transmitted.

Abstract: Embodiments of the present invention provide a method, system and device for clock transmission between a sender and a receiver. The sender generates clock information of a clock to be sent relative to a system clock and sends a data packet containing the clock information to the receiver over a Packet-Switched Network (PSN). The receiver obtains the clock information in the data packet received and obtains the clock sent by the sender according to the clock information and the system clock. According to the embodiments of the present invention, after the clock of the sender is transmitted over the PSN, the receiver may obtain the clock of the sender without being affected by such damage as a network delay jitter and a packet loss.

Abstract: Method and systems for aligning a clock at a second device based on a reference clock at a first device and reducing clock rate jitter between asynchronous devices in a network are disclosed. A transmission latency may be determined between the first device and the second device. A data packed may be received containing information pertaining to the reference clock at the second device. The phase of the clock may then be adjusted at the second device based on the information contained in the packet and the transmission latency.

Abstract: In a packet receiving method and device which convert a voice packet received into a voice, a receiving packet buffer temporarily stores a voice packet received; a plurality of parameter information monitors respectively determine different buffer adjustment values for determining a buffering amount of the receiving packet buffer based on one or more pieces of parameter information obtained from the voice packet temporarily stored; a buffer adjustment value determiner determines a receiving buffer adjustment value from the plural buffer adjustment values; and a buffer controller controls the buffering amount based on the receiving buffer adjustment value.

Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment, the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.

Abstract: There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement having a first pulse generator for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge, a second pulse generator for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance corresponding to timing of the detected boundaries of the data sections, a filter for removing carrier frequency components of said data-signal-under-measurement from first and second pulse signals and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.