Abstract: A method for evaluating the processing delay of a speech signal contained in data packets received in a receiver terminal having a telephony module during a voice call to a terminal sending the data packets over a packet-switched network. The method includes the step of obtaining from the received data packets a stream of audio packets containing the speech signal. Within a predetermined decoding time, the stream of obtained audio packets is decoded and a first reconstituted speech signal is created. At least a portion of the speech reconstituted by the telephony module is duplicated to create a second reconstituted speech signal. The time difference between the first and the second reconstituted speech signals is determined. The processing delay of the speech signal in the receiver terminal is calculated from at least the determined time difference between the reconstituted first and second speech signals and the predetermined decoding time.

Abstract: A multiple stream cyclic-shifted delay transmitter including a baseband processing module and a plurality of RF transmit sections. The baseband processing module is operably coupled to convert outbound data into a plurality of transmit baseband signal streams and cyclic-shift delay at least one of the plurality of transmit baseband signal streams to produce at least one cyclic shift delayed transmit baseband signal stream. The plurality of RF) transmit sections is operably coupled to convert the plurality of transmit baseband signal streams and the at least one cyclic-shift delayed transmit baseband signal stream into a plurality of RF signals.

Abstract: In a receiver, a skew detector detects a skew between two synchronization symbols having different wavelengths among synchronization symbols included in received signals. A skew rough adjustment calculator calculates a delay compensation amount for each received signal based on the skew and a signal delay characteristic in a transmission path. A variable delay processor deskews the received signals based on the delay compensation amount.

Abstract: A synchronization system (D) for equipment of a synchronous transport network comprises, firstly, a first synchronization module (MA) comprising i) a first submodule (SM1A) delivering a first intermediate clock signal derived from a first external reference clock signal or an internal reference clock signal, ii) a second submodule (SM2A) delivering a first main reference clock signal derived from the first intermediate clock signal or a second intermediate clock signal, and iii) a third submodule (SM3A) delivering a first output reference clock signal derived from the first main reference clock signal or a second main reference clock signal, and, secondly, a second synchronization module (MB) comprising i) a first submodule (SM1B) delivering the second intermediate clock signal derived from another first external reference clock signal and another internal reference clock signal, ii) a second submodule (SM2B) delivering the second main reference clock signal derived from the first or the second intermediate c

Abstract: In one aspect of the present invention, a network gateway is configured to facilitate on line and off line bi-directional communication between a number of near end data and telephony devices with far end data termination devices via a hybrid fiber coaxial network and a cable modem termination system. The described network gateway combines a QAM receiver, a transmitter, a DOCSIS MAC, a CPU, a voice and audio processor, an Ethernet MAC, and a USB controller to provide high performance and robust operation.

Abstract: Systems and methods for a network device to update timing packets to reflect delay are provided. A timing packet processor is externally connected to the network device. All timing packets are processed by the timing packet processor. The timing packets are updated to reflect an estimate of delay introduced by the network device.

Abstract: There are disclosed a method and apparatus for reordering sequenced data packets. An expiration time is calculated for each received data packet. The expiration time and a packet sequence number are stored in a table. The table is read to determine the next data packet to be transmitted in sequence number order. The next data packet is output if available. If the next data packet is not available, a true expiration time is determined for the unavailable next data packet. If the unavailable next data packet fails to arrive before a current time is greater than the expiration time of the unavailable data packet, the unavailable next data packet is considered lost.

Abstract: An alignment circuit comprises a plurality of inputs that receive corresponding data signals, wherein each of the corresponding data signals includes a training pattern. A plurality of delay lines correspond to each of the plurality of inputs, receive the corresponding data signals, receive a plurality of corresponding delay signals, and delay each of the data signals according to the corresponding delay signals. A controller receives the corresponding data signals and generates the plurality of corresponding delay signals based on the training patterns of respective ones of the data signals.

Abstract: The present invention is a system and method that improves upon voice activity detection by packetizing actual noise signals, typically background noise. In accordance with the present invention an access network receives an input voice signal (including noise) and converts the input voice signal into a packetized voice signal. The packetized voice signal is transmitted via a network to an egress network. The egress network receives the packetized voice signal, converts the packetized voice signal into an output voice signal, and outputs the output voice signal. The egress network also extracts and stores noise packets from the received packetized voice signal and converts the packetized noise signal into an output noise signal. When the access network ceases to receive the input voice signal while the call is still ongoing, the access network instructs the egress network to continually output the output noise signal.

Abstract: System for reordering sequenced based packets in a switching network. The system includes time stamp logic that operates to associate a receive time indicator with each received data packet. The system also includes Enqueue logic that operates to compute an expiration time for each received packet based on the receive time indicator, and stores the expiration time and the sequence identifier for each received packet into a table. Dequeue logic operates to read the table to determine the received data packets to output in an output stream so that the received data packets are output in a selected order. The Dequeue logic also operates to determine a true expiration time for one or more unreceived data packets, and if the true expiration time for a selected unreceived data packet is reached, the Dequeue logic operates to omit the selected unreceived data packet from the output stream.

Abstract: Provided are an apparatus for estimating frequency offset from received signal and method for the same. The apparatus and method estimates frequency offset precisely without increment of autocorrelator by performing moving average filtering on a noised signal to thereby alleviate jitter. The frequency offset estimating apparatus includes: moving average filter for alleviating jitter of received signal; multiplier for multiplying a filtered signal by conjugate complex operanded pilot signal; phase-rotation value calculator for calculating a phase-rotation value from multiplicand operanded signal by using of symbol delay and an autocorrelation function; frequency offset estimator for estimating frequency offset from the phase-rotation value based on a smoothing function multiplication.

Abstract: There is disclosed methods, a computing device, a storage medium, and an apparatus for testing a network. Received packets may have two or more packet group identification fields. The packet group identification fields may be combined to generate a packet group number. The packet group number may be generated by first masking unused bits of the packet group identification fields and then concatenating the unmasked bits. Test statistics may be measured, accumulated, and stored for one or more packet groups comprising packets having the same packet group number.

Abstract: An object of the present invention is to provide methods for properly correcting a frequency of a standard clock, receiving apparatuses, reproducing apparatuses, and programs in broadcasting data receiving systems comprising a receiving apparatus and a reproducing apparatus, in which the broadcasting data received at the receiving apparatus is transmitted to a reproducing apparatus via bus. In the broadcasting data receiving systems stated above, when the receiving apparatus detects the broadcasting-side time information that reflects the encoding standard clock, the extraction of the broadcasting-side time information is transmitted in a form of status change signal to the reproducing apparatus via the dedicated line, and the content of the broadcasting-side time information is transmitted to the reproducing apparatus via bus.

Abstract: Embodiments of methods and apparatus for providing a delayed attack protection system for network traffic are generally described herein. Other embodiments may be described and claimed.

Abstract: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

Abstract: One disclosed embodiment may comprise an interpolation system that includes an interpolator that interpolates between a selected phase from a preceding cycle and a selected phase from a current cycle to provide an interpolated phase for the current cycle. An edge of the interpolated phase for the current cycle has reduced jitter relative to an edge of a corresponding phase of the current cycle. A delay system delays a plurality of other phases of the current cycle to provide delayed other phases, the delayed other phases and the interpolated phase for the current cycle collectively defining a set of adjusted phases for the current cycle.

Abstract: A GI insertion section 105 inserts a guard interval into transmission data. Delay addition sections 107-1, 107-2 set a delay time in the transmission data. An arrival time calculation section 115 calculates for each directivity an arrival time after data is transmitted from the other party of communication until the data is received from received data of each directivity. A delay time determining section 116 calculates a difference in the arrival time between transmission data transmitted with two directivities and sets the calculated arrival time difference in the transmission data to be transmitted with the directivity corresponding to the smaller arrival time as a delay time. A GI length determining section 117 sets a minimum arrival time of the calculated arrival times as a guard interval. This allows a transmission rate to be improved by shortening the length of a guard interval in a radio communication system to which a system of transmitting an OFDM signal with a directivity is applied.

Abstract: A serial transceiver transmits at least one package of a data link layer and includes at least one channel including at least one transmitting module and at least one receiving module, a generating module and a controlling module. The channel is for transmitting the corresponding package. The transmitting module transmits the corresponding package and generates a transmitting time signal. The receiving module receives the package transmitted from the corresponding transmitting module and generates a receiving time signal. The generating module generates a target delay time signal. The controlling module receives the target delay time signal, transmitting time signals and receiving time signals, and generates a delay time signal for the corresponding receiving module according to the target delay time signal, the transmitting time signal and the receiving time signal.

Abstract: A system for monitoring EF-on-EF jitter in a network node having an EP output queue into which EF packets are entered comprises a first counter that counts the packets entering the queue and also a second counter that counts the packets entering the queue when the queue depth is greater than an operator-determined maximum depth, whereby the operator can compare the two counts to determine the proportion of packets that might be subject to jitter corresponding to the maximum depth. Preferably, the system also includes a third counter that counts the number of packets entering the queue when the queue depth exceeds an alarm depth greater than the maximum depth.

Abstract: A time control mechanism accepts samples of time (true or otherwise) over a network, and enables dynamic compensation for random delays of the network in order to maintain the output of a slave clock that the time control mechanism controls within required bounds relative to the time of a master clock, even when the samples are randomly delayed. In one embodiment, a hardware timestamping method and apparatus is provided. The hardware timestamping method and apparatus is used to achieve the fine resolution required for timestamping both received samples and transmitted requests. In another embodiment, a delay-variation-smoothing method and apparatus is provided. The delay-variation-smoothing method and apparatus allows the time control mechanism to calculate the network delay in order to maintain the slave clock within the required time bounds.

Abstract: A delay variation buffer controller allowing proper cell delay variation control reflecting an actual network operation status is disclosed. A detector detects an empty status of the data buffer when data is read out from the data buffer at intervals of a controllable time period. A counter counts the number of contiguous times the empty status was detected. A proper time period is calculated depending on a value of the counter at a time when the empty status is not detected and the value of the counter is not zero. A timing corrector corrects the controllable time period to match the proper time delay and setting the controllable time delay to a predetermined value when the empty status is not detected and the value of the counter is zero.

Abstract: Packets for a discontinuous transmission of a speech signal via a packet switched network may be provided in shorter transmission intervals during an active state and in longer transmission intervals during an inactive state. The active state may be selected whenever a speech signal comprises a speech burst, optionally with a hangover period after a respective speech burst. For enhancing the control of an adaptive jitter buffer at a receiver at the beginning of a respective transmission session, an active state is enforced in addition for a predetermined period at a beginning of a transmission session, irrespective of a presence of speech bursts. In case hangover periods are used, the length of the predetermined period exceeds the length of these hangover periods.

Abstract: An information processing apparatus and method, a recording medium, and a program for removing jitter and reducing the delay of the information processing system. A substantial error is produced between accumulated value of intervals of reception time of the packets and accumulated value of time stamps of these packets. For each number of transport stream packets on which this substantial error provides one clock, a time equivalent to one clock is added to the subsequent time stamps of the transport stream packets or this time is subtracted therefrom to adjust time stamp, thereby correcting the deviation in time from reception time of the transport stream packets.

Abstract: Data packet transmission involves transmitting a first data packet from a first station over a network to create a first transmission with the intention of the first transmission being received at a second station. Said first data packet is retransmitted from the first station to the second station to create a second transmission, wherein said second transmission of said first data packet includes latency information indicating the time between said first transmission and said second transmission. The second station processes said latency information to determine a resend latency measurement.

Abstract: Disclosed is a frequency multiply circuit for outputting an output signal obtained by variably multiplying the frequency of an input signal includes a synchronous delay circuit, a multiplexing circuit, and a control circuit. The synchronous delay circuit includes a period measuring delay circuit for measuring the period of the input signal and delay reproducing delay circuits each with a delay time thereof variably set based on the period measured by the period measuring delay circuit, for respectively reproducing the delay time. The multiplexing circuit receives a plurality of signals of different phases output from the synchronous delay circuits, for multiplexing. The control circuit variably sets the number of the delay stages of the period measuring delay circuit and the numbers of the stages of the delay reproducing delay circuits, according to the set frequency-multiplication factor.

Abstract: An apparatus for detecting a guard interval length (type) of a transmission symbol among the structure of an orthogonal frequency division multiplexing (OFDM) system receiver, to ensure proper operation of a symbol start detector and a fast Fourier transform (FFT) window position controller, is provided.

Abstract: A system and method of reducing skew between a plurality of signals transmitted with a transmit clock is described. Skew is detected between the received transmit clock and each of received data signals. Delay is added to the clock or to one or more of the plurality of data signals to compensate for the detected skew. The delay added to each of the plurality of delayed signals is updated to adapt to changes in detected skew.

Abstract: Methods and systems for dynamically adjusting the length of delay before playback as a function of the amount of transmission jitter is disclosed, whereby a target error rate is received, error rates at different delays are tracked and current delay is adjusted as a function of tracked error rates.

Abstract: A method and apparatus for a frequency shift keying (FSK) demodulator use a configuration to improve the autocorrelation for better receiver performance. The demodulator uses parallel first and second lines connected to the same input signal, the first line having a delay element to provide an integer-delay of M, the second parallel line having a filter for causing a group delay of ?+M where ? is fractional, and a multiplier for receiving the signals from said first and second lines and generating a resultant signal from which a base band signal can be recovered. The resultant signal is passed through a low pass base band filter to recover the base band signal. ? may have a value of 3.25 and M may be 6. The demodulator may selectively be implemented in caller ID service and in low end modems chosen from a group comprising V.21, Bell 103, V.23 and Bell 202A modems.

Abstract: Various methods, apparatuses and systems are described in which a skew delay time between communication lanes is determined. A data transfer path is established which includes two or more communication lanes in a communication link. A skew delay time is determined between the communication lanes of the communication link with respect each other with using a clock period of a input output circuit as a reference time.

Abstract: A demultiplexer circuit includes a first serial-to-parallel conversion circuit for receiving input serial data and for performing serial-to-parallel conversion to output resultant data to parallel paths, a code detection circuit for activating and outputting a detection signal on detection of coincidence between output data sent out from the first serial-to-parallel conversion circuit to the parallel paths and a predetermined check code, a circuit for generating recovery clocks of a period corresponding to the length of a predetermined number of bits of the input serial data, and for varying the period of the recovery clocks, in case the detection signal from the code detection circuit is activated, in dependence upon bit deviation of the detection signal, to output resulting recovery clocks; and a second serial-to-parallel conversion circuit for converting data serially transmitted on the parallel paths into parallel data to output resulting parallel data responsive to the recovery clocks.

Abstract: A method and apparatus to perform clock compensation for a jitter buffer are described.

Abstract: A network management system for determining the synchronization between two streams of packets transmitted in a transport network measures throughput variations for each of the streams of packets and determines the synchronization by comparing the variations.

Abstract: Embodiments include systems and methods for fine control of beam steering for wide band wireless applications using a phased array of antenna elements. In one embodiment, a digitally controlled delay line delays the signal output from a modulator in each branch of multiple branches feeding multiple antennas in an array. An output of the digital delay line is input to a digital to analog converter. A second digital delay line also delays the signal within the digital to analog converter. The manner of implementation of the delays enables accurate production of a steered beam at a high data rate.

Abstract: The present invention is directed to a duty cycle correction apparatus that can be implemented in a small size, and is capable of performing a phase lock more rapidly, and reducing the amount of current being consumed, and to a method thereof. The duty cycle correction apparatus in accordance with the present invention for use in a semiconductor memory device includes a delay line unit for delaying a first clock signal to produce a first delayed clock signal; an output tap unit for delaying the first delayed clock signal by a pulse width of a first logic state of the first clock signal under the control of a toss control signal derived from a second clock signal; and a phase mixer for mixing the clock signal from the output tap unit and one of the first and second clock signals.

Abstract: A method for adjusting audio playback is disclosed. The method includes storing audio packets in a jitter buffer, and playing out the audio packets at a first rate. The method further includes determining that a capacity parameter for the jitter buffer is out of compliance with a predetermined standard, and based on the capacity parameter, determining a second rate for playing out the audio packets. The method also includes applying a pitch-invariant time scale modification algorithm to change the rate of playing out the audio packets from the first rate to the second rate.

Abstract: Disclosed is a device, a computer program and a method to receive and buffer data packets that contain information that is representative of time-ordered content, such as a voice signal, that is intended to be presented to a person in a substantially continuous and substantially uniform temporal sequence; to decode the information to obtain samples and to buffer the samples prior to generating a playout signal. The samples are time scaled as a function of packet network conditions to enable changing the play-out rate to provide a substantially continuous output signal when the data packets are received at a rate that differs from a rate at which the data packets are created. The time scaling operation operates with a base delay that is controlled in a positive sense when the data packets are received at a rate that is slower than a rate at which the data packets are created, and a reserve delay that is managed to provide insurance against an interruption should the base delay become negative.

Abstract: A data-transmission-side communication apparatus includes a mapping unit that executes a mapping for a data sub-carrier based on a multipath delay time in a transmission path and a guard-band adding unit that changes an amount of a guard band to be added to a signal on the data sub-carrier depending on information on the guard band obtained based on the multipath delay time. A data-reception-side communication apparatus includes an equalizing unit that suppresses a multipath exceeding a guard interval based on the information on the guard band and a demapping unit that executes a demapping for an equalized signal based on the multipath delay time.

Abstract: A system and method of synchronizing transmissions in a simulcast system by continuously adjusting the signal transmission delay. Timing information that includes a GPS timestamp is continuously generated at a source site, encoded into a timing packet which along with a content signal can be transported over a network link such as T1/E1 or a packet switched network to multiple transmitter sites. Once received at a transmitter site, the timing packet along with the content signal is delayed by an adjustable delay. The GPS timestamp in the received timing packet is compared to a GPS timestamp that is generated at the transmitter site upon arrival of the timing packet. Based on a variance between that comparison and the value of a user-specified target delay, the delay of the received signal is adjusted to synchronize signal transmissions in the simulcast system.

Abstract: A system and method that facilitates multiple systems of communicating devices, i.e., a master device and one or more implantable slave devices, to coexist on a common, e.g., RF, communication channel having a limited temporal bandwidth while maintaining the required update rate between each master device and its associated slave devices. In embodiments of the present invention, master devices periodically transmit one or more beacon messages that are suitable for identification by other such master devices at a communication range greater than the communication range that may cause interference between systems and thus enabling one or more systems to cause the position of its frame periods to be interleaved with the frame periods of other such systems in anticipation of systems moving in closer proximity and actually interfering with each other.

Abstract: A method and apparatus for converting packetized data received from a broadband network to a multi-channel payload network having a narrower bandwidth is disclosed. The method includes converting a packet received from the broadband network to a serial stream having first and second pluralities of bytes, the second plurality of bytes being idle; removing the idle bytes from the serial stream thereby providing a reduced data; demultiplexing sequentially occurring reduced data across plural channels of a narrower bandwidth payload network and converting each channels reduced data to corresponding second packets of the payload network.

Abstract: Disclosed are an apparatus and a method for efficiently transmitting a broadcasting channel by means of cyclic delay diversity in an OFDM mobile communication system. The method comprises the steps of setting each transmitter to have different delay values, the transmitter providing a service to adjacent service areas, generating OFDM signals including the broadcasting data by said each transmitter, delaying the OFDM signals by means of the different delay values, and transmitting the delayed OFDM signals by means of each transmitting apparatus.

Abstract: A multiple access technique for a wireless communication system establishes separate channels by defining different time intervals for different channels. In a transmitted reference system different delay periods may be defined between transmitted reference pulses and associated data pulses for different channels. In addition, a multiple access technique may employ a common reference pulse for multiple channels in a transmitted reference system. Another multiple access technique assigns different pulse repetition periods to different channels. One or more of these techniques may be employed in an ultra-wide band system.

Abstract: Some embodiments adaptively adjust to the current call load in a packet based virtual circuit to minimize the delay experienced by the first packets of any talk spurt for a particular active call. Some embodiments minimize the jitter introduced by multiplexing voice packets by smoothing out the waiting time experienced by each of the voice packets. Some embodiments effectively minimize jitter when the number of active calls on a virtual circuit drops off suddenly. Some embodiments are able to differentiate signaling packets indicating a telephony event from voice packets and give the signaling packets expedited processing with no delay contributed by the subcell multiplexing process. Other embodiments are described in the claims.

Abstract: A method of reducing loading on backhaul communications links in a wireless communications system suppresses a portion of the upward flow of frame information for idle and/or erased frames in certain situations, such as when multiple ones of such frames are successively encountered. A radio base station abstains from sending a frame header to a BSC/ANC for second and following frames of the Idle type and/or the radio base station abstains from sending a frame header to a BSC/ANC for second and following frames of the Erased type. The header may also or alternatively be suppressed for an Idle frame immediately following a Good frame. The BSC/ANC in effect fills in the suppressed frame information in such situations, forwards appropriate indications of frame type to the frame selection algorithm.

Abstract: A system, method and program are disclosed for achieving rapid bit synchronization in low power medical device systems. Messages are transmitted via telemetry between a medical device and a communication device. The synchronization scheme uses a portion of a unique preamble bit pattern to identify the communication device allowing for economical communications with a minimum expenditure of energy. A special set of preamble bit patterns are utilized for their unique synchronization properties making them particularly suited for rapid bit synchronization. These unique preamble bit patterns further provide simplification to the preamble error detection logic.

Abstract: A dual loop (PLL/DLL) data synchronization system and method for plesiochronous systems is provided. In particular, a system and method for dual loop data synchronization using a granular FIFO fill level indicator is provided. A dual loop data serializer includes a phase lock loop (PLL) and a delayed lock loop (DLL) configured with a phase shifter in the feedback path of the PLL. The dual loop serializer locks to the input of the DLL, which represents a fill level of a FIFO. A granular FIFO fill level indicator of the DLL provides input to the phase shifter to adjust the frequency of the PLL accordingly. Thus, the frequency of the data input rate can be controlled and a constant fill level of the FIFO can be maintained. A dual loop retimer includes a dual loop serializer (PLL/DLL) and a clock recovery DLL. The retimer resets the jitter budget to meet transmission requirements for an infinite number of repeater stages.

Abstract: A method and device are disclosed for the detection and synchronization of a signal in a frequency-hopping system. The method has a step, for each frequency F(1) . . . F(M), of selecting the K samples corresponding to the greatest values of the signal, and their positions. For a given position, the M greatest values are combined which are selected from among K samples on each frequency having the given position. The greatest combined value is kept and the corresponding position. The greatest combined value is compared with a threshold value, and if the greatest combined value is greater than this threshold value, then the detection of the signal is declared.

Abstract: A technique for provisioning cross-connects in network switching environment includes receiving a portion of the an input data stream including having header data and the payload data, the payload data occurring at a first offset relative to the header data and generating a delayed version of the portion of the input data stream. The technique also includes generating a portion of a retimed data stream by selecting between the portion of the input data stream and the delayed version of the portion of the input data stream, the retimed data stream including the header data and the payload data, the payload data occurring at a second offset relative to the header data.

Abstract: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.