Associated With Semiconductor Wafer Handling Patents (Class 414/935)
  • Patent number: 8026516
    Abstract: Provided is a carrier module for use in a handler for handling a packaged chip for a test, the carrier module including a body provided, a base plate where the packaged chips are placed, provided to the body, and at least one latch which holds the packaged chips in position in the base plate.
    Type: Grant
    Filed: November 28, 2007
    Date of Patent: September 27, 2011
    Assignee: Mirae Corporation
    Inventors: Jung Ug An, Hee Rak Beom, Dae Gon Yun
  • Patent number: 8007218
    Abstract: The present invention is related to a method for transferring substrates. The method comprise simultaneously transferring two substrates, by means of a transfer unit, between first support plates disposed to be vertically spaced apart from each other and second support plates arranged abreast in a lateral direction. The transfer unit comprises a top blade and a bottom blade converted to a folded state where they are vertically disposed to face each other and an unfolded state where they rotate at a preset angle in opposite directions. The transfer unit place/take a substrate on/out of the first support plates under the folded state and place/take a substrate on/out of the second support plates under the unfolded state.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 30, 2011
    Assignee: PSK Inc.
    Inventors: Dong-Seok Park, Sang-Ho Seol
  • Patent number: 7993486
    Abstract: The present invention relates to treatment units for the wet-chemical or electrolytic treatment of flat workpieces (1), such as metal foils, printed circuit foils or printed circuit boards, in which the workpieces (1) are transported on a conveying path by means of conveying members (6, 6?, 6?, 7). The treatment unit comprises carrier elements (4) with recesses (21), said carrier elements (4) being oriented to be parallel to the conveying path, and at least one module system for carrying the conveying members (6, 6?, 6?, 7) that consist of insertion elements (14, 26), preferably arranged in pairs, the at least one module system being configured such that it registers with and is preferably slidable into the recesses (21) of the carrier elements (4). The treatment unit is preferably utilized in horizontal conveyorized lines.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: August 9, 2011
    Assignee: Atotech Deutschland GmbH
    Inventors: Uwe Hauf, Henry Kunze, Ferdinand Wiener
  • Patent number: 7988812
    Abstract: A substrate treatment apparatus is provided. The substrate treatment apparatus includes a process room, a load port in which a container receiving wafers is disposed, and a wafer transfer module disposed between the load port and the process room to transfer the wafers between the load port and the process room. The wafer transfer module includes a first barrier, a second barrier extending from a first end of the first barrier or from a portion near the first end of the first barrier at a predetermined inclined angle with respect to the first barrier, and a third barrier extending from a second end of the first barrier or from a portion near the second end of the first barrier at a predetermined inclined angle. The load portion is provided along the first barrier. The process room includes a plurality of chambers arranged along the second and third barriers.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: August 2, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Sang Kim, Kyue-Sang Choi, Byong-Kyu Seo, Soon-Chon Park
  • Patent number: 7987019
    Abstract: The present invention is a substrate transfer apparatus including a transfer arm for transferring a substrate and a mounting portion for receiving the substrate transferred by the transfer arm from the transfer arm, including: a mounting portion detector provided at the transfer arm for detecting the mounting portion; a moving means for raising and lowering and moving in a horizontal direction the transfer arm; and a controller for controlling the moving means based on a detection signal from the mounting portion detector. When the substrate transferred by the transfer arm is delivered to a spin chuck, the mounting portion detector detects the mounting portion of the spin chuck, and then the moving means is driven based on a control signal from the controller to lower the transfer arm in an oblique direction to thereby mount the substrate on the mounting portion.
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: July 26, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Katsuhiro Morikawa
  • Patent number: 7977241
    Abstract: A method of fabricating highly reliable tungsten interconnects takes into consideration the effects of charging that can occur within a CMP apparatus due to unrestricted DI water flow, limited only by house supply. Such effects are addressed with the use of a variable pressure input constant flow output in-line controller to the DI water line coupled to the head cleaning loading and unloading module of the CMP apparatus.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: July 12, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Edward R. Gutierrez, William J. Bellamak, Daniel Davison, Gregory D. Hale, James F. Vannell
  • Patent number: 7973259
    Abstract: A sorting system is provided for electronic components such as LED devices which includes a testing station for testing and determining a characteristic of each electronic component. A first tray has a plurality of receptacles for receiving tested electronic components and a second tray has more receptacles than the first tray for receiving tested electronic components. Electronic components comprising tested characteristics that occur with greater frequency are loaded into the receptacles of the first tray and electronic components comprising tested characteristics that occur with lower frequency are loaded into the receptacles of the second tray.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: July 5, 2011
    Assignee: ASM Assembly Automation Ltd
    Inventors: Pei Wei Tsai, Chak Tong Sze, Sai Kit Wong, Fong Shing Yip
  • Patent number: 7972755
    Abstract: There is disclosed a substrate processing method by a multi-patterning technique, which comprises a lithography process and an etching process, each of the processes is performed to one substrate at least twice. The substrate processing method is performed by using a substrate processing system comprising a plurality of process units for performing respective steps of the lithography process. When a second lithography process is performed to a substrate, process unit(s) for performing one or more steps of the second lithography process to be used in the second lithography process is automatically selected based on the process history of the first lithography process in such a way that the process unit(s) to be used in the second lithography process is (are) identical to the processed unit(s) used in the first lithography process.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: July 5, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Yuichi Yamamoto
  • Patent number: 7974726
    Abstract: By providing an under-specified specification for designating a destination carrier in a respective control job or control message, a high degree of flexibility in determining the destination of processed substrates may be obtained, thereby also allowing the removal of a source carrier for enhancing load port availability in complex semiconductor facilities.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: July 5, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jan Rothe, Konrad Rosenbaum
  • Patent number: 7972468
    Abstract: A semiconductor device fabricating system 1 includes a casing 10, processing units 12, 13 and 14, for carrying out semiconductor device fabricating processes, disposed inside the casing, and platforms 15, 16 and 17 set outside the casing. The platforms are foldable. Spaces required by the platforms can be reduced and the footprint of the semiconductor device fabricating system can be reduced by folding the platforms.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: July 5, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yuji Kamikawa, Masahiro Noda
  • Patent number: 7963736
    Abstract: A semiconductor-processing apparatus includes: a wafer handling chamber; a wafer processing chamber; a wafer handling device; a first photosensor disposed in the wafer handling chamber in front of the wafer processing chamber at a position where the wafer partially blocks light received by the first photosensor at a ready-to-load position and substantially entirely blocks light received by the first photosensor when the wafer moves from the ready-to-load position toward the wafer processing chamber in the x-axis direction; and a second photosensor disposed in the wafer handling chamber in front of the wafer processing chamber at a position where the wafer does not block light received by the second photosensor at the ready-to-load position and partially blocks light received by the second photosensor when the wafer moves from the ready-to-load position toward the wafer processing chamber in the x-axis direction.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: June 21, 2011
    Assignee: ASM Japan K.K.
    Inventors: Masahiro Takizawa, Masaei Suwada, Masayuki Akagawa
  • Patent number: 7956447
    Abstract: A waffle pack device including a member having recesses in a surface of the member to accommodate die from at least one semiconductor wafer. The member is compatible with semiconductor wafer handling equipment and/or semiconductor wafer processing. Preferably, the member accommodates at least a majority of die from a semiconductor wafer. Further, one semiconductor device assembly method is provided which removes die from a singular waffle pack device, places die from the single waffle pack device on a semiconductor package to assemble from the placed die all die components required for an integrated circuit, and electrically interconnects the placed die in the semiconductor package to form the integrated circuit.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: June 7, 2011
    Assignee: Ziptronix, Inc.
    Inventors: Paul M. Enquist, Gaius G. Fountain, Jr., Carl T. Petteway
  • Patent number: 7948122
    Abstract: Especially for use in the semiconductor industry, a displacement device (701) is disclosed comprising a first part comprising a carrier (714) on which a system of magnets (710) is arranged according to a pattern of row and columns extending parallel to the X-direction and the Y-direction, respectively. The magnets in each row and column are arranged according to a Halbach array, i.e. the magnetic orientation of successive magnets in each row and each column rotates 90° counter-clockwise. The second part comprises an electric coil system (712) with two types of electric coils, one type having an angular offset of +45°, and the other type having an offset of ?45° with respect to the X-direction. The first part (714, 710) is movable over a range of centimeters or more with respect to the stationary second part (712). For high precision positioning of the first part, an interferometer system (731, 730) is provided.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: May 24, 2011
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Johan Cornelis Compter, Petrus Carolus Maria Frissen, Jan Van Eijk
  • Patent number: 7918939
    Abstract: A semiconductor manufacturing apparatus comprising: a plurality of vacuum chambers corresponding to a plurality of processing sections necessary for manufacturing a semiconductor device; an exhaust device connected to each vacuum chamber; a plate shaped guide plate arranged at the bottom of each vacuum chamber and having a plurality of gas emission holes; and a gas supply source for supplying gas to the gas emission holes, wherein the plurality of vacuum chambers are adjacent to each other by way of a shutter, one of the two adjacent vacuum chambers includes a tray mounted on the guide plate for mounting a substrate to be performed with a predetermined process, a conveying function section having a conveying arm for moving the tray from one vacuum chamber to the other vacuum chamber along the guide plate, and a controlling function section, the controlling function section performing the control so as to open the shutter to communicate the two adjacent vacuum chambers, emit gas from the gas emission holes of
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: April 5, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yusuke Fukuoka, Katsushi Kishimoto
  • Patent number: 7905960
    Abstract: An apparatus for manufacturing a substrate includes: a transferring chamber extended along a long direction; at least one process chamber connected to the transferring chamber along the long direction; at least one load-lock chamber connected to the transferring chamber at least one side of the transferring chamber; and a transferring chamber robot moving along the long direction in the transferring chamber and transferring a substrate.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: March 15, 2011
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Jae-Wook Choi, Young-Rok Kim
  • Patent number: 7902477
    Abstract: A test work station for testing ICs includes an output bench with sliding rails that partitions the table top of the output bench into segregated areas. ICs that pass testing are sorted according to an operating parameter, in other words binned, and placed in the appropriate segregated area. The sliding rails avoid mingling of the various categories (bins) of ICs. In a further embodiment, the test work station includes an input bench for receiving product. Failed ICs are kept on the input bench, thus segregating them from ICs that have passed testing and avoiding inadvertent mixing of bad ICs with good ICs. In a particular embodiment, the input and output benches are at a height that allows an operator to stand while working, and allows storage underneath the benches to keep the work areas clear.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: March 8, 2011
    Assignee: Xilinx, Inc.
    Inventor: Noel A. Connolly
  • Patent number: 7897525
    Abstract: In accordance with some embodiments described herein, a method for transferring a substrate to two or more process modules is provided, comprising loading at least one substrate into one or more mobile transverse chambers, the mobile transverse chambers being carried on a rail positioned adjacent to the two or more process modules, and wherein each mobile transverse chamber is configured to maintain a specified gas condition during conveyance of the substrate. One or more drive systems are actuated to propel at least one of the one or more mobile transverse chambers along the rail. The at least one mobile transfer chamber docks to at least one of the process modules, and the substrate is conveyed from the mobile transverse chamber to the at least one process modules.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: March 1, 2011
    Assignee: Archers Inc.
    Inventors: Lawrence Chung-Lai Lei, Alfred Mak, Rex Liu, Kon Park, Samuel S. Pak, Tzy-Chung Terry Wu, Simon Zhu, Ronald L. Rose, Gene Shin, Xiaoming Wang
  • Patent number: 7899568
    Abstract: A substrate processing system of the present invention includes a transfer-in/out section for transferring-in/out a substrate and a processing section for performing a plurality of processing and treatments on the substrate, in which a throughput of substrate processing at a pre-stage performed from when the substrate is transferred in from the transfer-in/out section to when the substrate is transferred out to the external apparatus is set higher than a throughput of substrate processing at a post-stage performed from when the substrate is returned from the external apparatus into the processing section to when the substrate is returned into the transfer-in/out section.
    Type: Grant
    Filed: April 23, 2008
    Date of Patent: March 1, 2011
    Assignee: Tokyo Electron Limited
    Inventor: Yuichi Yamamoto
  • Patent number: 7892947
    Abstract: A workpiece machining method includes attaching a workpiece to a workpiece support with the aid of joining means. The workpiece and the workpiece support are joined to one another by an annular joining means. The composite produced is machined. The machined workpiece is separated from the workpiece support.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: February 22, 2011
    Assignee: Infineon Technologies AG
    Inventors: Stephen Bradl, Walther Grommes, Werner Kröninger, Michael Melzl, Josef Schwaiger, Thilo Stache
  • Patent number: 7891932
    Abstract: A working rod with a tip end extending into a vacuum process chamber and moving in the axial direction, two static-pressure gas bearings supporting the rod in the non-contact manner, and an internal moving body of a magnet coupling type driving mechanism driving the rod are housed in a rod housing cylindrical portion leading to the vacuum process chamber, and an exhaust portion by suction is provided at a part of the rod housing cylindrical portion so that the pressure of the rod housing cylindrical portion is lowered than the pressure of the vacuum process chamber by the exhaust from the exhaust portion.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 22, 2011
    Assignees: SMC Corporation, Tohoku University
    Inventors: Soichi Sato, Takashi Abe, Eiko Miyasato, Migaku Takahashi, Masakiyo Tsunoda
  • Patent number: 7880859
    Abstract: A substrate processing system processes a plurality of substrates in a single-substrate processing mode by a plurality of processes and provided with a plurality of modules respectively for carrying out processes. When a defect is found in a substrate, a defective processing unit that caused the defect can be easily found out. The substrate processing system and a substrate processing method to be carried out by the substrate processing system can suppress the reduction of throughput when a large number of substrates are to be processed. The substrate processing system is provided with a plurality of modules for processing a plurality of substrates (W) in a single-substrate processing mode by a plurality of processes and includes a substrate carrying means (A4) for carrying a substrate (W) from a sending module to a receiving module, and a control means (6) for controlling the substrate carrying means (A4) on the basis of one of at least two carrying modes each assigning receiving modules to sending modules.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 1, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yasushi Hayashida, Shinichi Hayashi, Yoshitaka Hara
  • Patent number: 7874782
    Abstract: A wafer transfer apparatus is provided. In a minimum transformed state where a robot arm is transformed such that a distance defined from a pivot axis to an arm portion, which is farthest in a radial direction relative to the pivot axis, is minimum, a minimum rotation radius R, is set to exceed ½ of a length B in the forward and backward directions of an interface space, the length B corresponding to a length between the front wall and the rear wall of the interface space forming portion, and is further set to be equal to or less than a subtracted value obtained by subtracting a distance L0 in the forward and backward directions from the rear wall of the interface space forming portion to the pivot axis, from the length B in the forward and backward directions of the interface space (i.e., B/2<R?B?L0).
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: January 25, 2011
    Assignee: Kawasaki Jukogyo Kabushiki Kaisha
    Inventor: Yasuhiko Hashimoto
  • Patent number: 7862334
    Abstract: A heat treatment apparatus and a heat treatment method using the same are disclosed. In the method, a support plate on which a device substrate is mounted is loaded into the heat treatment apparatus using a transfer unit in an in-line manner, and the device substrate mounted on the support plate is heat-treated using the heat treatment apparatus.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: January 4, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Patent number: 7846845
    Abstract: A method and system for removing volatile residues from a substrate are provided. In one embodiment, the volatile residues removal process is performed en-routed in the system while performing a halogen treatment process on the substrate. The volatile residues removal process is performed in the system other than the halogen treatment processing chamber and a FOUP. In one embodiment, a method for volatile residues from a substrate includes providing a processing system having a vacuum tight platform, processing a substrate in a processing chamber of the platform with a chemistry comprising halogen, and treating the processed substrate in the platform to release volatile residues from the treated substrate.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: December 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth J. Bahng, Matthew Fenton Davis, Thorsten Lill, Steven H. Kim
  • Patent number: 7841371
    Abstract: A curtain nozzle is located above an opening portion (10) in a FIMS. A gas curtain formed of inert gas for closing the opening portion is formed. A cover is so provided as to cover a part of the curtain nozzle so as to prevent peripheral gas around an opening of the curtain nozzle from being involved in the gas curtain of the inert gas emitted from the curtain nozzle.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: November 30, 2010
    Assignee: TDK Corporation
    Inventor: Tsutomu Okabe
  • Patent number: 7838790
    Abstract: A multifunctional handler system for electrical testing of semiconductor devices is provided. The multifunctional handler system comprises: (1) a semiconductor device processing section comprising a loading unit including a buffer, a sorting unit including a separate marking machine, and a unloading unit; (2) a semiconductor device testing section, separate from the semiconductor device processing section, comprises a test chamber, the test chamber is separated into two or more test spaces, and the test spaces of the test chamber include a second chamber positioned at a lower position, a first chamber positioned above the second chamber, and pipelines for connecting the first and second chambers to each other; and (3) a host computer which is independently connected to the semiconductor device processing section and the semiconductor device testing section and controls tray information, test results, marking information, and test program information.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: November 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-goo Kang, Jun-ho Lee, Ki-sang Kang, Hyun-seop Shim, Do-young Kam, Jae-il Lee, Ju-il Kang
  • Patent number: 7840299
    Abstract: When a trouble occurs in a substrate treatment apparatus, the substrate existing in the substrate treatment apparatus is quickly collected without exerting adverse effects on the subsequent substrate treatment to resume the substrate treatment early. At the time of occurrence of trouble in a coating and developing treatment apparatus, all of the substrates in the coating and developing treatment apparatus are collected to a transfer-in/out section using a transfer unit in the apparatus. In this event, each transfer unit transfers the substrate from each position at the time of occurrence of trouble in a direction toward the transfer-in/out section for collection. Further, the substrate under treatment in the treatment unit at the time of occurrence of trouble is collected after the treatment is finished.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: November 23, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Makio Higashi, Akira Miyata, Yoshitaka Hara
  • Patent number: 7826918
    Abstract: A transfer method employs a transfer system including a semiconductor handling device and an automatic transfer device. The semiconductor handling device includes a first transfer mechanism and a first optically coupled parallel I/O communications interface. The automatic transfer device includes a second transfer mechanism and a second optically coupled parallel I/O communications interface. The transfer method includes a successive transfer notifying step wherein the automatic transfer device and the semiconductor handling device notify each other that a successive transfer is possible via an optical communications between the first and the second optically coupled parallel I/O communications interface in case where a plurality of objects to be processed are able to be successively transferred one by one between the first and the second transfer mechanism; and a successive transfer step wherein the objects are transferred one by one between the first and the second transfer mechanism.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: November 2, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Toshihiko Iijima, Shinya Shimizu, Kaori Ishihara
  • Patent number: 7815558
    Abstract: Disclosed is a method for replacing a process instrument in a processing apparatus, in which a target object is loaded by a transfer mechanism into a processing unit and is subjected to a process by use of the process instrument. The method includes confirming that a process on the target object is finished in a processing unit designated as a process instrument replacement target, and providing information that a process instrument replacing operation is permitted to start. The method further includes, when a shutter of the processing unit designated as the process instrument replacement target is closed to perform a process instrument replacing operation and an operation prohibition state is thereby applied to the transfer mechanism, canceling the operation prohibition state to allow the transfer mechanism to perform a load/unload operation relative to a processing unit not designated as a process instrument replacement target.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: October 19, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Naoyuki Tajiri, Akifumi Suzuki, Daisuke Honma
  • Patent number: 7811925
    Abstract: Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 12, 2010
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Eric G. Webb, Edmund B. Minshall, Avishai Kepten, R. Marshall Stowell, Steven T. Mayer
  • Patent number: 7808612
    Abstract: A method of removing a substrate from a substrate table of a lithographic apparatus. The substrate table is provided with a mask arranged to form a peripheral exposure exclusion region on a substrate. The method includes moving the mask from an in use position to a storage position. The storage position is adjacent to a projection system of the lithographic apparatus. The method also includes removing the substrate from the lithographic apparatus.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: October 5, 2010
    Assignee: ASML Netherlands B.V.
    Inventors: Remko Wakker, Erik Marie Jose Smeets
  • Patent number: 7801641
    Abstract: A route setting method according to the present invention sets, in a work transfer system including a plurality of work transfer units which connect a plurality of loading places to a plurality of unloading places, a route of the work transfer units to pass a work between a planned loading place and a planned unloading place which are required to transfer the work in the plurality of loading places and the plurality of unloading places. The route setting method includes the steps of setting, based on layout information representing a layout of the plurality of work transfer units, a plurality of candidates of the route between the planned loading place and the planned unloading place, and selecting, based on a predetermined condition, one route from the plurality of candidates of the route set in the candidate setting step.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: September 21, 2010
    Assignees: Hirata Corporation, Hirata Software Technology Co., Ltd.
    Inventors: Takeru Yoshikawa, Keiichi Uchimura, Zhencheng Hu, Tsugumitsu Kandabashi
  • Patent number: 7789609
    Abstract: Adjacent to an opening portion 10 in an FIMS system is provided an enclosure that encloses the operation space of a door and has a second opening portion 31 opposed to the opening portion 10. A curtain nozzle is provided above the upper edge of the opening portion 10 in the upper portion in the enclosure. A purge gas is supplied from the curtain nozzle along a direction from the upper edge to the lower edge of the opening portion. In addition, a gas outlet through which the purge gas flows from the interior of the enclosure out into the exterior is provided on the wall of the enclosure to which the purge gas flowing in the above described direction is directed, whereby an increase in the partial pressure of oxidizing gases in the interior of the FOUP is prevented.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: September 7, 2010
    Assignee: TDK Corporation
    Inventors: Tsutomu Okabe, Jun Emoto
  • Patent number: 7784164
    Abstract: A non-polygon shaped, multi-piece chamber is provided. A non-polygon shaped, multi-piece chamber may include (1) a central piece having a first side and a second side, (2) a first side piece adapted to couple with the first side of the central piece, and (3) a second side piece adapted to couple with the second side of the central piece. The central piece, the first side piece, and the second side piece form a cylindrical overall shape when coupled together. Numerous other aspects are provided.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: August 31, 2010
    Assignee: Applied Materials, Inc.
    Inventors: John M. White, Donald Verplancken, Shinichi Kurita
  • Patent number: 7767956
    Abstract: Methods and systems for evaluating and controlling a lithography process are provided. For example, a method for reducing within wafer variation of a critical metric of a lithography process may include measuring at least one property of a resist disposed upon a wafer during the lithography process. A critical metric of a lithography process may include, but may not be limited to, a critical dimension of a feature formed during the lithography process. The method may also include altering at least one parameter of a process module configured to perform a step of the lithography process to reduce within wafer variation of the critical metric. The parameter of the process module may be altered in response to at least the one measured property of the resist.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: August 3, 2010
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Suresh Lakkapragada, Kyle A. Brown, Matt Hankinson, Ady Levy
  • Patent number: 7758341
    Abstract: A utility apparatus supplies a liquid to a substrate processing apparatus having a plurality of blocks of heat treatment apparatus groups. A plurality of supply ports supplies the liquid for each vertical block, horizontal block, or heat treatment apparatus. A plurality of recovery ports collects the liquid supplied to each vertical block, horizontal block, or heat treatment apparatus. Detecting mechanisms are provided respectively in the plurality of recovery ports to detect a temperature of the recovered liquid. A control mechanism controls based on detection information of the detecting mechanisms.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: July 20, 2010
    Assignee: SNF Solutions, Co., Ltd.
    Inventor: Kim Dong-Hun
  • Patent number: 7756599
    Abstract: A computer readable storage medium storing a program for performing an operation method of a substrate processing apparatus is provided. The operation method includes the steps of introducing a nonreactive gas into the vacuum preparation chamber before the gate valve is opened while the substrate is transferred between the vacuum preparation chamber of the vacuum processing unit and the transfer unit, stopping introducing the nonreactive gas when an inner pressure of the vacuum preparation chamber becomes same as an atmospheric pressure, starting an evacuation process of the corrosive gas in the vacuum preparation chamber and then opening to atmosphere performed by letting the vacuum preparation chamber communicate with an atmosphere, and opening the gate valve after the step of opening to atmosphere.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: July 13, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Tomoyuki Kudo, Jun Ozawa, Hiroshi Nakamura, Kazunori Kazama, Tsuyoshi Moriya, Hiroyuki Nakayama, Hiroshi Nagaike
  • Patent number: 7750818
    Abstract: A system and method for introducing a substrate into a process chamber is provided. A presence or absence of a substrate on a stage in an apparatus for manufacturing a semiconductor or a flat panel display may be determined by lift pins used for loading and unloading a substrate, the introduction of another substrate may be prevented and a broken state or the erroneously loaded state of the substrate may be detected. An opening or closing of a gate valve may also be determined, and the introduction of a substrate into the process chamber may be prevented while the gate valve is closed.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: July 6, 2010
    Assignee: ADP Engineering Co., Ltd.
    Inventor: In Taek Lee
  • Patent number: 7747343
    Abstract: A substrate housing method for a substrate processing apparatus, including: a first step of transporting the substrate taken out from a housing case to the substrate processing apparatus by a transport means; a third step of processing the substrate at the substrate processing apparatus; a fourth step of returning the substrate after the third step to the housing case by the transport means; a second step of calculating a difference in amount in relation to a normal position of the substrate at the transport means from the first step and before the fourth step; and a fifth step of adjusting a returning position of the substrate in the housing case after the third step and until the fourth step.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: June 29, 2010
    Assignee: Olympus Corporation
    Inventor: Katsuyuki Hashimoto
  • Patent number: 7736436
    Abstract: An edge ring for use in batch thermal processing of wafers supported on a vertical tower within a furnace. The edge rings are have a width approximately overlapping the periphery of the wafers and are detachably supported on the towers equally spaced between the wafer to reduce thermal edge effects. The edge rings have may have internal or external recesses to interlock with structures on or adjacent the fingers of the tower legs supporting the wafers or one or more steps formed on the lateral sides of the edge ring may slide over and then fall below a locking ledge associated with the support fingers. Preferably, the tower and edge ring and other parts of the furnace adjacent the hot zone are composed of silicon.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: June 15, 2010
    Assignee: Integrated Materials, Incorporated
    Inventors: Tom L. Cadwell, Ranaan Zehavi, Michael Sklyar
  • Patent number: 7735648
    Abstract: A transport pod (1) of the invention for a mask or a semiconductor wafer (2) comprises a leakproof peripheral wall (3) surrounding an inside space (4) receiving the mask or the semiconductor wafer (2). Thermally conductive support means (11) hold the mask or the semiconductor wafer (2). A cold plate (7) thermally coupled to a cold source (8) generates a temperature gradient facing the main face (6) of the mask or the semiconductor wafer (2) that is to be protected against particulate pollution. The cold plate (7) is held by connection means (7b) including thermal insulation means (7c). An on-board energy source (9) powers the cold source (8). This significantly reduces deposition of polluting particles on the main face (6) of the mask or the semiconductor wafer (2).
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: June 15, 2010
    Assignee: Alcatel
    Inventors: Jean-Luc Rival, Hisanori Kambara, Roland Bernard
  • Patent number: 7726353
    Abstract: A curtain nozzle is located above an opening portion (10) in a FIMS. A gas curtain formed of inert gas for closing the opening portion is formed, and at the same time, the inert gas is also supplied to an inside of a FOUP. Here, the direction of supply of the inert gas supplied to the inside of the FOUP is such that it does not have a flow component directing toward the gas flow forming the gas curtain. The above-mentioned structure prevents increase over time in a partial pressure of oxidizing gas in the FOUP fixed by a FIMS system in an open state.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: June 1, 2010
    Assignee: TDK Corporation
    Inventor: Tsutomu Okabe
  • Patent number: 7726891
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a development processing block, a resist cover film processing block, a resist cover film removal block, and an interface block. An exposure device is arranged adjacent to the interface block. A resist film is formed on a substrate in the resist film processing block. A resist cover film is formed on the resist film in the resist cover film processing block before the substrate is subjected to exposure processing by the exposure device.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: June 1, 2010
    Assignee: Sokudo Co., Ltd.
    Inventors: Koji Kaneyama, Akihiro Hisai, Toru Asano, Hiroshi Kobayashi
  • Patent number: 7723981
    Abstract: The present invention relates to a test tray for a test handler. According to this invention, there is disclosed a technique that an insert loaded in a loading part which is arranged in a matrix pattern in a frame of the test tray allows an amount and direction of free movement thereof to be determined in accordance with a location of the loading part, where the insert is loaded, on the matrix, thereby enabling a thermal expansion or contraction of a match plate or the test tray to be compensated.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: May 25, 2010
    Assignee: Techwing Co., Ltd.
    Inventors: Jae Gyun Shim, Yun Sung Na, In Gu Jeon, Tae Hung Ku, Dong Han Kim
  • Patent number: 7720557
    Abstract: Systems, tools, and methods are provided in which a first signal is transmitted from a tool to a Fab indicating that all substrates to be processed have been removed from a specific carrier and that the specific carrier may be temporarily unloaded from a loadport of the tool. A second signal is transmitted from the tool to the Fab indicating that the specific carrier may be returned to the tool. While the carrier is unloaded from the tool, other carriers may be loaded on the vacated loadport. Numerous other features and aspects of the invention are disclosed.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: May 18, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Michael Teferra, Amitabh Puri, Eric Englhardt
  • Patent number: 7717481
    Abstract: A robotic end effector or blade suitable for transferring a substrate in a processing system is provided. In some embodiments, an end effector can include a body having opposing mounting and distal end, the body fabricated from a single mass of ceramic. The body can include a pair of arcuate lips extending upward from an upper surface of the body. Each lip is disposed on a respective finger disposed at the distal end of the body. An arcuate inner wall extends upward from the upper surface at the mounting end of the body. The inner wall and lips define a substrate receiving pocket. A plurality of contact pads extend upward from the upper surface of the body for supporting the substrate thereon. A recess is formed in a bottom surface of the body to accommodate a mounting clamp.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: May 18, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Eric Ng
  • Patent number: 7699957
    Abstract: Disclosed is a plasma processing apparatus, in which parasitic plasma is not generated in a transfer chamber. The plasma processing apparatus has a load lock chamber, a transfer chamber, a processing chamber, and gate valves installed between the chambers for transferring a substrate and opening and closing openings of the chambers.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: April 20, 2010
    Assignee: Advanced Display Process Engineering Co., Ltd.
    Inventors: Seoung-Wook Lee, Young-Joo Hwang
  • Patent number: 7699021
    Abstract: Embodiments generally provide an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, substrates processed in the cluster tool have a more repeatable wafer history. In one embodiment, non-orthogonal robot trajectories are used to assure reliable and high speed substrate transfer. In another embodiment, at least one buffering station is used to avoid collision and improve throughput. In another embodiment, optimal positioning of the robots are used to improve throughput.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 20, 2010
    Assignee: Sokudo Co., Ltd.
    Inventors: Leon Volfovski, Tetsuya Ishikawa
  • Patent number: 7694700
    Abstract: Apparatus of the invention for transporting substrates (3) comprises a mini-environment enclosure (1) that is movable and that can be coupled to a conditioning station (22). The mini-environment enclosure (1) includes a micropump (12) whose inlet is connected to an inside cavity (2) that is to contain the substrate (3) to be transported. An energy supply (16) is also provided in the mini-environment enclosure (1) to power the micropump (12). The mini-environment enclosure (1) comprises a peripheral shell (4) open to two opposite main faces (5, 6), and including a closable side opening (7). A first main wall (8) is fitted to close the first main face (5) in leaktight manner. A second main wall (9) is fitted and secured to close the second main face (6) in leaktight manner. The first and second main walls are disposed in planes parallel to the plane containing the substrate.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: April 13, 2010
    Assignee: Alcatel
    Inventors: Roland Bernard, Hisanori Kambara, Jean-Luc Rival, Catherine Le Guet
  • Patent number: 7695232
    Abstract: A new apparatus for processing substrates is disclosed. A multi-level load lock chamber having four environmentally isolated chambers interfaces with a transfer chamber that has a robotic assembly. The robotic assembly has two arms that each can move horizontally as the robotic assembly rotates about its axis. The arms can reach into the isolated chambers of the load lock to receive substrates from the bottom isolated chambers, transport the substrates to process chambers, and then place the substrates in the upper chambers. The isolated chambers in the load lock chamber may have a pivotably attached lid that may be opened to access the inside of the isolated chambers.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: April 13, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Robert B. Moore, Eric Ruhland, Satish Sundar, Mario David Silvetti