Abstract: A method for maintaining quality of monomer during a coating process for intrinsically conductive polymer which suppresses unwanted by-products. A neutralization process using a base or anion exchange resin is used batch-wise or continuous.

Abstract: A filtered feedthrough assembly having at least one terminal pin therethrough is provided. The feedthrough assembly comprises a ferrule having a cavity therethrough for receiving the terminal pin, and insulating structure having an upper surface. The insulating structure is disposed within the cavity and around the terminal pin for electrically isolating the pin from the ferrule. A capacitor is disposed around the pin and electrically coupled thereto. The capacitor has a lower surface that is disposed proximate the upper surface, and at least one washer is disposed between the upper surface and the lower surface. To attach the capacitor to the insulating structure, a body of epoxy is substantially confined between the upper surface and the lower surface by the ferrule, the insulating structure, the capacitor, and the at least one washer.

Abstract: A touch screen sensor assembly that includes a single substrate. In one embodiment, the assembly includes a first patterned transparent conductive layer (e.g., indium tin oxide) disposed on top of the substrate. The assembly also includes a second patterned transparent conductive layer disposed over the first conductive layer, with a layer of silicon oxide disposed therebetween. The silicon oxide layer functions to electrically isolate the first and second conductive layers, thereby eliminating the need for two substrates or a single substrate having transparent conductive layers on each of its top and bottom surfaces. The assembly may also be connectable to a single, non-bifurcated flexible printed circuit operative to connect the assembly to a controller.

Abstract: A method for storing energy in a capacitor includes connecting a first conductor to a first electrode and a second conductor to a second electrode. The second electrode is separated from the first electrode by a dielectric layer. The dielectric layer includes a layer of boron oxynitride, BON. The conductivity of the dielectric layer is lower than the conductivity of the first electrode or the second electrode. A voltage of at least 5 volts is applied between the first electrode and the second electrode by means of the first and second conductors.

Abstract: A method for forming a capacitor dielectric includes depositing a zirconium oxide layer, performing a post-treatment on the zirconium oxide layer such that the zirconium oxide layer has a tetragonal phase, and depositing a tantalum oxide layer over the zirconium oxide layer such that the tantalum oxide layer has a tetragonal phase.

Abstract: A process for the manufacture of small sensors with reproducible surfaces, including electrochemical sensors. One process includes forming channels in the surface of a substrate and disposing a conductive material in the channels to form an electrode. The conductive material can also be formed on the substrate by other impact and non-impact methods. In a preferred embodiment, the method includes cutting the substrate to form a sensor having a connector portion and a transcutaneous portion, the two portions having edges that define one continuous straight line.

Abstract: A structural body which includes a first dielectric layer formed on a first substrate and including first conductive particles, each surface of the first conductive particles being entirely covered with a first dielectric film; and a second dielectric layer formed on the first dielectric layer wherein a volume ratio of a dielectric in the second dielectric layer is higher than a volume ratio of a dielectric in the first dielectric layer.

Abstract: The present disclosure relates generally to the field of sequential surface chemistry. More specifically, it relates to products and methods for manufacturing products using Atomic Layer Deposition (“ALD”) to depose one or more materials onto a surface. ALD is an emerging variant of Chemical Vapor Deposition (“CVD”) technology with capability for high-quality film deposition at low pressures and temperatures, which may produce defect-free films, on a macroscopic scale, at any given thickness. The present disclosure includes, in varying embodiments, methods of manufacturing microelectronic assemblies and components such as battery electrodes, capacitors, resistors, catalyzers and PCB assemblies by ALD, and the products manufactured by those methods.

Abstract: A coated electrode is provided for use in energy storage devices. The coated electrode comprises a dry fibrillized polymer that is fibrillized with no processing additives.

Abstract: A composite material (A) includes a porous sintered body (12) and an insulation film (2) which covers the porous sintered body (12). The porous sintered body (12) is made of a combination of a metal element (12a) which has a melting temperature not lower than 1600° C., and a nonmetal element (12b, 12c). The insulation film (2) includes the nonmetal element (12b, 12c) and N.

Abstract: A method for producing a positive electrode active material that realizes a non-aqueous electrolyte secondary cell having high discharge capacity and excellent high temperature preservation characteristic is provided. The method includes: an underwater kneading step of kneading lithium nickel composite oxide (LixNi1-yMyOz, 0.9<x?1.1, 0?y?0.7, 1.9?z?2.1, M including at least one selected from Al, Co, and Mn), lithium iron phosphorus composite oxide (LiFePO4), a conductive carbon source, and water; after the underwater kneading step, a cleaning step of removing the water from the mixture after the underwater kneading step; and after the cleaning step, a baking step of baking the mixture in a reduced atmosphere at 200 to 800° C.

Abstract: A tool for manufacturing molecular electronic devices having a coating unit contained in a controlled ambient environment. The coating unit is coupled to a source of active device molecules in solution. The coating unit is configured to apply a selected quantity of the solution to a surface of a substrate and the process tool processes the coated substrate in conditions that cause the active device molecules to attach to active areas of the substrate.

Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.

Abstract: A method is disclosed for manufacturing SrxTiyO3 based metal-insulator-metal (MIM) capacitors using a low temperature Atomic Layer Deposition (ALD) process. Preferably TiN is used to form the bottom electrode. The Sr/Ti ratio in the SrxTiyO3 dielectric layer of the capacitor can be varied to tune the electric properties of the capacitor. The dielectric constant and the leakage current of the SrxTiyO3 dielectric layer decrease monotonously with the Sr content of this SrxTi1-xO3 dielectric layer. By increasing the Sr content at the interface between the SrxTiyO3 dielectric layer and the TiN bottom electrode, the interfacial equivalent-oxide thickness (EOT) can be further reduced.

Abstract: A ceramic electronic component that is hardly influenced by a stress generated when an external electrode containing a metal sintered compact is formed at the end of the ceramic component body, and a method for manufacturing the same are provided. A laminated ceramic capacitor includes a ceramic component body and first electrodes to be connected to internal electrodes that are led to the end surfaces are formed. The first external electrodes are arranged so that the ends are spaced apart from the side surfaces of the ceramic component body. Second external electrodes containing a conductive resin are arranged so as to entirely cover the first electrodes and first and second metal layers and are formed thereon. The first external electrodes are formed by supplying a conductive paste containing conductive metal powder and glass frit having a softening point higher than the sintering starting temperature of the conductive metal powder, and heating the same.

Abstract: A fabrication method for parallel-plate structures and a parallel-plate structure arrangement, wherein the structures have a middle layer, grown on a substrate and disposed between top and bottom electrode layers, wherein the middle layer and the top and bottom electrode layers are deposited on a bottom substrate, and wherein the middle layer is grown first and the top and bottom electrodes are essentially deposited afterwards.

Abstract: A dielectric ceramic composition in a multilayer ceramic capacitor with a composition of formula: {[(CaO)t(SrO)1-t]m[(ZrO2)v(TiO2)1-v]}1-s-xAsEx wherein: A is a transition metal oxide; E is an oxide of an element selected from the group consisting of Ge, Si, Ga and combinations thereof; m is 0.98 to 1.02; t is 0.50 to 0.90; v is 0.8 to 1.0; s and x are selected from the group consisting of: a) 0?x?0.08, 0.0001?s?0.043 and x?1.86s; and b) 0?x?0.0533, 0.0001?s?0.08 and x?0.667s.

Abstract: Disclosed are apparatus and methodology for inexpensive realization of one or more secondary capacitors within a monolithic body that already includes a first, larger capacitor to provide ultra wideband structures. Alternating layers of electrodes are provided with arm portions that embrace portions of adjacent electrode layers so as to create additional coupling effects within the capacitor structure thereby producing multiple additional equivalent capacitor structures within the device.

Abstract: The present invention relates to a small, low-height capacitor device in which deterioration of characteristics such as leakage current is reduced. The capacitor device includes a supporting substrate 1; at least one capacitor element 21 disposed on the supporting substrate 1, including a dielectric layer 4 and a pair of electrodes 2 and 5 sandwiching the dielectric layer 4; and a sealant that seals the capacitor element 21 through a space 22. The dielectric layer 4 has an exposed part 23 exposed in the space 22. According to this structure, deterioration of the dielectric layer can be prevented, and a capacitor device exhibiting a good leakage current characteristic is obtained.

Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.

Abstract: An extremely high-performance polyaniline electrode was prepared by potentiostatic deposition of aniline on hierarchically porous carbon monolith (HPCM), which was carbonized from mesophase pitch. A capacitance value of 2200 F g?1 of polyaniline was obtained at a power density of 0.47 kW kg?1 and an energy density of 300 Wh kg?1. This active material deposited on HPCM also has an advantageous high stability. These superior advantages can be attributed to the backbone role of HPCM. This method also has the advantages of not introducing any binder, thus contributing to the increase of ionic conductivity and power density. High specific capacitance, high power and energy density, high stability, and low cost of active material make it very promising for supercapacitors.

Abstract: A microdeposition system microdeposits droplets of fluid material to define a feature pattern on a substrate. The feature pattern for the substrate is defined. A mask is created for the feature pattern that reduces a density of defects that occur due to a malfunctioning nozzle of the microdeposition head. The droplets of fluid material are microdeposited onto the substrate based on the mask to define sub-features of the feature pattern. One of the nozzles of the microdeposition head is assigned to each of the sub-features in the feature pattern. The nozzles may be assigned randomly or using other functions. The assigned nozzles in the mask are assigned to one of a plurality of passes of the microdeposition head.

Abstract: The present invention relates to a porous conducting metal oxide electrode prepared by depositing a porous conducting metal oxide film comprising a conducting metal oxide film layer having a network structure of nanofibers, comprising nanograins or nanoparticles, on at least one surface of a current collector, and a conducting metal oxide coating layer on the network layer of the porous conducting metal oxide through the constant current method or the cyclic voltammetric method, and a high-speed charge/discharge and ultrahigh-capacity supercapacitor using the porous conducting a metal oxide electrode.

Abstract: A single layer capacitive device including a portion of pre-fired ceramic material and one or more terminations is formed with manufacturing steps that are easily modified to customize size and other aspects of such devices. The single layer devices may be utilized by themselves or selectively combined with MLCs to form integrated capacitor assemblies yielding many desirable performance characteristics in a monolithic assembly. An exemplary integrated capacitor assembly advantageously provides customized frequency response and capacitance in limited real estate. Predictable and generally constant or “flat” impedance versus frequency is afforded mainly by the properties of the single layer device, while higher capacitance is provided mainly from features of one or more associated MLCs. High structural integrity of exemplary integrated capacitor assemblies is achieved due to the disclosed attachment methods.

Abstract: A method for fabricating a metal-insulator-metal (MIM) capacitor includes providing a substrate comprising a bottom electrode, forming a dielectric layer positioned on the bottom electrode, and forming a top electrode positioned on the dielectric layer. The dielectric layer includes a silicon nitride film, the silicon nitride film has a plurality of Si—H bonds and a plurality of N—H bonds, and a ratio of Si—H bonds to N—H bonds being equal to or smaller than 0.5.

Abstract: A capacitor insulating film is composed of a ferroelectric film formed on a substrate and containing an element functioning as a crystal nucleus which allows the growth of a crystal in a random crystal orientation.

Abstract: A multilayer ceramic electronic component includes external terminal electrodes that are formed by depositing metal plating films on exposed portions of internal conductors embedded in a ceramic body, depositing a copper plating films that cover the metal plating films and make contact with the ceramic body around the metal plating films, and heat-treating the ceramic body to generate a copper liquid phase, an oxygen liquid phase, and a copper solid phase between the copper plating films and the ceramic body. The mixed phase including these phases forms a region at which a copper oxide is present in a discontinuous manner inside the copper plating film at least at the interfaces between the ceramic body and the copper plating films. The copper oxide securely attaches the copper plating films to the ceramic body and enhances the bonding force of the external terminal electrodes.

Abstract: A method for manufacturing a capacitor, includes: accelerating conductor particles by ejecting the conductor particles together with gas, each surface of the conductor particles covered with a dielectric entirely; fixing the conductor particles to a substrate with the surface of the conductor particles still covered with the dielectric entirely by colliding the conductor particles with the substrate; and sandwiching a deposited film formed of the conductor particles fixed to the substrate between electrodes.

Abstract: A conductive paste used for forming internal electrodes of a multilayer ceramic electronic device, used in combination with ceramic green sheets, each containing a butyral resin and having a thickness of 5 ?m or less, and including a conductive powder and an organic vehicle, a solvent in said organic vehicle having terpineol acetate as its main ingredient, whereby there is little change in viscosity along with time and no occurrence of sheet attack.

Abstract: Methods of forming an oxide are disclosed and include contacting a ruthenium-containing material with a tantalum-containing precursor and contacting the ruthenium-containing material with a vapor that includes water and optionally molecular hydrogen (H2). Articles including a first crystalline tantalum pentoxide and a second crystalline tantalum pentoxide on at least a portion of the first crystalline tantalum pentoxide, wherein the first tantalum pentoxide has a crystallographic orientation that is different than the crystallographic orientation of the second crystalline tantalum pentoxide, are also disclosed.

Abstract: Embodiments relate to a capacitor in a semiconductor device having high capacitance and a manufacturing method thereof. The capacitor includes a bottom electrode over a substrate, a dielectric layer stacked over the bottom electrode and including a first dielectric layer having a thickness of about 30 ?±2 ?, a second dielectric layer having a thickness of about 100 ?±5 ?, and a third dielectric layer having a thickness of about 30 ?±2 ?, and a top electrode over the dielectric layer. Since dielectric layers having great band gaps are deposited over and under the top and bottom of the dielectric layer having a small band gap, the electric stability and leakage current characteristic are improved. The capacitor may have a high capacitance of 8 fF or above, and may be used for semiconductor devices, for example in development of high technology DRAM and CMOS devices.

Abstract: The present disclosure relates to the deposition of conductive titanium oxide films by atomic layer deposition processes. Amorphous doped titanium oxide films are deposited by ALD processes comprising titanium oxide deposition cycles and dopant oxide deposition cycles and are subsequently annealed to produce a conductive crystalline anatase film. Doped titanium oxide films may also be deposited by first depositing a doped titanium nitride thin film by ALD processes comprising titanium nitride deposition cycles and dopant nitride deposition cycles and subsequently oxidizing the nitride film to form a doped titanium oxide film. The doped titanium oxide films may be used, for example, in capacitor structures.

Abstract: A capacitor insulating film includes a laminated structure in which aluminum oxide films and titanium dioxide films are alternately laminated, wherein the titanium dioxide films each have a rutile crystal structure, and the ratio of the total thickness of the aluminum oxide films to the total thickness of the laminated structure ranges from 3 to 8%.

Abstract: A method of manufacturing a sensor for in vivo applications includes the steps of providing two wafers of an electrically insulating material. A recess is formed in the first wafer, and a capacitor plate is formed in the recess of the first wafer. A second capacitor plate is formed in a corresponding region of the second wafer, and the two wafers are affixed to one another such that the first and second capacitor plates are arranged in parallel, spaced-apart relation.

Abstract: A digital variable capacitor package is provided as having a ground plane disposed on predetermined portion of the top surface of a substrate. An elongated signal electrode may also be disposed on the substrate and including a first end defining an input and a second end extending to a substantially central region of the top surface of the substrate. This elongated signal electrode is disposed to be electrically isolated from the ground plane. A number of elongated cantilevers are disposed on the substrate and each include first ends coupled to the second end of the signal electrode and each further include second ends suspended over different predetermined portions of the ground plane. In operation, one or more of the cantilevers may be actuated to move portion thereof into close proximity to the ground plane for providing one or more discrete capacitance values.

Abstract: A light emitting diode (LED) and a method of making the same are disclosed. The present invention uses a metal layer of high conductivity and high reflectivity to prevent the substrate from absorbing the light emitted. This invention also uses the bonding technology of dielectric material thin film to replace the substrate of epitaxial growth with high thermal conductivity substrate to enhance the heat dissipation of the chip, thereby increasing the performance stability of the LED, and making the LED applicable under higher current.

Abstract: A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield comprises a nitride. Etching is conducted within the opening through the nitride-comprising shield. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode. Other aspects and implementations are contemplated.

Abstract: The present invention relates to an enantioselective capacitive sensor, its manufacture and use and to devices comprising such sensors.

Abstract: Methods for forming ruthenium films and semiconductor devices such as capacitors that include the films are provided.

Abstract: Methods of forming a roughened metal surface on a substrate are provided, along with structures comprising such roughened surfaces. In preferred embodiments roughened surfaces are formed by selectively depositing metal or metal oxide on a substrate surface to form discrete, three-dimensional islands. Selective deposition may be obtained, for example, by modifying process conditions to cause metal agglomeration or by treating the substrate surface to provide a limited number of discontinuous reactive sites. The roughened metal surface may be used, for example, in the manufacture of integrated circuits.

Abstract: An automotive mirror assembly includes a mirror and transparent substrate adjacent to the mirror. The patterned coating is attached to transparent substrate and defines at least part of capacitive element. A capacitance sensor is in communication with the patterned coating thereby allowing capacitance changes induced in the patterned coating to be monitored.

Abstract: Provided are processes for the manufacture of capacitors. It is found that by using a nickel foil as the substrate and one electrode of the capacitor and by controlling the oxygen partial pressure in the range of 10?8 to 10?10 atmospheres during the crystallization heat treatment of the barium titanate, the leakage current can be maintained at adequate values without a reoxygenation step.

Abstract: Disclosed are a method of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A dielectric precursor layer and the base metal foil are prefired at a prefiring temperature in the range of 350 to 650° C. in a moist atmosphere that also comprises a reducing gas. The prefired dielectric precursor layer and base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C. in an atmosphere having an oxygen partial pressure of less than about 10?6 atmospheres to produce a dielectric. The area of the capacitor made according to the disclosed method may be greater than 10 mm2, and subdivided to create a multiple individual capacitor units that may be embedded in printed wiring boards. The dielectric is typically comprised of crystalline barium titanate or crystalline barium strontium titanate.

Abstract: A method of fabricating an electronic device includes selectively forming a glass layer on a ceramic substrate by printing, baking the glass layer, and forming a capacitor on the glass layer, the capacitor including metal electrodes and a dielectric layer interposed between the metal electrodes.

Abstract: A method for manufacturing a dielectric element including the steps of: preparing a lower electrode; forming a dielectric on the lower electrode to fabricate a first laminated structure; annealing the first laminated structure; forming an upper electrode on a dielectric film to fabricate a second laminated structure; and annealing the second laminated structure under a reduced pressure atmosphere at a temperature of 150° C. or higher.

Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

Abstract: A capacitor is disclosed that is formed as part of an integrated circuit (IC) fabrication process. The capacitor generally comprises a top conductive plate, a capacitor dielectric and a bottom conductive plate that respectively comprise a patterned layer of tantalum nitride TaN, a layer of a nitride based material and a layer of patterned polysilicon.

Abstract: A display substrate in accordance with one or more embodiments includes a first line pattern, a first insulation layer, a second line pattern, a color filter layer and a pixel electrode, which are formed on a substrate. The first line pattern includes a gate line and a light-blocking layer. The light-blocking layer has a first opening portion formed in a storage capacitor region. The first insulation layer is formed on the substrate having the first line pattern. The second line pattern is formed on the first insulation layer. The color filter layer is formed on the substrate having the second line pattern, and has a second opening portion overlapping with the storage electrode. The pixel electrode is formed on the substrate having the color filter layer. Thus, short circuits between the storage electrode and the pixel electrode may be prevented.

Abstract: A porous metal thin film formed from aluminum has a film structure in which domains having an average diameter of 200 nm or more, and 500 nm or less and being formed through aggregation of a plurality of grains having an average grain diameter of 50 nm or more, and 160 nm or less are distributed discretely at an average distance of 5 nm or more, and 40 nm or less, wherein the area occupied by the above-described domains is 60% or more, and 90% or less in a cross-section in any direction of the porous metal thin film.

Abstract: A capacitor forming method includes forming an electrically conductive support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 25 at % carbon. Another capacitor forming method includes forming a support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 20 at % carbon. The support material has a thickness and the opening has an aspect ratio 20:1 or greater within the thickness of the support material.