Condenser Or Capacitor Patents (Class 427/79)
  • Patent number: 6333066
    Abstract: A method for forming a PZT (lead zirconate titanate: Pb(ZrxTi1−x)O3) thin film using a seed layer is provided. In the method for forming a PZT thin film, PZT is grown on a PbO seed layer or a PZT seed layer of a perovskite phase formed by injecting excess Pb. The PbO seed layer or the PZT seed layer of a perovskite phase facilitates creation of perovskite PZT nuclei, thereby growing small and uniform PZT grains consisting of a perovskite phase.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: December 25, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dae-sig Kim
  • Patent number: 6331325
    Abstract: A semiconductor device and process for making the same are disclosed which incorporate boron, which has been found to be substantially insoluble in BST, into a BST dielectric film 24. Dielectric film 24 is preferably disposed between electrodes 18 and 26 (which preferably have a Pt layer contacting the BST) to form a capacitive structure with a relatively high dielectric constant and relatively low leakage current. Boron included in a BST precursor may be used to form boron oxide in a second phase 30, which is distributed in boundary regions between BST crystals 28 in film 24. It is believed that the inclusion of boron allows for BST grains of a desired size to be formed at lower temperature, and also reduces the leakage current of the capacitive structure.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: December 18, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Bernard M. Kulwicki, Robert Tsu
  • Patent number: 6326052
    Abstract: A ceramic capacitor having an improved electrode soldering performance, little or no diffusion of solder even in the case of being used under a high temperature environment and a reduced characteristic deterioration is provided. The dry plating electrodes have a three-layer structure. First layers of the electrodes are respectively provided on both surfaces of a ceramic element assembly and made of any one or more of Cu, Ni-Cu alloy and Zn. Second layers of the electrodes are respectively provided on the surfaces of the first layers and made of a material different from the material of the first layers and any one or more of Cr, Ni-Cr alloy, Fe-Cr alloy, Co-Cr alloy, Ti, Zn, Al, W, V and Mo. Third layers of the electrodes are respectively provided on the surfaces of the second layers and made of any one or more of Cu, Ni-Cu alloy, Ag and Au.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: December 4, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsuru Nagashima, Kazuhiro Yoshida, Masanobu Kishi, Makoto Murata
  • Patent number: 6319542
    Abstract: A preferred embodiment of this invention comprises a conductive lightly donor doped perovskite layer (e.g. lightly La doped BST 34), and a high-dielectric-constant material layer (e.g. undoped BST 36) overlaying the conductive lightly donor doped perovskite layer. The conductive lightly donor doped perovskite layer provides a substantially chemically and structurally stable electrical connection to the high-dielectric-constant material layer. A lightly donor doped perovskite generally has much less resistance than undoped, acceptor doped, or heavily donor doped HDC materials. The amount of donor doping to make the material conductive (or resistive) is normally dependent on the process conditions (e.g. temperature, atmosphere, grain size, film thickness and composition). This resistivity may be further decreased if the perovskite is exposed to reducing conditions.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: November 20, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Bruce Gnade
  • Publication number: 20010038881
    Abstract: A dendritic sponge which is directionally-grown on a substrate material has a high surface to volume ratio and is suitable for forming anodes for highly efficient capacitors. A dielectric film is formed on the sponge surface by oxidizing the surface. In a preferred embodiment, the dielectric is grown on titanium sponge and is doped with oxides of Ca, Mg, Sr, Be, or Ba to improve the film's dielectric constant or with higher valent cations, such as Cr6+, V5+, Ta5+, Mo6+, Nb5+, W6+, and P5+, to reduce the oxygen vacancy concentration and leakage current of the dielectric film. A capacitor formed from the sponge includes a cathode electrolyte which serves as an electrical conductor and to repair the dielectric film by re-oxidizing the anode surface at areas of local breakdown. Sponges of titanium, tantalum, and aluminum form efficient dielectric films. In another embodiment, sponges of elements which do not form efficient dielectric films are coated with a dielectric material.
    Type: Application
    Filed: March 16, 2001
    Publication date: November 8, 2001
    Inventors: Gerhard Welsch, Donald McGervey
  • Publication number: 20010030352
    Abstract: In a method for forming a trench capacitor a first layer of silicon oxide is deposited in a storage trench and a layer of silicon is deposited over the first layer by a chemical vapor deposition process. A layer of an oxidizable metal is deposited over the layer of silicon. The layer of silicon and the layer of the oxidizable metal are subsequently oxidized to form a layer of silicon oxide and metal oxide.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 18, 2001
    Inventors: Alexander Ruf, Wilhelm Kegel, Wolfram Karcher, Martin Schrems
  • Patent number: 6303231
    Abstract: The invention discloses a coating solution for use in forming Bi-based ferroelectric thin films containing Bi, metallic element A (at least one selected from the group consisting of Bi. Pb, Ba, Sr, Ca, Na, K and rare earth elements) and metallic element B (at least one selected from the group consisting of Ti, Nb, Ta, W, Mo, Fe, Co and Cr), wherein it contains metal alkoxides of Bi, metallic element A and metallic element B respectively, and contains composite metal alkoxides formed by any two or more of said metal alkoxides; and a ferroelectric thin film, a ferroelectric capacitor and a ferroelectric memory formed by the use of such coating solution, and a method for producing the same.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: October 16, 2001
    Assignees: Tokyo Ohka Kogyo Co., Ltd., Oki Electric Industry Co., Ltd.
    Inventors: Yoshihiro Sawada, Akira Hashimoto, Tetsuya Osaka, Ichiro Koiwa, Juro Mita, Yoshinori Maeno, Yukihisa Okada, Hiroyo Kato
  • Publication number: 20010026850
    Abstract: A deposition process for coating a substrate with an ultrasonically generated aerosol spray of a pseudocapacitive material, or a precursor thereof, contacted to a substrate heated to a temperature to instantaneously solidify the pseudocapacitive material or convert the precursor to a solidified pseudocapacitive metal compound, is described. The ultrasonic aerosol droplets are much smaller in size than those produced by conventional processes and the heated substrate minimizes the possibility of contamination, thereby providing the present coating having an increased surface area. When the coated substrate is an electrode in a capacitor, a greater surface area results in an increased electrode capacitance.
    Type: Application
    Filed: May 1, 2001
    Publication date: October 4, 2001
    Inventors: Ashish Shah, Barry C. Muffoletto
  • Publication number: 20010021411
    Abstract: A deposition process for coating a substrate with an ultrasonically generated aerosol spray of a pseudocapacitive material, or a precursor thereof, contacted to a substrate heated to a temperature to instantaneously solidify the pseudocapacitive material or convert the precursor to a solidified pseudocapacitive metal compound, is described. The ultrasonic aerosol droplets are much smaller in size than those produced by conventional processes and the heated substrate minimizes the possibility of contamination, thereby providing the present coating having an increased surface area. When the coated substrate is an electrode in a capacitor, a greater surface area results in an increased electrode capacitance.
    Type: Application
    Filed: March 14, 2001
    Publication date: September 13, 2001
    Inventors: Ashish Shah, Barry C. Muffoletto
  • Publication number: 20010016229
    Abstract: The ferroelectric thin film is formed from a liquid composition by the sol-gel processing which has a large amount of polarization, remarkably improved retention and imprint characteristics as compared with a PZT, minute grains and fine film quality, homogeneous electrical properties, and low leakage currents and which is suited for nonvolatile memories. The ferroelectric thin film of the present invention comprising a metal oxide represented by the general formula: (PbV CaW SrX LaY)(ZrZ Ti1−Z)O3, wherein 0.9≦V≦1.3, 0≦W≦0.1, 0≦X≦0.1, 0<Y≦0.1, 0<Z≦0.
    Type: Application
    Filed: January 17, 2001
    Publication date: August 23, 2001
    Inventors: Shan Sun, Thomas Domokos Hadnagy, Tom E. Davenport, Hiroto Uchida, Tsutomu Atsuki, Gakuji Uozumi, Kensuke Kegeyama, Katsumi Ogi
  • Publication number: 20010016226
    Abstract: This invention relates to a method for improving the chemical and electrical performance characteristics of a dielectric material especially one with high dielectric constant. The method comprises the steps of first obtaining a high dielectric constant material, the material having a degraded upper surface reduced dielectric constant and then modifying the surface chemistry of said upper surface by reacting said upper surface with a reactant. The reaction enables removal of the degraded layer. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.
    Type: Application
    Filed: April 2, 2001
    Publication date: August 23, 2001
    Applicant: International Business Machines Corporation
    Inventors: Wesley Natzle, Peter R. Duncombe, Rajarao Jammy, David E. Kotecki, Robert B. Laibowitz, Chienfan Yu
  • Patent number: 6270835
    Abstract: Thin layer capacitors are formed from a first flexible metal layer, a dielectric layer between about 0.03 and about 2 microns deposited thereon, and a second flexible metal layer deposited on the dielectric layer. The first flexible metal layer may either be a metal foil, such as a copper, aluminum, or nickel foil, or a metal layer deposited on a polymeric support sheet. Depositions of the layers is by or is facilitate by combustion chemical vapor deposition or controlled atmosphere chemical vapor deposition.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: August 7, 2001
    Assignee: MicroCoating Technologies, Inc.
    Inventors: Andrew T. Hunt, John S. Flanagan, George A. Neuman
  • Patent number: 6270613
    Abstract: An electrode is formed on a chip-like electronic part of the type having a central axis, a polygonal cross section as viewed in a plane which is perpendicular to the central axis, a plurality of side surfaces extending in respective planes which are generally parallel to the central axis, and a pair of end surfaces extending generally parallel to the central axis, each adjacent pair of side surfaces meeting along a respective edge of the chip-like electronic part. The electrode is formed by applying a first band of conductive material to at least one of the side surfaces and applying a second band of conductive material to the remaining side surface(s) in such a manner that the first and second bands meet at respective ones of the edges and together form a continuous band of conductive material extending around the outer periphery of the chip-type electronic part.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: August 7, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tadahiro Nakagawa, Makoto Fukuda
  • Publication number: 20010006838
    Abstract: A ruthenium (Ru) film is formed on a substrate as part of a two-stage methodology. During the first stage, the Ru film is formed on the substrate in a manner in which the Ru nucleation rate is greater than the Ru growth rate. During the second stage, the Ru film is formed on the substrate in a manner in which the Ru growth rate is greater than the Ru nucleation rate.
    Type: Application
    Filed: December 21, 2000
    Publication date: July 5, 2001
    Inventors: Seok-Jun Won, Cha-Young Yoo
  • Patent number: 6225133
    Abstract: After an interlayer insulating film is deposited on a silicon substrate, a contact hole or contact holes is or are formed at a desired position(s) and, then, after a polysilicon layer is deposited and the contact hole(s) is (are) embedded, the surface of the polysilicon layer is flattened by chemical and mechanical polishing using at least one of piperazine or colloidal silica slurry, and a barrier metal film 4 and a highly dielectric thin film 5 are deposited and processed to a desired size. Finally, an Al/TiN film 6 adapted for the upper electrode is formed. The leak current of the thin film capacitor which is obtained according to this method can be greatly reduced.
    Type: Grant
    Filed: September 1, 1994
    Date of Patent: May 1, 2001
    Assignee: NEC Corporation
    Inventors: Shintaro Yamamichi, Hirohito Watanabe, Yoichi Miyasaka
  • Patent number: 6207234
    Abstract: A method of creating a multilayer ceramic component of the present invention is used to spontaneously create vias between adjacent conductor layers in a multilayer inductive component. After a first conductive layer is printed, a via dot is printed on the first conductive layer. Next, a controlled thickness of ceramic slurry is cast over the previous ceramic layer, first conductive pattern, and the via dot. The physical/chemical forces between the via dot and the ceramic slurry expel the slurry in the proximity of the top surface of the via dot. When the ceramic slurry dries, the ceramic cast leaves vias filled with conductors from the preprinted via dots. This process is repeated until a desired number of conductive layers are formed.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: March 27, 2001
    Assignee: Vishay Vitramon Incorporated
    Inventor: John J. Jiang
  • Patent number: 6204069
    Abstract: A preferred embodiment of this invention comprises a conductive lightly donor doped perovskite layer (e.g. lightly La doped BST 34), and a high-dielectric-constant material layer (e.g. undoped BST 36) overlaying the conductive lightly donor doped perovskite layer. The conductive lightly donor doped perovskite layer provides a substantially chemically and structurally stable electrical connection to the high-dielectric-constant material layer. A lightly donor doped perovskite generally has much less resistance than undoped, acceptor doped, or heavily donor doped HDC materials. The amount of donor doping to make the material conductive (or resistive) is normally dependent on the process conditions (e.g. temperature, atmosphere, grain size, film thickness and composition). This resistivity may be further decreased if the perovskite is exposed to reducing conditions.
    Type: Grant
    Filed: October 3, 1994
    Date of Patent: March 20, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan, Bruce Gnade
  • Patent number: 6200629
    Abstract: A method for manufacturing a capacitor includes the steps of forming a dielectric layer over a substrate, and then forming at least one contact within the dielectric layer. Next, a first metal layer is formed on the dielectric layer and an electromigration layer is formed on the first metal layer. A patterned capacitor dielectric layer is formed on the electromigration layer in a capacitor area. A second metal layer is then formed over the substrate and defined; a portion of second metal serving as an upper electrode of the capacitor is therefore formed on the electromigration layer. A portion of the second metal layer on the contact serves as a portion of the via of the interconnects. The electromigration layer is self-alignedly patterned when patterning the second metal layer, and a portion of the electromigration layer serves as a lower electrode of the capacitor. The electromigration layer on the contact in the via area is used to prevent electromigration.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: March 13, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Shih-Wei Sun
  • Patent number: 6174606
    Abstract: A conductive composite is described containing silver particles and a polymer which covers each silver particle and wherein a heterocyclic organic compound containing nitrogen such as benzotriazole (BTA) is present to reduce Ag dissolution and ion mobility by forming a water insoluble complex with the Ag ion. The invention overcomes the problem of silver dissolution or corrosion a conductive composite as a result of normal high Ag ion mobility in the presence of moisture and an electric field.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: January 16, 2001
    Assignee: International Business Machine Corporation
    Inventors: Vlasta Agnes Brusic, Judith Marie Roldan, Ravi F. Saraf
  • Patent number: 6171644
    Abstract: The present invention aims to present an electronic component which is free from the fear of sneaking-in of water etc. from the edge of electrode, by covering the electrode edge with resin. For the purpose, external electrodes (3) are formed at both ends of varistor (1) comprised of ceramic sheet (1a) and internal electrode (2) laminated alternately, and then, a within-the-surface insulation layer (30) is formed by covering the porous surface inside the varistor (1), or filling the Porosity, with silicone resin, and an outside-the-surface insulation layer (31) is formed covering the surface of varistor (1) and the edge of external electrode (3).
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: January 9, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Riho Jinno, Kazuyuki Nakamura
  • Patent number: 6154357
    Abstract: The invention relates To a process for the impregnation of electrical capacitors which includes performing the impregnation of the coil winding with a dielectric fluid, eliminating the excess of the dielectric fluid, filling the casing containing the impregnated coil winding with a gelable composition and the dielectric fluid for impregnating the coil winding and gelling the gelable composition.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: November 28, 2000
    Assignee: Elf Atochem S.A.
    Inventor: Noelle Berger
  • Patent number: 6146906
    Abstract: In a method for manufacturing a capacitor including a lower electrode, a ferroelectric layer formed on the lower electrode, and an upper electrode formed on the ferroelectric layer, at least one of the lower and upper electrodes is made of laminated metal and conductive oxide. The laminated metal and conductive oxide are deposited by a DC magnetron reactive sputtering process using one metal target and mixture gas including oxygen wherein a ratio of oxygen in the mixture gas and a substrate temperature are definite and a DC input power is changed depending on the metal and the conductive oxide.
    Type: Grant
    Filed: September 16, 1999
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventors: Naoya Inoue, Yoshihiro Hayashi
  • Patent number: 6141846
    Abstract: Thin, smooth conductive layers for internal electrodes of multilayer ceramic capacitors are produced by a method including the steps of forming a conductive paste layer on a green ceramic sheet with a conductive paste by screen printing so as to have a center-line mean roughness of not more than 1.0 .mu.m, a ten-point mean roughness of not more than 5.0 .mu.m and a thickness of metal in the dried conductive paste layer of 0.5 to 2.0 .mu.m. The conductive paste consists essentially of 50 to 70% of an organic vehicle and 30 to 50% of a metal powder with a particle size range of 0.1 to 1.5 .mu.m and a mean particle size of 0.3 to 1.0 .mu.m.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: November 7, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Hisashi Miki
  • Patent number: 6136372
    Abstract: Conductive polymers are prepared from a stabilized solution containing a monomer, an Fe(III) oxidizing agent, and a mixed solvent. The solvents are selected to stabilize the Fe(III) oxidizing agent and monomer in solution while allowing highly conducting polymers to be produced upon evaporating the lower-boiling solvent. The higher-boiling solvent does not appreciably complex with Fe(III), while the lower-boiling solvent forms a weak complex with Fe(III). The mixed-solvent system of the present invention may be used for preparing a conductive polymer counter electrode in a solid tantalum capacitor by polymerizing the monomer inside a porous tantalum pellet.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: October 24, 2000
    Assignee: Kemet Electronics Corporation
    Inventors: Philip M. Lessner, Tsung-Yuan Su, Randolph S. Hahn, Veeriya Rajasekaran
  • Patent number: 6126998
    Abstract: A process for producing a ceramic layer containing Bi, in particular having ferroelectric, dielectric or superconducting properties, includes using only an organic acid C.sub.n H.sub.2n+1 COOH wherein n=0, 1 or 2 and, where appropriate, water, as a solvent for the precursor containing Bi.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: October 3, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Frank Hintermaier, Carlos Mazure-Espejo
  • Patent number: 6117482
    Abstract: An object is to provide a method of monitoring a CVD liquid source for forming a thin film having a high dielectric constant, which allows detection of the concentration abnormality and the deterioration of the CVD liquid source. First, the CVD liquid source used as a sources of chemical vapor deposition is prepared by dissolving an organometallic compound of dipivaloyolmethane type in an organic solvent. Secondly, a spectroscopy of the CVD liquid source is performed.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: September 12, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takaaki Kawahara, Tsuyoshi Horikawa, Masayoshi Tarutani, Mikio Yamamuka
  • Patent number: 6090435
    Abstract: The electronic component of the present invention includes: an element having an internal electrode therein; an external electrode formed on an end portion of the element where an end face of the internal electrode is exposed; and a protection layer formed on the entire surface of the element except for the end portion of the element, wherein the protection layer is made of a metal oxide.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: July 18, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Iwao Ueno, Yasuo Wakahata
  • Patent number: 6086951
    Abstract: A method of forming metallic capacitor. The method includes forming a lower electrode for forming the capacitor and a metal conductive line over an inter-layer dielectric such that there are gaps between and on the sides of the lower electrode and the metal conductive line. Thereafter, a first oxide layer is formed that fills the gap, and then a second oxide layer is formed over the inter-layer dielectric. The second oxide layer is later patterned to form a cap oxide layer having an opening that exposes a portion of the lower electrode. Subsequently, a thin dielectric layer is formed over the lower electrode and the cap oxide layer. Finally, an upper electrode is formed over the thin dielectric layer filling the opening.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: July 11, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Chen-Bin Lin, Cheng-Hui Chung, Yu-Ju Liu
  • Patent number: 6083614
    Abstract: The present invention is related to a method of producing a nanoporous body containing nanodiamonds and having a desired shape, comprising the steps of: forming an intermediate body having the desired shape of nanodiamond particles having a maximum size of 10 nm, exposing said body to a gaseous hydrocarbon or a mixture of hydrocarbons at a temperature exceeding the decomposition temperature for the hydrocarbon or the hydrocarbons. In accordance with the invention the intermediate body is formed with a porosity of 50-80 vol. %, and during the heat treatment of the intermediate body with hydrocarbon or hydrocarbons, the mass of the body is increased by 50% at the most. The present invention also relates to a nanoporous body produced by the method and to uses of such a body.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: July 4, 2000
    Assignee: Alfar International, Inc.
    Inventors: Sergey Konstantinovitch Gordeev, Sergey Germanovich Zhukov, Peter Ivanovietc Belobrov, Andrej Nicolajvietc Smolianinov, Juri Pavlovietc Dikov
  • Patent number: 6084766
    Abstract: A film-forming paste is applied to a substrate through a screen at least in part supported by raised spaced ribs to fill spacing on the substrate defined by the ribs. The film is then cured to form a patterned electrode with intervening spacing for accumulation of gas during operation of the electrode in an ultracapacitor.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: July 4, 2000
    Assignee: General Electric Company
    Inventors: Elihu Calvin Jerabek, Sean Francis Mansfield
  • Patent number: 6084767
    Abstract: An ultracapacitor includes two solid, nonporous current collectors, two porous electrodes separating the collectors, a porous separator between the electrodes and an electrolyte occupying the pores in the electrodes and separator. The porous separator layer comprises an amorphous fumed silica layer coated onto at least one of the electrodes.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: July 4, 2000
    Assignee: General Electric Company
    Inventors: James Day, Chang Wei
  • Patent number: 6072692
    Abstract: An electric double layer capacitor including an electrode containing a carbonaceous material having a specific surface area of at least 500 m.sup.2 /g, and an organic electrolytic solution capable of forming an electric double layer at the interface with the electrode, wherein the electrode is bonded to a current collector via a carbon type conductive adhesive layer containing a conductive carbon material and a polyimide resin.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: June 6, 2000
    Assignee: Asahi Glass Company, Ltd.
    Inventors: Kazuya Hiratsuka, Takeshi Morimoto, Manabu Suhara, Takeshi Kawasato, Manabu Tsushima
  • Patent number: 6071551
    Abstract: A plastic film for use in a film capacitor is made by coating a backing film with a layer of polymerizable compounds which are dried but not reacted on the backing film. To this coating a metal layer is applied and the backing film with the metal layer thereon is superposed with other portions of such film and backing layers and pressed at a reaction temperature capable of cross-linking the compounds and effecting polymerization to yield a capacitor of high resistance to moisture.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: June 6, 2000
    Assignee: Aluminium Feron GmbH & Co.
    Inventor: Lothar Hols
  • Patent number: 6048618
    Abstract: The present invention relates to the use of insulating fluids, selected from the group consisting of aliphatic esters, alkylbenzenes, crosslinkable compositions comprising at least one polydiene polyol, at least one polyisocyanate and at least one chemically inert liquid charge, for the impregnation of the wound coils of self-healing capacitors.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: April 11, 2000
    Assignee: Elf Atochem S.A.
    Inventors: Noelle Berger, Pierre Jay
  • Patent number: 6037235
    Abstract: A method for improving the interface between a silicon nitride film and a silicon surface is described. According to the present invention a silicon nitride film is formed on a silicon surface of a substrate. While said substrate is heated the silicon nitride film is exposed to an ambient comprising hydrogen (H.sub.2). In a prefered embodiment of the present invention the ambient comprises H.sub.2 and N.sub.2.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: March 14, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Pravin K. Narwankar, Randall S. Urdahl, Turgut Sahin, Wong-Cheng Shih
  • Patent number: 6027761
    Abstract: A method for manufacturing a capacitor, applied to a memory unit having a substrate forming thereon a dielectric layer, includes the steps of a) forming a sacrificial layer over the dielectric layer, b) partially removing the sacrificial layer and the dielectric layer to form a contact window, c) forming a first conducting layer over the sacrificial layer and in the contact window, d) partially removing the first conducting layer and the sacrificial layer to expose a portion of the sacrificial layer and retain a portion of the first conducting layer, e) forming a second conducting layer alongside the portion of the first conducting layer and the portion of the sacrificial layer, f) removing the portion of the sacrificial layer to expose the dielectric layer, g) forming a third conducting layer over surfaces of the portion of the first conducting layer, the second conducting layer, and the dielectric layer, and h) partially removing the third conducting layer while retaining a portion of the third conducting l
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: February 22, 2000
    Assignee: Mosel Vitelic Inc.
    Inventor: Wei-Shang King
  • Patent number: 6025020
    Abstract: Amorphous, highly dispersed ruthenium oxide having a high energy storage capacity may be prepared using high surface area carbon as carbon powder or as carbon fibers as a template for the ruthenium oxide. The process avoids the disadvantages of a sol-gel process, and utilizes deposition of a ruthenium source within the pores of carbon fibers dispersed in a cellulose matrix. The ruthenium source subsequently is converted to amorphous ruthenium oxide hydrate by heating in a steam atmosphere containing at least 30 weight percent water at temperatures up to about 500.degree. C.
    Type: Grant
    Filed: October 8, 1997
    Date of Patent: February 15, 2000
    Inventors: Zheng Chen, Millard Franklin Rose
  • Patent number: 6023407
    Abstract: An electronic component structure is proposed, wherein an interposer thin film capacitor structure is employed between an active electronic component and a multilayer circuit card. A method for making the interposer thin film capacitor is also proposed. In order to eliminate fatal electrical shorts in the overlying thin film regions that arise from pits, voids, or undulations on the substrate surface, a thick first metal layer, on the order of 0.5-10 .mu.m thick, is deposited on the substrate upon which the remaining thin films, including a dielectric film and second metal layer, are then applied. The first metal layer includes of Pt or other electrode metal, or a combination of Pt, Cr, and Cu metals, and a diffusion barrier layer. Additional Ti layers may be employed for adhesion enhancement. The thickness of the first metal layers are approximately: 200 A for the Cr layer; 0.5-10 .mu.m for the Cu layer; 1000 A-5000 A for the diffusion barrier; and 100 A-2500 A for a Pt layer.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: February 8, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mukta S. Farooq, Shaji Farooq, Harvey C. Hamel, John U. Knickerbocker, Robert A. Rita, Herbert I. Stoller
  • Patent number: 6014310
    Abstract: A composite dielectric material useful in advanced memory applications such as dynamic random access memory (DRAM) cells is provided. The composite dielectric material of the present invention includes a mixed oxide such as TiO.sub.2 or Ta.sub.2 O.sub.5 that is interdiffused into a Si.sub.3 N.sub.4 film. Capacitors including the composite dielectric material of the present invention are also disclosed.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gary Bela Bronner, Stephan Alan Cohen, David Mark Dobuzinsky, Jeffrey Peter Gambino, Herbert Lei Ho, Karen Popek Madden
  • Patent number: 6010743
    Abstract: The invention relates to a process for impregnation of electrical capacitors which consists in performing the impregnation of the coil winding with a dielectric fluid and then eliminating the excess of the said fluid and in filling the casing containing the said impregnated coil winding with a gelable composition including the said dielectric fluid for impregnation of coil winding.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: January 4, 2000
    Assignee: Elf Atochem S.A.
    Inventor: Noelle Berger
  • Patent number: 5993895
    Abstract: A method for densifying a dielectric antiferroelectric material includes the steps of adding a compound which includes lithium to the dielectric material to create a mixture thereof. Thereafter, the mixture is heated to a temperature of not greater than about 1100.degree. C. for a predetermined period to densify the mixture. It is preferred that the lithium compound be a lithium salt and that the dielectric material comprise a PLZT composition.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: November 30, 1999
    Assignee: The Penn State Research Foundation
    Inventors: Sei-Joo Jang, Joseph P. Dougherty, Wesley Hackenberger, MingFang Song, Steven Perini, Beth Jones
  • Patent number: 5980977
    Abstract: The present invention concerns a process to produce a high surface area niobium oxynitride, tantalum oxynitride, vanadium oxynitride, zirconium oxynitride, titanium oxynitride or molybdenum oxynitride coated substrate for use as an electrical energy storage component in a capacitor or a battery configuration.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: November 9, 1999
    Assignee: Pinnacle Research Institute, Inc.
    Inventors: Charles Z. Deng, Keh Chi Tsai, Dania Ghantous
  • Patent number: 5976625
    Abstract: A method for forming a dielectric oxide layer on selected areas of a substrate is disclosed. The dielectric oxide layer is formed on selected areas of the substrate using a sol process. The substrate has an area of a first material and an area of a second material which is different from the first. The first material is coated with a layer of a first compound. The layer of the first compound has a hydrophobic top surface. The second material is coated with a layer of a second compound. The layer of the second compound has a hydrophilic top surface. A layer of hydrous oxide is formed over the second compound by applying an aqueous sol solution on the surface of the substrate. The substrate is then heated to remove the first compound and the second compound from the surface of the substrate. Thereafter, the substrate with the layer of hydrous oxide thereon, is sintered to form the dielectric oxide layer.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: November 2, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Suhas Dattatreya Bhandarkar, Edwin Arthur Chandross, David Wilfred Johnson, Jr.
  • Patent number: 5968209
    Abstract: Cathode and anode sides of a plurality of solid electrolytic capacitors are connected by simultaneous electric welding. The welding step is effected to connect an anode lead of a lead frame to the anode electrode of a capacitor body and simultaneously connect a cathode lead of the lead frame to the cathode conductor layer of an adjacent capacitor body. The welding electrode for the cathode lead exerts moderate force to the capacitor bodies using a spring function of the capacitor lead. The simultaneous welding for the adjacent capacitor bodies and the moderate force prevent electrical and mechanical damages of the insulator layer of the solid electrolytic capacitors during the welding.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: October 19, 1999
    Assignee: NEC Corporation
    Inventor: Takashi Kono
  • Patent number: 5962069
    Abstract: A liquid precursor containing a metal is applied to a first electrode, dried in air at a first temperature of 160.degree. C. and then a second temperature of 260.degree. C., RTP baked at a temperature of 300.degree. C. in oxygen, RTP baked at a temperature of 650.degree. C. in nitrogen, and annealed at a temperature of 800.degree. C. in nitrogen to form a strontium bismuth tantalate layered superlattice material. A second electrode is deposited and then the device is patterned to form a capacitor, and a second anneal is performed at a temperature of 800.degree. C. in nitrogen. Alternatively, the second anneal may be performed in oxygen at a temperature of 600.degree. C. or less. In this manner, a high electronic quality thin film of a layered superlattice material is fabricated without a high-temperature oxygen anneal.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: October 5, 1999
    Assignees: Symetrix Corporation, Siemens Aktiengesellschaft
    Inventors: Gunther Schindler, Walter Hartner, Carlos Mazure, Narayan Solayappan, Vikram Joshi, Gary F. Derbenwick
  • Patent number: 5952039
    Abstract: A method for manufacturing DRAM capacitor that utilizes a self-aligned operation to form a forked-shaped capacitor structure having dual trenches or a multiple of trenches. No additional masking steps are required, and the uneven surface produced by the method of this invention is able to increase the surface area of the lower electrode. Hence, a high capacitance for the DRAM capacitor is obtained and a high level integration of DRAM cells can be realized.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: September 14, 1999
    Assignee: United Microelectronics Corp.
    Inventor: Gary Hong
  • Patent number: 5952040
    Abstract: Nanosize powders with particle size smaller than the critical length for specific material properties are used to form the ceramic layers of passive electronic components. Ceramic substrates are coated with electrodes, which are then coated with a ceramic layer from a suspension, preferably a low viscosity suspension, of nanoscale powders. The ceramic layer is dried at low temperatures (preferably below 200 .degree. C.) and it is sintered to high density (preferably above 90%) at moderate temperatures (preferably low and less than 1,000 .degree. C.). Once sintered, an electrode layer is coated on top of the ceramic layer to yield an electrode/ceramic/electrode structure.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: September 14, 1999
    Assignee: Nanomaterials Research Corporation
    Inventors: Tapesh Yadav, Mark L. Yang
  • Patent number: 5950292
    Abstract: Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: September 14, 1999
    Assignee: Sandia Corporation
    Inventors: Duane B. Dimos, Terry J. Garino
  • Patent number: 5937493
    Abstract: A method of manufacturing a plurality of electronic multilayer components is disclosed in which each multilayer component comprises alternately stacked electrically conductive layers and electrically insulating layers, the electrically conductive layers being electrically connected in a periodically alternate arrangement to different edges of the multilayer component. The method comprises the steps of providing a substrate which is endowed with a regular pattern of surface protrusions on one face; depositing individual multilayer components into intervening spaces delimited by the protrusions; depositing electrically conductive layers for connection to a given edge of a multilayer component, wherein each connection occurs at an angle (.theta.) of less than 90.degree.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: August 17, 1999
    Assignee: U.S. Philips Corporation
    Inventor: Antonius J. M. Nellissen
  • Patent number: 5926362
    Abstract: A sealed capacitor, which may be hermetic, having a generally flat, planar geometry, is described The capacitor includes at least one electrode provided by a metallic substrate having a capacitive material contacted thereto. The coated substrate can provide at least one of the casing side walls itself or, be connected to the side wall. A most preferred form of the capacitor has the conductive substrate provided with the capacitive material formed from an ultrasonically generated aerosol.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: July 20, 1999
    Assignee: Wilson Greatbatch Ltd.
    Inventors: Barry C. Muffoletto, Rodney E. Stringham, Neal N. Nesselbeck, Ashish Shah, Donald H. Stephenson