Condenser Or Capacitor Patents (Class 427/79)
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Publication number: 20040058239Abstract: An electrode structure composed of a low resistance electrode film with good bonding properties on a current-collecting member surface, and manufacturing method for a battery and double-layer capacitor utilizing that element. An electrode structure is formed as follows: a mixed compound containing an electrode material, a binder and a solvent is coated on a current-collecting member surface, infrared radiation is directed onto the mixed compound, to vaporize the solvent, and to form an electrode film on the current-collecting member surface. This method relates to the electrode structure and a method for manufacturing a battery and an electrical double-layer capacitor.Type: ApplicationFiled: February 9, 2001Publication date: March 25, 2004Inventors: Takaya Sato, Tatsuo Shimizu
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Publication number: 20040053020Abstract: An object of the present invention is to provide a laminate for forming a capacitor layer for a printed wiring board which is capable of ensuring a higher capacitance and an inner layer core material using the laminate for example. In order to achieve this object, a material for forming a capacitor layer comprising a three-layered structure of an aluminum layer 2/a modified alumina barrier layer 3/an electrode copper layer 4 is used, such as a laminate 1a for forming a capacitor layer in which the above described modified alumina barrier layer 3 is obtained through subjecting one side of an aluminum plate or aluminum foil to an anodic treatment to form an alumina barrier layer as a uniform oxide layer and then subjecting the alumina material with the above described alumina barrier layer formed thereon to a boiling and modifying treatment in water and the above described modified aluminum barrier layer 3 is used as a dielectric layer.Type: ApplicationFiled: July 22, 2003Publication date: March 18, 2004Inventors: Yasuaki Mashiko, Hideshi Sekimori, Naotomi Takahashi
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Patent number: 6696138Abstract: A solid electrolytic capacitor comprises a porous valve acting metal having formed thereon a dielectric film and a solid electrolyte formed on the dielectric film. The solid electrolyte occupies from 10 to 95% of the space within a pore of the porous metal.Type: GrantFiled: November 26, 2002Date of Patent: February 24, 2004Assignee: Showa Denko K.K.Inventors: Atsushi Sakai, Ryuji Monden, Toru Sawaguchi, Katsuhiko Yamazaki, Yuji Furuta, Hideki Ohata
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Publication number: 20040018307Abstract: A thin film is formed using an atomic layer deposition process, by introducing a first reacting material including tantalum precursors and titanium precursors onto a substrate. A portion of the first reacting material is chemisorbed onto the substrate. Then, a second reacting material including oxygen is introduced onto the substrate. A portion of the second reacting material is also chemisorbed onto the substrate, to form an atomic layer of a solid material on the substrate. The solid material may be used as a dielectric layer of the capacitor and/or a gate dielectric layer of the transistor.Type: ApplicationFiled: February 21, 2003Publication date: January 29, 2004Inventors: In-Sung Park, Jeong-Hee Chung, Jae-Hyun Yeo
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Patent number: 6682772Abstract: A platinum deposition method uses a combination of an oxide adhesion layer and a high temperature thin film deposition process to produce platinum bottom electrodes for ferroelectric capacitors. The platinum bottom electrode is deposited onto a TiOx layer at temperatures between about 300 and 800° C. Deposition at high temperatures changes the platinum stress from compressive to tensile, increases platinum grain size, and provides a more thermally stable substrate for subsequent PZT deposition.Type: GrantFiled: April 24, 2000Date of Patent: January 27, 2004Assignees: Ramtron International Corporation, Ulvac Japan, Ltd.Inventors: Glen R. Fox, KouKou Suu
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Patent number: 6673388Abstract: A method of making a charge containing element including the steps of depositing and patterning a dielectric material on a surface wherein the dielectric material includes a metallo-organic component and a liquid component; and decomposing by laser light the deposited dielectric material to substantially evaporate the liquid component to cause the metallic portion of the metallo-organic component to react with oxygen causing the dielectric material to have charge-holding properties.Type: GrantFiled: April 27, 2001Date of Patent: January 6, 2004Assignee: Eastman Kodak CompanyInventors: Thomas N. Blanton, Syamal K. Ghosh, Donn B. Carlton, Dilip K. Chatterjee
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Patent number: 6673389Abstract: The present invention concerns the field of solid state capacitors and relates particularly to massed production methods for manufacturing solid state capacitors. The present invention seeks to provide a process simplification in order to provide an economic advantage.Type: GrantFiled: August 19, 2002Date of Patent: January 6, 2004Assignee: AVX LimitedInventor: David Huntington
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Patent number: 6663793Abstract: The present invention relates to a method for producing a low temperature 0-3 composite material, comprising the steps of providing a mixture, wherein the mixture comprises a liquid phase and a particulate phase and wherein the liquid phase comprises a reactive metal alkoxide; depositing the mixture on to a plastic substrate; and consolidating the mixture to provide a 0-3 composite material, wherein the 0-3 composite material is suitable for use as an electronic component.Type: GrantFiled: February 7, 2001Date of Patent: December 16, 2003Assignee: Sciperio, Inc.Inventors: Robert L. Parkhill, Steven M. Coleman, Edward T. Knobbe
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Patent number: 6641775Abstract: Methods for lowering processing and raw material costs are disclosed. Specifically, the use of nanostructured powders is disclosed for faster and lower sintering temperatures whereby electrodes currently employing platinum can be substituted with lower melting point metals and alloys.Type: GrantFiled: December 3, 2001Date of Patent: November 4, 2003Assignee: NanoProducts CorporationInventors: Anthony Vigliotti, Tapesh Yadav, Clayton Kostelecky, Carrie Wyse
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Patent number: 6638378Abstract: A passive electrical article comprising (a) a first self-supporting substrate having two opposing major surfaces, (b) a second self-supporting substrate having two opposing major surfaces, and (c) an electrically insulating or electrically conducting layer comprising a polymer and having a thickness ranging from about 0.5 to about 10 &mgr;m between the first and second substrate, wherein a major surface of the first substrate in contact with the layer and a major surface of the second substrate in contact with the layer have an average surface roughness ranging from about 10 to about 300 nm and wherein a force required to separate the first and second substrates of the passive electrical article at a 90 degree peel angle is greater than about 3 pounds/inch (about 0.Type: GrantFiled: July 3, 2001Date of Patent: October 28, 2003Assignee: 3M Innovative Properties CompanyInventors: Nelson B. O'Bryan, Robert R. Kieschke, Joel S. Peiffer
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Patent number: 6627252Abstract: A double layer capacitor includes first and second electrode structures separated by a porous separator. The first and second electrode structures each include a current collector foil, a primary coating formed on the current collector foil, and a secondary coating formed on the primary coating. The primary coatings include conducting carbon powder, and the secondary coatings include activated carbon powder. A method of making the electrode structures includes the steps of: preparing a first slurry that includes conducting carbon powder and a binder; applying the first slurry to a current collector plate; drying the applied first slurry to form a primary coating; preparing a second slurry that includes activated carbon powder, a solvent and a binder; and applying the second slurry to the primary coating.Type: GrantFiled: May 12, 2000Date of Patent: September 30, 2003Assignee: Maxwell Electronic Components, Inc.Inventors: Chenniah Nanjundiah, Richard P. Braun, Raymond T. E. Christie, C. Joseph Farahmandi
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Publication number: 20030175411Abstract: Precursor compositions for the deposition of electronic features such as resistors and dielectric components and methods for the deposition of the precursor compositions. The precursor compositions have a low viscosity, such as not greater than about 1000 centipoise and can be deposited using a direct-write tool. The precursors also have a low conversion temperature, enabling the formation of electronic features on a wide variety of substrates, including low temperature substrates.Type: ApplicationFiled: October 4, 2002Publication date: September 18, 2003Inventors: Toivo T. Kodas, Mark J. Hampden-Smith, Karel Vanheusden, Hugh Denham, Aaron D. Stump, Allen B. Schult, Paolina Atanassova, Klaus Kunze
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Publication number: 20030170432Abstract: A method of production of a ceramic electronic device such as a multilayer ceramic capacitor, comprising forming a first ceramic coating layer on the surface of a substrate, forming an internal electrode on the surface of the first ceramic coating layer, then forming a second ceramic coating layer on the surface of the first ceramic coating layer so as to cover the internal electrode. In this case, when a mean particle size of ceramic particles of the first ceramic coating layer is &agr;1, a thickness of the first ceramic coating layer is T1, a mean particle size of ceramic particles of the second ceramic coating layer is &agr;2, and a thickness of the second ceramic coating layer is T2, the conditions of &agr;1≦&agr;2, 0.05<&agr;1≦0.35 &mgr;m, T1<T2, and 0<T1<1.5 &mgr;m are satisfied. As a result, it is possible to provide a ceramic electronic device, in particular a multilayer ceramic capacitor, resistant to short-circuit defects, withstand voltage defects, and other structural defects.Type: ApplicationFiled: March 4, 2003Publication date: September 11, 2003Applicant: TDK CORPORATIONInventors: Ryou Kobayashi, Kaname Ueda, Yasushi Izumibe, Hitoshi Ishida, Akira Saitoh
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Patent number: 6616965Abstract: Tantalum and niobium aluminum-doped hydrated mixed metal oxide sols may be made by a process comprising combining a first metal compound aluminum alkoxide, with a second metal compound selected from the group consisting of niobium alkoxide and tantalum alkoxide, and mixtures thereof to provide a substantially water-free precursor and combining the precursor with a ketone to provide a hydrated mixed metal oxide sol, wherein the ketone is substantially free of water. The sol may then be processed to obtain thin films, fibers, crystals (both micro- and meso-porous), powders and macroscopic objects and to provide mixed metal oxide that may be used in a variety of components of integrated circuits.Type: GrantFiled: March 23, 2000Date of Patent: September 9, 2003Assignee: Agere Systems Inc.Inventors: Sudhanshu Misra, Pradip Kumar Roy
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Publication number: 20030165615Abstract: The invention relates generally to processes for producing electrically conductive noble metal thin films on a substrate by atomic layer deposition. According to one embodiment of the invention a substrate with a surface is provided in a reaction chamber and a vaporised precursor of a noble metal is pulsed into the reaction chamber. By contacting the vaporised precursor with the surface of the substrate, no more than about a molecular layer of the metal precursor is formed on the substrate. In a next step, a pulse of molecular oxygen-containing gas is provided in the reaction chamber, where the oxygen reacts with the precursor on the substrate. Thus, high-quality metal thin films can be deposited by utilising reactions between the metal precursor and oxygen. In one embodiment, electrically conductive layers are deposited in structures that have high aspect ratio vias and trenches, local high elevation areas or other similar surface structures that make the surface rough.Type: ApplicationFiled: January 29, 2002Publication date: September 4, 2003Inventors: Titta Aaltonen, Petra Alen, Mikko Ritala, Markku Leskela
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Patent number: 6607980Abstract: A liquid precursor for forming a layered superlattice material is applied to an integrated circuit substrate. The precursor coating is annealed in oxygen using a rapid temperature pulsing anneal (“RPA”) technique with a ramp rate of 30° C./second at a hold temperature of 650° C. for a holding time of 30 minutes. The RPA technique includes applying a plurality of rapid-temperature heat pulses in sequence.Type: GrantFiled: February 12, 2001Date of Patent: August 19, 2003Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Uchiyama, Carlos A. Paz de Araujo, Keisuke Tanaka
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Patent number: 6605314Abstract: A method of preparing a capacitor having at least one porous element comprising applying to the element a masking material with an ink jet printer head. Preferably the masking material is a liquid resin such as an acrylic, a polyurethane, a silicone, or a polyimide.Type: GrantFiled: December 14, 2001Date of Patent: August 12, 2003Assignee: Kemet Electronics CorporationInventors: Philip Michael Lessner, Peter Fernstrom, Brian John Melody, John Tony Kinard
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Patent number: 6604276Abstract: A ceramic chip-type device having a glass coating film and a fabricating method thereof are provided, in which a coating film having an excellent acid-resistant property is formed on the surface of the ceramic chip device. Thus, the ceramic chip-type device having a glass coating film stands an attack due to a flux at the time of reflow soldering, to thereby maintain an initial insulation resistance. The ceramic chip-type device is made of a ceramic passive device chip including a pair of external electrode terminals on either end of the ceramic chip-type device, and a glass coating film of an excellent acid-resistant property formed on the surface of a ceramic body located between the pair of external electrode terminals.Type: GrantFiled: April 23, 2001Date of Patent: August 12, 2003Assignee: Amotech Co., Ltd.Inventors: Jun Hwan Jeong, Seung Chul Lee, Hyun Choi
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Publication number: 20030148023Abstract: A solid electrolytic capacitor comprising (1) an electrically conducting polymer composition formed on the surface of an oxide film which is formed on a valve-acting metal, by specifying the viscosity of an oxidizing agent solution and/or a monomer solution, particularly by specifying the viscosity to less than about 100 cp, (2) an electroconducting polymer composition formed on the surface of an oxide film layer which is formed on a valve-acting metal, wherein the electroconducting polymer layer comprising a monomer compound or a derivative thereof as a repeating unit and also containing an anionic dopant is polymerized by setting the humidity in the atmosphere to from about 10% to less than about 60%; (3) an anode body having provided on the outer surface thereof a solid electrolyte formed of an electrically conducting polymer containing a lamellar structure, wherein the solid electrolyte provided on the dielectric film formed on a valve acting metal occupies from about 10 to about 95% of the space in a porType: ApplicationFiled: November 26, 2002Publication date: August 7, 2003Applicant: SHOWA DENKO K.K.Inventors: Atsushi Sakai, Ryuji Monden, Toru Sawaguchi, Katsuhiko Yamazaki, Yuji Furuta, Hideki Ohata
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Publication number: 20030143322Abstract: A method of manufacturing a vertical metal-insulator-metal capacitor (MIMCap) (10) in regions (19) of an insulating layer (14). Trenches for both conductive lines and vertical MIMCap's are formed in the insulating layer (14), and regions (19) are covered by resist (20) while the conductive lines (24) are deposited on the wafer. The resist (20) is removed, and the MIMCap dielectric and top plate conductive material (28) is deposited, forming a vertical MIMCap in regions (19).Type: ApplicationFiled: January 25, 2002Publication date: July 31, 2003Applicant: Infineon Technologies North America Corp.Inventor: Xian J. Ning
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Patent number: 6593638Abstract: A preferred embodiment of this invention comprises a conductive lightly donor doped perovskite layer (e.g. lightly La doped BST 34), and a high-dielectric-constant material layer (e.g. undoped BST 36) overlaying the conductive lightly donor doped perovskite layer. The conductive lightly donor doped perovskite layer provides a substantially chemically and structurally stable electrical connection to the high-dielectric-constant material layer. A lightly donor doped perovskite generally has much less resistance than undoped, acceptor doped, or heavily donor doped HDC materials. The amount of donor doping to make the material conductive (or resistive) is normally dependent on the process conditions (e.g. temperature, atmosphere, grain size, film thickness and composition). This resistivity may be further decreased if the perovskite is exposed to reducing conditions.Type: GrantFiled: June 7, 1995Date of Patent: July 15, 2003Assignee: Texas Instruments IncorporatedInventors: Scott R. Summerfelt, Howard R. Beratan, Bruce Gnade
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Publication number: 20030129425Abstract: This invention relates to high ohm capacitor films and methods of making high ohm capacitor films. The capacitor films have a zinc active area and have a resistance specification of 20 ohms or higher. Corrosion of the zinc active area is inhibited.Type: ApplicationFiled: January 6, 2003Publication date: July 10, 2003Applicant: Toray Plastics (America), Inc.Inventors: Shawn Early, Jaimy Mauricio, Chris Curry
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Publication number: 20030113443Abstract: A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni—P or Ni—Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.Type: ApplicationFiled: January 28, 2003Publication date: June 19, 2003Applicant: Motorola, Inc.Inventors: Augus Kingon, Gregory J. Dunn, Stephen Streiffer, Kevin Cheek, Min-Xian Zhang, Jon-Paul Maria, Jovica Savic
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Patent number: 6558737Abstract: A method for producing an electrode for a capacitor, particularly an electrolyte capacitor, proceeding from an alloy with a component A and a component B, wherein the surface energy of the component A is greater than the surface energy of the component B and wherein a layer containing the component B arises at the surface of a body containing the component A by oxidation-induced segregation and tempering of the alloy. A method for producing a capacitor with such an electrode is also disclosed. The long-time stability of the electrode or, respectively, of the capacitor can be improved by the production of an intermediate layer which impedes the diffusion of oxygen and which dissolves less oxygen than the electrode body.Type: GrantFiled: November 28, 2000Date of Patent: May 6, 2003Assignee: EPCOS AGInventors: Melanie Stenzel, Holger Zillgen, Janos Giber
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Publication number: 20030072884Abstract: A method of forming a film structure (e.g., film stacks) comprising titanium (Ti) and/or titanium nitride (TiN). The Ti film structure is formed by alternately depositing and then plasma treating thin films (less than about 100 Å thick) of titanium. The TiN film structure is formed by alternately depositing and then plasma treating thin films (less than about 300 Å thick) of titanium nitride. The titanium films are formed using a plasma reaction of titanium tetrachloride (TiCl4) and a hydrogen-containing gas. The titanium nitride films are formed by thermally reacting titanium tetrachloride with a nitrogen-containing gas. The subsequent plasma treatment steps comprise a nitrogen/hydrogen-containing plasma.Type: ApplicationFiled: October 15, 2001Publication date: April 17, 2003Applicant: Applied Materials, Inc.Inventors: Tong Zhang, Hyoung-Chan Ha, Jeong Soo Byun, Avgerinos Gelatos, Frederick C. Wu
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Patent number: 6546607Abstract: A method for forming a crater-style sampling capacitor. The capacitor includes a dielectric having a smooth crater shaped input electrode on a first surface and output and guard electrodes on a second surface. A sampling capacitor is defined by the input and output electrodes, and a guard capacitor is defined by the input and guard electrodes. The edge of input electrode is positioned below the first surface to increase surface flash over voltage, further, the input electrode is curved to eliminate corona discharge at edges of the input electrode and to reduce self-heating to negligible levels. The apparatus is suitable for high-voltage radio-frequency applications, such as a mass spectrometer, or other high-voltage applications that require an accurate sampling capacitor for amplitude control and accurate sampling of radio-frequency wave-forms.Type: GrantFiled: April 3, 2000Date of Patent: April 15, 2003Assignee: Agilent Technologies, Inc.Inventors: Robert K. Crawford, J. Gerson Goldberg
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Publication number: 20030044520Abstract: The invention provides a process for coating a cylindrical carrier structure with a predetermined amount (target take-up) of a coating suspension, wherein the carrier structure has a cylinder axis, two end faces, an encasing face and an axial length L and a large number of channels running from the first end face to the second end face. The process comprises: a) vertically aligning the cylinder axis of the carrier structure and filling the empty volume of the channels up to a predetermined height H1 starting from the lower end face, b) removing the excess coating suspension through the lower end face of the carrier structure down to the target take-up, c) turning the carrier structure 180°, so that the upper and lower end faces are exchanged one for the other, and d) repeating steps a) and b), wherein the height H2, up to which the channels are filled in this case is given by H2=L−x·H1 where x is between 0.8 and 1.0.Type: ApplicationFiled: June 27, 2002Publication date: March 6, 2003Applicant: OMG AG & Co. KGInventors: Ralph Kiessling, Michael Harris, Dieter Detterbeck, Joseph Piroth
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Patent number: 6524352Abstract: A parallel capacitor structure capable of forming an internal part of a larger circuit board or the like structure to provide capacitance therefore. Alternatively, the capacitor may be used as an interconnector to interconnect two different electronic components (e.g., chip carriers, circuit boards, and even semiconductor chips) while still providing desired levels of capacitance for one or more of said components. The capacitor includes at least one internal conductive layer, two additional conductor layers added on opposite sides of the internal conductor, and inorganic dielectric material (preferably an oxide layer on the second conductor layer's outer surfaces or a suitable dielectric material such as barium titanate applied to the second conductor layers). Further, the capacitor includes outer conductor layers atop the inorganic dielectric material, thus forming a parallel capacitor between the internal and added conductive layers and the outer conductors.Type: GrantFiled: January 9, 2002Date of Patent: February 25, 2003Assignee: International Business Machines CorporationInventors: Sylvia Adae-Amoakoh, John M. Lauffer, Michael D. Lowell, Voya R. Markovich, Joseph J. Sniezek
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Patent number: 6516504Abstract: A capacitor having a floating plate-shaped electrode, at least two patterned plate electrodes overlying the floating plate-shaped electrode, and a dielectric layer therebetween. The resulting structure exhibits high two-port insertion loss even at frequencies as high as 10 GHz. Notably, the capacitor exhibits an insertion loss of more than −40 dB over a range from 1 GHz to 10 GHz.Type: GrantFiled: October 19, 1999Date of Patent: February 11, 2003Assignee: The Board of Trustees of the University of ArkansasInventor: Leonard W. Schaper
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Patent number: 6514453Abstract: This invention describes a method of rapidly monitoring the temperature of a medium and a method of preparing a quantum confined device that can enable such measurements. The monitoring principle uses changes in impedance of nanostructured devices, i.e. devices in which one or more materials have the domain size precision engineered to less than 500 nanometers, preferably to dimensions less than the domain sizes where quantum confinement effects become significant and modify the electrical or thermal properties of the materials. The invention can be used to monitor absolute values of and changes in temperature of gases, inorganic and organic liquids, solids, suspensions, and mixtures of one or more of the said phases. The invention can be used to monitor radiation, power, heat and mass flow, charge and momentum flow, and phase transformation.Type: GrantFiled: February 17, 1998Date of Patent: February 4, 2003Assignee: NanoProducts CorporationInventors: Anthony Vigliotti, Tapesh Yadav, Clayton Kostelecky, Carrie Wyse
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Publication number: 20020192392Abstract: A method of making a charge containing element including the steps of depositing and patterning a dielectric material on a surface wherein the dielectric material includes a metallo-organic component and a liquid component; and decomposing by laser light the deposited dielectric material to substantially evaporate the liquid component to cause the metallic portion of the metallo-organic component to react with oxygen causing the dielectric material to have charge-holding properties.Type: ApplicationFiled: April 27, 2001Publication date: December 19, 2002Applicant: Eastman Kodak CompanyInventors: Thomas N. Blanton, Syamal K. Ghosh, Donn B. Carlton, Dilip K. Chatterjee
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Patent number: 6495021Abstract: A dendritic sponge which is directionally-grown on a substrate material has a high surface to volume ratio and is suitable for forming anodes for highly efficient capacitors. A dielectric film is formed on the sponge surface by oxidizing the surface. In a preferred embodiment, the dielectric is grown on titanium sponge and is doped with oxides of Ca, Mg, Sr, Be, or Ba to improve the film's dielectric constant or with higher valent cations, such as Cr6+, V5+, Ta5+, Mo6+, Nb5+, W6+, and P5+, to reduce the oxygen vacancy concentration and leakage current of the dielectric film. A capacitor formed from the sponge includes a cathode electrolyte which serves as an electrical conductor and to repair the dielectric film by re-oxidizing the anode surface at areas of local breakdown. Sponges of titanium, tantalum, and aluminum form efficient dielectric films.Type: GrantFiled: March 16, 2001Date of Patent: December 17, 2002Assignee: Case Western Reserve UniversityInventors: Gerhard Welsch, Donald McGervey
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Publication number: 20020187396Abstract: A process for producing an impermeable electrode for electrolytic capacitors, supercapacitors or batteries, with an impermeable conductive layer of graphite, which is deposited from a suspension comprising graphite at a concentration between 1 and 50 g/l in an organic solvent on a substrate by immersion for a given length of time of, for example, approximately 10 to 60 seconds and wherein, after the deposition, the substrate with the layer of graphite is dried at a temperature between approximately 80 and 150° C. for a given length of time of, for example, approximately 1 minute and, after the drying, is heat-treated at a temperature between approximately 200 and 450° C. for a given length of time of, for example, approximately 5 to 60 minutes.Type: ApplicationFiled: June 10, 2002Publication date: December 12, 2002Inventors: Giovanni Pietro Chiavarotti, Jean Constanti, Giuseppe Vono
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Publication number: 20020176989Abstract: A dielectric composed of a core material between two polymer layers that have permittivity values less than the core material. The polymer layers provide structural integrity for the dielectric. The dielectric can be employed in a capacitor to fine tune the capacitance of the capacitor. The dielectric and the capacitor may have a thickness in the micron range. Accordingly, the dielectric and capacitor provide for the miniaturization of electronic devices. The dielectric may be employed in decoupling capacitors to reduce noise in electronic devices.Type: ApplicationFiled: April 16, 2002Publication date: November 28, 2002Inventors: Philip D. Knudsen, Craig S. Allen
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Patent number: 6475317Abstract: The present invention provides a method for manufacturing an electronic component of laminated ceramics such as a laminated ceramic capacitor in which, when a ceramic paste is applied on a ceramic green sheet in order to substantially eliminate steps caused by the thickness of a film of inner circuit elements such as an inner electrode, the ceramic paste is prevented from generating a gap between the paste and the film of inner circuit elements, or the thickness of the ceramic paste is prevented from being increased, by allowing the paste to overflow the film of inner circuit elements, even when the application position has been a little shifted, wherein an inclined face is formed at the periphery of an inner electrode that serves as the film of inner circuit elements, the ceramic paste being applied so as to overlap the periphery of the inner electrode, and wherein the used ceramic paste contains about 40% by weight to 85% by weight of solvents in order to facilitate smooth leveling of the applied ceramic paType: GrantFiled: February 22, 2000Date of Patent: November 5, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Hiroyuki Baba, Koji Kato, Yasunobu Yoneda, Takao Hosokawa
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Patent number: 6446317Abstract: A hybrid capacitor associated with an integrated circuit package provides multiple levels of excess, off-chip capacitance to die loads. The hybrid capacitor includes a low inductance, parallel plate capacitor embedded within the package, and electrically connected to a second source of off-chip capacitance. The parallel plate capacitor is disposed underneath a die, and includes a top conductive layer, a bottom conductive layer, and a thin dielectric layer that electrically isolates the top and bottom layers. The second source of off-chip capacitance is a set of self-aligned via capacitors, and/or one or more discrete capacitors, and/or an additional parallel plate capacitor. Each of the self-aligned via capacitors is embedded within the package, and has an inner conductor and an outer conductor. The inner conductor is electrically connected to either the top or bottom conductive layer, and the outer conductor is electrically connected to the other conductive layer.Type: GrantFiled: March 31, 2000Date of Patent: September 10, 2002Assignee: Intel CorporationInventors: David G. Figueroa, Yuan-Liang Li, Huong T. Do
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Patent number: 6440179Abstract: A packaging method for electric power storage units of an ultracapacitor energy storage device. An electrolyte solution is filled directly during the process of stacking electrodes so as to omit the steps of partially forming and enclosing a refill port. Thus, the fabrication process can be effectively simplified and the production efficiency can be increased. First, an annular glue wall is coated along the border of the top surface of a first electrode. The electrolyte solution is filled on the top surface of the first electrode enclosed by the annular glue wall. A second electrode is then stacked over the first electrode. The annular glue wall is heated to bind the first electrode, the second electrode, and the annular glue wall, thus enclosing the electrolyte solution between the first electrode and the second electrode.Type: GrantFiled: February 23, 2001Date of Patent: August 27, 2002Assignee: National Energy Technology Co., Ltd.Inventors: Chang-Chen Yang, Wei-Te Pong, Yung-Shang Huang, Keh-Chi Tsai, James M. Lawson
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Patent number: 6440591Abstract: A ferroelectric thin film coated substrate is obtained by a producing method of forming a metal oxide buffer layer on a substrate, forming a first crystalline ferroelectric thin film thereon by means of a MOCVD method and forming a second ferroelectric thin film with a film thickness thicker than that of the first ferroelectric thin film thereon by means of the MOCVD method at a temperature lower than that of the first ferroelectric thin film. This producing method makes it possible to produce a ferroelectric thin film, where its surface is dense and even, a leakage current properties are excellent and sufficiently large remanent spontaneous polarization is shown, at a lower temperature.Type: GrantFiled: May 8, 1996Date of Patent: August 27, 2002Assignee: Sharp Kabushiki KaishaInventors: Hironori Matsunaga, Takeshi Kijima, Sakiko Satoh, Masayoshi Koba
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Patent number: 6432472Abstract: The invention relates to a nanostructured BaTiO3 film, plate or array that has from 1,000 to 10,000 times the storage capacity of conventional capacitors. The barium titanates are of the formula BaaTibOc wherein a and b are independently between 0.75 and 1.25 and c is 2.5 to about 5.0. The barium titanates may further be doped with a material, “M”, selected from Au, is Au, Cu, Ni3Al, Ru or InSn. The resulting titanate may be represented by the formula MdBaaTibOc wherein d is about 0.01 to 0.25, a is about 0.75 to about 1.25, b is about 0.75 to about 1.25 and c is about 2.5 to about 5.0. X-ray diffraction results illustrate that the crystal structure of the thin films changed from predominantly cubic to tetragonal phase and crystallite size increased with increasing concentration of “M”.Type: GrantFiled: March 7, 2000Date of Patent: August 13, 2002Assignee: Energenius, Inc.Inventors: Mark Farrell, Harry Eugen Ruda, Yuichi Masaki
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Patent number: 6432509Abstract: A composite film for a film condenser, which comprises a biaxially oriented film made of polyethylene-2,6-naphthalenedicarboxylate as a main polymer component and an electrically conductive metal thin layer formed on the surface of the biaxially oriented film, wherein the number of flyspecks having an average diameter of 60 &mgr;m or greater in the surface of said biaxially oriented film is 20/m2 or less and the number of portions failing to satisfy a dielectric breakdown voltage of 200 V/&mgr;m (electrical insulation defects) in said composite film is 20/m2 or less, and a biaxially oriented film therefor. According to the present invention, there is provided a high-quality composite film for a film condenser, which has excellent physical properties and electric characteristics. Further, there is provided a very thin biaxially oriented film excellent in processability and surface properties and usable for the composite film.Type: GrantFiled: February 7, 2001Date of Patent: August 13, 2002Assignee: Teijin LimitedInventors: Koji Furuya, Shinya Watanabe, Hiroshi Kusume, Akira Kameoka
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Publication number: 20020093783Abstract: A method of making an electrode structure, an electrode structure, and a double layer capacitor including the electrode structure, the method includes the steps of: applying a first slurry including conducting carbon powder and a binder to a current collector plate; curing the applied first slurry to form a primary coating; applying a second slurry that includes activated carbon powder, a solvent and a binder to the primary coating; and curing the applied second slurry to form a secondary coating, thereby forming a first electrode. In variations, additional primary and secondary coatings may be formed on both sides of the collector plate.Type: ApplicationFiled: November 1, 2001Publication date: July 18, 2002Inventors: Priya Bendale, Manuel R. Malay, John M. Dispennette, Chenniah Nanjundiah, Earl Chaney
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Publication number: 20020090450Abstract: A method for fabricating a precious-metal electrode for a storage capacitor includes providing a substrate, applying a catalytically inactive insulation and a catalytically active connection region to the substrate. The catalytically active connection region can be a precious metal material such as a precious metal or an oxide of a precious metal. The catalytically active connection region and the catalytically inactive insulation region are produced, for example, by patterning the connection region or by planarizing the connection region and the insulation region. The next step is depositing selectively the precious metal material on the catalytically active connection region by passing an organometallic compound of a precious metal to the substrate at a temperature from 0° to 120° C.Type: ApplicationFiled: December 26, 2001Publication date: July 11, 2002Inventors: Walter Hartner, Frank Hintermaier, Gunther Schindler
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Publication number: 20020076484Abstract: A method of preparing a capacitor having at least one porous element comprising applying to the element a masking material with an ink jet printer head. Preferably the masking material is a liquid resin such as an acrylic, a polyurethane, a silicone, or a polyimide.Type: ApplicationFiled: December 14, 2001Publication date: June 20, 2002Applicant: Kemet Electronics CorporationInventors: Philip Michael Lessner, Peter Fernstrom, Brian John Melody, John tony Kinard
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Patent number: 6399012Abstract: Varistors are produced by pressing ceramic ZnO powder to provide discs, sintering the discs with microwave radiation, and firing outer electrodes with microwave radiation. The sintering has a maximum plateau temperature of 1000° C. to 1300° C. and the duration for ramping to this temperature and maintenance at this temperature is 120 to 180 minutes. These parameters also apply for multi-layer varistors with inner electrodes. The outer electrodes are fired at a maximum plateau temperature of 550° C. to 820° C. for a total duration of 40 to 45 minutes.Type: GrantFiled: November 13, 2000Date of Patent: June 4, 2002Inventors: Dinesh Agrawal, Ramesh Raghavendra, Balasubramaniam Vaidhyanathan
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Patent number: 6377443Abstract: An electrolytic capacitor comprising a thermally treated anode prepared by heating a manganese dioxide coated porous anodized valve metal nitride anode to a temperature of about 325° C. to about 450° C. The anode may be heated to first temperature of about 200° C. to about 250° C. for a time sufficient for the valve metal nitride anode to reach thermal equilibrium, prior to increasing the temperature to about 325° C. to about 450° C.Type: GrantFiled: January 23, 2001Date of Patent: April 23, 2002Assignee: Kemet Electronics CorporationInventors: Randolph S. Hahn, Brian J. Melody, John T. Kinard, David A. Wheeler
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Patent number: 6372286Abstract: Integrated circuit capacitors in which the capacitor dielectric is a thin film of BST having a grain size smaller than 2000 Å. Typical gain sizes are 40 nanometers and less. The BST is formed by deposition of a liquid precursor by a spin-on process. The original liquid precursor includes an alkoxycarboxylate dissolved in 2-methoxyethanol and an xylene exchange is preformed just prior to spinning. The precursor is dried in air at a temperature of about 400° C. and then furnace annealed in oxygen at a temperature of between 675° C. and 850° C.Type: GrantFiled: July 19, 1994Date of Patent: April 16, 2002Assignees: Symetrix Corporation, Matsushita Electrical Industrial Co., Ltd.Inventors: Masamichi Azuma, Michael C. Scott, Carlos A. Paz de Araujo, Joseph D. Cuchiaro
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Patent number: 6358811Abstract: An inventive a method for manufacturing a microelectronic structure for use in computer memory applications, sensors, capacitors and various communications applications, the microelectronic structure including a stoichiometric ferroelectric and/or dielectric layer containing lead or bismuth formed on top of an electrode, the method comprising the steps of: forming a lower electrode; forming a self diffusion barrier on top of the lower electrode; heat-treating the self diffusion barrier at a first temperature; forming a ferroelectric and/or dielectric layer on top of the self diffusion barrier; heat-treating the ferroelectric and/or dielectric layer at a second temperature; and forming an upper electrode to thereby form the microelectronic structure, wherein a chemical composition of the self diffusion barrier is the same as that of the ferroelectric and/or dielectric layer after the second heat-treatment.Type: GrantFiled: March 24, 1999Date of Patent: March 19, 2002Inventor: Bae Yeon Kim
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Publication number: 20020005485Abstract: An infrared detecting capacitor formed of a ferroelectric film has its capacitor portion supported by first and second interconnecting lines to be held on an Si substrate located on both sides of a trench. A lower electrode is coupled with the first interconnecting line while an upper electrode is coupled with the second interconnecting line. The capacitor portion is a rectangle in shape in plan view without small triangular sections opposite to each other in the diagonal direction.Type: ApplicationFiled: May 30, 2001Publication date: January 17, 2002Inventors: Kazuhiko Hashimoto, Tomonori Mukaigawa, Ryuichi Kubo, Hiroyuki Kishihara, Minoru Noda, Masanori Okuyama
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Publication number: 20020003123Abstract: A cleaning solution for use in removing a damaged portion of a ferroelectric layer, and a cleaning method using the solution. The cleaning solution includes a fluoride, an organic acid with carboxyl group, an alkaline pH adjusting agent and water.Type: ApplicationFiled: March 1, 2001Publication date: January 10, 2002Inventors: Kwang-wook Lee, Im-soo Park, Kun-tack Lee, Young-min Kwon, Sang-rok Hah
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Patent number: 6335049Abstract: A chemical vapor deposition method of forming a high k dielectric layer includes positioning a substrate within a chemical vapor deposition reactor. At least one metal comprising precursor and N2O are provided within the reactor under conditions effective to deposit a high k dielectric layer on the substrate comprising oxygen and the metal of the at least one metal precursor. The N2O is present within the reactor during at least a portion of the deposit at greater than or equal to at least 90% concentration by volume as compared with any O2, O3, NO, and NOX injected to within the reactor. In one implementation, the conditions are void of injection of any of O2, O3, NO, and NOX to within the reactor during the portion of the deposit. In one implementation, a capacitor is formed using the above methods. In preferred implementations, the technique can be used to yield smooth, continuous dielectric layers in the absence of haze or isolated island-like nuclei.Type: GrantFiled: January 3, 2000Date of Patent: January 1, 2002Assignee: Micron Technology, Inc.Inventor: Cem Basceri