Abstract: In a method for fabricating a photo mask, first resist patterns are formed on a transparent substrate where a light blocking layer and a phase shift layer are formed. Line widths of the first resist patterns are measured to define a region requiring a line width correction. Second resist patterns exposing the defined region are formed on the first resist patterns. The line width of the light blocking layer is corrected by over-etching the exposed light blocking layer to a predetermined thickness. The second resist patterns are removed. Phase shift patterns and light blocking patterns are formed using the first resist patterns as an etch mask. Then, the first resist patterns are removed.

Abstract: A method and a resist composition. The resist composition includes a polymer having repeating units having a lactone moiety, a thermal base generator capable of generating a base and a photosensitive acid generator. The polymer has the properties of being substantially soluble in a first solvent and becoming substantially insoluble after heating the polymer. The method includes forming a film of a photoresist including a polymer, a thermal base generator capable of releasing a base, a photosensitive acid generator, and a solvent. The film is patternwise imaged. The imaging includes exposing the film to radiation, resulting in producing an acid catalyst. The film is developed in an aqueous base, resulting in removing base-soluble regions and forming a patterned layer. The patterned layer is baked above the temperature, resulting in the thermal base generator releasing a base within the patterned layer and the patterned layer becoming insoluble in the solvent.

Abstract: A method and a resist composition. The resist composition includes a polymer having repeating units having a lactone moiety, a thermal base generator capable of generating a base and a photosensitive acid generator. The polymer has the properties of being substantially soluble in a first solvent and becoming substantially insoluble after heating the polymer. The method includes forming a film of a photoresist including a polymer, a thermal base generator capable of releasing a base, a photosensitive acid generator, and a solvent. The film is patternwise imaged. The imaging includes exposing the film to radiation, resulting in producing an acid catalyst. The film is developed in an aqueous base, resulting in removing base-soluble regions and forming a patterned layer. The patterned layer is baked above the temperature, resulting in the thermal base generator releasing a base within the patterned layer and the patterned layer becoming insoluble in the solvent.

Abstract: Accurate ultrafine patterns are formed using a multiple exposure technique comprising implementing an OPC procedure to form an exposure reticle to compensate for distortion of an overlying resist pattern caused by an underlying resist pattern. Embodiments include forming a first resist pattern in a first resist layer over a target layer using a first exposure reticle, forming a second exposure reticle by an OPC technique to compensate for distortion of a second resist pattern caused by the underlying first resist pattern, depositing a second resist layer on the first resist pattern, forming the second resist pattern in the second resist layer using the second exposure reticle, the first and second resist patterns constituting a final resist mask, and forming a pattern in the target layer using the final resist mask.

Abstract: A description is given of methods and devices for product marking of objects using a light-sensitive layer applied to the objects and a light source. The invention may be used, for example, to simultaneously mark or label a first plurality of objects at a first time with individual marks or labels, and to mark or label a second plurality of objects at a second time with individual marks or labels.

Abstract: A second photoresist having a second photosensitivity is formed on a substrate. A first photoresist having a first photosensitivity, which is greater than second photosensitivity, is formed on the second photoresist. Preferably, the first photoresist is a gray resist that becomes transparent upon exposure. At least one portion of the first photoresist is lithographically exposed employing a first reticle having a first pattern to form at least one transparent lithographically exposed resist portion, while the second photoresist remains intact. The second photoresist is lithographically exposed employing a second reticle including a second pattern to form a plurality of lithographically exposed shapes in the second photoresist. The plurality of lithographically exposed shapes have a composite pattern which is the derived from the second pattern by limiting the second pattern only within the area of the at least one transparent lithographically exposed resist pattern.

Abstract: A method of writing identifying information comprises: the step of forming a metal film on a wafer; the step of forming a resist layer on the metal film; the step of exposing the resist layer by projecting a pattern for an alignment mark on the resist layer; the first development step of developing the resist layer; the step of exposing the resist layer by projecting a pattern for the identifying information onto the resist layer using the pattern formed in the resist layer in the first development step as a reference of a location; the second development step of developing the resist layer; the step of selectively etching the metal film using the resist layer as an etching mask; and removing the resist layer.

Abstract: An apparatus includes a substrate and a photoresist material structure arranged adjacent to the substrate so that a cavity is formed between the substrate and the photoresist material structure. The cavity has an opening. The photoresist material structure includes a frame portion disposed on a main side of the substrate and a cap portion spanning over a part of the main side of the substrate at a distance to the main side. The cap portion is formed in the first photoresist layer and the frame portion is formed in the second photoresist layer.

Abstract: Methods for producing a photomask or layer or stack patterning include applying two resists to a layer, a layer stack, or a mask substrate (collectively “the layer”). Sensitivity of the first resist with respect to the exposure dose is greater than sensitivity of the second. Both resists are subjected to an exposure dose in defined regions of the layer surface, the dose varying locally between first and second doses. The first dose is chosen to expose the first resist but not the second. The second dose is chosen to expose the second resist. After a first development of the second and of the first resist the layer is etched at the uncovered locations for a first time. After complete removal of the second resist and a second development of the first resist, the layer is etched. As a result, it is possible to produce structures of different depths in the layer.

Abstract: A method of forming a pattern on a wafer is provided. The method includes applying a photoresist on the wafer and exposing the wafer to define a first pattern on the photoresist. The method also includes exposing the wafer to define a second pattern on the photoresist, wherein each of the first and second patterns comprises unexposed portions of the photoresist and developing the wafer to form the first and second patterns on the photoresist, wherein the first and second patterns are formed by removing the unexposed portions of the photoresist.

Abstract: A method of manufacturing a semiconductor device according to an embodiment includes determining a second exposure parameter including exposure parameters except for an exposure amount from a dimension distribution information so that a resist pattern of a first resist pattern formed based on a second pattern has a desired dimension in a plurality of regions to be shot within a surface of a wafer.

Abstract: A manufacturing method of a semiconductor device including a pattern forming method, a reticle correcting method, and a reticle pattern data correcting method are disclosed.

Abstract: A method for forming a plurality of gate patterns in parallel with each other on a photoresist layer within a circuit block includes forming extension gate patterns on both ends of the gate patterns and on both ends of a dummy gate pattern of the circuit block to reach an edge of the circuit block, and performing a first photolithography process upon the photoresist layer by using a phase shift photomask having first and second openings whose difference in phase is ?, the first and second openings alternating between the gate patterns including the extension gate patterns to form phase edges therein.

Abstract: A manufacturing method of a liquid discharge head having a liquid flow path which communicates with a discharge port for discharging liquid, includes: providing a first layer made of a first photosensitive resin on a substrate; forming a mold of the flow path from the first layer by exposing a part of the first layer and developing the first layer; applying a light absorbent to a surface of the mold; providing a second layer made of a second photosensitive resin to coat the mold applied with the light absorbent; forming an opening that is to be the discharge port in the second layer by exposing a part of the second layer with light having a wavelength that can be absorbed by the light absorbent and developing the second layer; and forming the flow path by removing the mold.

Abstract: Provided is a lithography system operation to include a first aperture or a second aperture. Each of the first and second apertures has two pairs of radiation-transmitting regions where one pair of radiation-transmitting regions are larger than a second pair. For an aperture, each pair of radiation-transmitting regions are on different diametrical axis. In an embodiment, one aperture is used for x-dipole illumination and the second aperture is used for y-dipole illumination.

Abstract: In a method of forming an insulation layer pattern, an insulation layer is formed on a substrate. An organic layer and a hard mask layer are successively formed on the insulation layer. A preliminary hard mask pattern having first openings is formed by patterning the hard mask layer. A hard mask pattern having the first openings and second openings is formed by patterning the preliminary hard mask pattern. Width control spacers are formed on sidewalls of the first and the second openings. An etching mask pattern is formed by etching the organic layer using the hard mask pattern as an etching mask. The insulation layer pattern having third openings is formed by etching the insulation layer using the etching mask pattern as an etching mask.

Abstract: A method for forming a pattern of a semiconductor device is provided. Specifically, in a method for manufacturing a NAND flash memory device using a spacer patterning process, a dummy pattern, which is not used in an actual device operation, is additionally formed in a peripheral circuit region when a photoresist pattern for forming a string pattern is formed in a cell region. As a result, the edge photoresist pattern is prevented from being bent, and a critical dimension difference between the center region and the edge region of the photoresist pattern lo is not generated, thereby improving a margin of DOF to obtain a reliable semiconductor device.

Abstract: A photoresist composition and methods using the photoresist composition in multiple exposure/multiple layer processes. The photoresist composition includes a polymer comprising repeat units having a hydroxyl moiety; a photoacid generator; and a solvent. The polymer when formed on a substrate is substantially insoluble to the solvent after heating to a temperature of about 150° C. or greater. One method includes forming a first photoresist layer on a substrate, patternwise exposing the first photoresist layer, forming a second non photoresist layer on the substrate and patterned first photoresist layer. Another method includes forming a first photoresist layer on a substrate, patternwise exposing the first photoresist layer, forming a second photoresist layer on the substrate and patterned first photoresist layer and patternwise exposing the second photoresist layer.

Abstract: A method and a structure. The structure includes: a solid core comprising a first photoresist material, the core having a bottom surface on a substrate, a top surface and opposite first and second side surfaces between the top surface and the bottom surface; and a shell comprising a second photoresist material, the shell on the top surface of the substrate, the shell containing a cavity open to the top surface of the substrate, the shell formed over the top surface and the first and second side surfaces walls of the core, the core completely filling the cavity. The core is stiffer than the shell. The method includes: forming the core from a first photoresist layer and forming the shell from a second photoresist layer applied over the core. The core may be cross-linked to increase its stiffness.

Abstract: A reticle comprising isolated pillars is configured for use in imprint lithography. In some embodiments, on a first substrate a pattern of pillars pitch-multiplied in two dimensions is formed in an imprint reticle. The imprint reticle is brought in contact with a transfer layer overlying a series of mask layers, which in turn overlie a second substrate. The pattern in the reticle is transferred to the transfer layer, forming an imprinted pattern. The imprinted pattern is transferred to the second substrate to form densely-spaced holes in the substrate. In other embodiments, a reticle is patterned by e-beam lithography and spacer formations. The resultant pattern of closely-spaced pillars is used to form containers in an active integrated circuit substrate.

Abstract: A photolithographic method uses different exposure patterns. In one aspect, a photo-sensitive layer on a substrate is subject to a first exposure using optics having a first exposure pattern, such as an x-dipole pattern, followed by exposure using optics having a second exposure pattern, such as a y-dipole pattern, via the same mask, and with the photo-sensitive layer fixed relative to the mask. A 2-D post pattern with a pitch of approximately 70-150 nm may be formed in a layer beneath the photo-sensitive layer using 157-193 nm UV light, and hyper-numerical aperture optics, in one approach. In another aspect, hard baking is performed after both of the first and second exposures to erase a memory effect of photoresist after the first exposure. In another aspect, etching of a hard mask beneath the photo-sensitive layer is performed after both of the first and second exposures.

Abstract: A planar N-way power divider/combiner, wherein N is an integer different from a power of two, comprising a first port, which is to be coupled to a first transmission line having a first characteristic impedance, N second ports, which are to be coupled each to a corresponding electrical load, and N division/combination branches, each coupled between the first port and a corresponding second port and each having a first stage, a second stage, and an intermediate node between the two stages. All the electrical loads have one and the same given load impedance. For each pair of planarly adjacent division/combination branches, a corresponding first uncoupling resistor is coupled between corresponding intermediate nodes and a corresponding second uncoupling resistor is coupled between the corresponding second ports.

Abstract: In a method of manufacturing a semiconductor device, a protection film can be formed using a double exposure technology to increase a developer resistance of the protection film without increasing the thickness of the protection film for realizing fine patterning. The method comprises forming a protection film on a first resist pattern formed on a substrate; and forming a second resist pattern on the protection film between parts of the first resist pattern. The protection film is formed in at least two layers by using different methods.

Abstract: There is provided a method for forming a continuous thin film circuit pattern with good precision, at low cost and with low environmental burden; an electronic circuit fabricated by the same, and an electronic device including the same. There are a step for forming a mask layer 2 on a substrate 1; a step for forming an opening pattern in the mask layer 2; a step for forming a thin film 3 on the substrate 1 and on the mask layer 2; and a step for removing, from the substrate 1, the mask layer 2 and a portion of the thin film 3 formed on the mask layer 2; wherein the opening pattern is formed under a dry condition.

Abstract: A double exposure process is performed using a halftone phase shift mask (11) including gate patterns (1), assist patterns (2a) and (2b) with different resoluble line widths, and an assist pattern (2c) with a line width equal to or smaller than a resolution limit which are respectively inserted into portions in each of which a distance between the gate patterns (1) is large, and a Levenson phase shift mask (11) including shifter patterns (3) corresponding to the gate patterns (1) of the photomask 11. On this occasion, the assist patterns (2a), (2b), and (2c) are erased and only the gate patterns (1) are transferred. Consequently, when patterns are transferred by the double exposure process, a common depth of focus of the patterns is improved and highly uniform line widths are realized, which makes it possible to manufacture a highly reliable semiconductor device.

Abstract: A self assembly step for the manufacture of an electronic component comprising, e.g., a semiconductor chip or semiconductor array or wafer comprises forming a block copolymer film placed on a random copolymer film substrate operatively associated with the electronic component and the block copolymer film wherein the surface energy of the random copolymer film is tailored by use of a photolithographic or chemical process prior to the self assembly step. By prior deterministic control over regional surface properties of the random copolymer film, domains of the block copolymer film form only in predefined areas. This approach offers simplified processing and a precise control of regions where domain formation occurs. Selective removal of some of the domains allows for further processing of the electronic component.

Abstract: In one general aspect, methods and articles of manufacture for creating micro-structures are disclosed. In one embodiment, the micro-structures are configured to provide a desired level of hermiticity to other micro-sized devices, such as MEMS and microfluidic devices. In one embodiment, the microstructures are formed from a single species of photoresist, where the photoresist is lithographically patterned to encapsulate the micro-sized device. In general, the ability to form an encapsulating micro-structure from a single photoresist relies in part on applying variable light doses to a later of photoresist to affect a desired level of cross-linking within the photoresist.

Abstract: A manufacturing method includes forming a stacked film including first/second/third layers on a substrate, forming a first resist pattern on the stacked film, forming a first film pattern by etching the first layer through the first resist pattern, removing the first resist pattern, partially covering the first film pattern with a second resist pattern, slimming the first film pattern exposed from the second resist pattern, forming a second film pattern by etching the second layer exposed from the first layer through the first film pattern, partially covering the second film pattern with a third resist pattern, removing the first film pattern exposed from the third resist pattern, forming sidewall spacers to the second film pattern and remained second layer, removing the remained second layer portion, followed by etching the third layer through the second film pattern and sidewall spacers to form a third film pattern.

Abstract: The present invention provides a method and an apparatus for generating periodic patterns by step-and-align interference lithography, wherein at least two coherent light beams with a pattern are controlled to project onto a substrate to be exposed to form an interference-patterned region on the substrate. Thereafter, by means of moving the substrate or the light beams stepwisely, a patterned region with a large area can be formed on the substrate. According to the present invention, the optical path and exposure time may be shortened to reduce defect formation during lithographic processing and to improve the yield.

Abstract: A method for forming a bi-layer lift-off mask, including a hardened photoresistive stencil layer on a PMGI layer, for use in fabricating GMR read-head sensors with trackwidths of less than 0.1 microns and TMJ MRAM devices of similar critical dimensions. The stencil portion of the mask includes a narrow portion with sharply defined edge and corners which are formed, without rounding or extreme undercut, by a photolithographic process which includes the formation, in a first development process, of auxiliary pattern pieces over the corners of the stencil and a subsequent oxidation in ozone for removing those auxiliary pattern pieces and obtaining sharply defined edge and corners and a controlled dissolution of the PMGI layer.

Abstract: A polymer resin composition, a method for forming a pattern using the polymer resin composition, and a method for fabricating a capacitor using the polymer resin composition are disclosed. The polymer resin composition includes about 75 to 93 percent by weight of a copolymer prepared from benzyl methacrylate, methacrylic acid, and hydroxyethyl methacrylate; about 1 to 7 percent by weight of a cross-linking agent; about 0.01 to 0.5 percent by weight of a thermal acid generator; about 0.01 to 1 percent by weight of a photoacid generator; about 0.00001 to 0.001 percent by weight of an organic base; and a solvent.

Abstract: A method forms a first patterned mask (comprising rectangular features and/or rounded openings) on a planar surface and forms a second patterned mask on the first patterned mask and the planar surface. The second patterned mask covers protected portions of the first patterned mask and the second patterned mask reveals exposed portions of the first patterned mask. The method treats the exposed portions of the first patterned mask with a chemical treatment that reduces the size of the exposed portions to create an altered first patterned mask.

Abstract: In one aspect, the present invention relates to coating compositions that comprise a resin component, wherein the predominant portion of the resin component comprising one or more resins that are at least substantially free of fluorine. Coating compositions of the invention are useful as photoresist overcoat layers, including in immersion lithography processing.

Abstract: In a method for forming a plurality of gate patterns in parallel with each other on a photoresist layer within one circuit block, at least one dummy gate pattern is formed in parallel with the gate patterns when a pitch between said gate patterns is larger than a predetermined maximum pitch, so that pitches between the gate patterns including the dummy gate pattern are smaller than the predetermined maximum pitch. Then, a photolithography process is performed upon the photoresist layer by using a phase shift photomask having first and second openings whose difference in phase is ?. The first and second openings alternate between the gate patterns including the dummy gate pattern to form phase edges therein.

Abstract: A composition for the organic hard mask includes a polyamic acid compound, and a method for forming a pattern is used in a manufacturing process of semiconductor devices by coating the composition for organic hard mask film on an underlying layer, and depositing a second hard mask film with a silicon nitride SiON film thereon to form a double hard mask film having an excellent etching selectivity, thereby obtaining a uniform pattern.

Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.

Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.

Abstract: A method of lithography is disclosed, which allows for independent resist process optimization of two or more exposure steps that are performed on a single resist layer. By providing for a separate post-exposure bake after each resist exposure step, pattern resolution for each exposure can be optimized. The method can generally be used with different lithographic techniques, and is well-suited for hybrid lithography. It has been applied to the fabrication of a device, in which the active area and the gate levels are defined in separate mask levels using hybrid lithography with an e-beam source and a 248 nm source respectively. Conditions for post-exposure bakes after the two exposure steps are independently adjusted to provide for optimized results.

Abstract: A photo-mask having a first exposure area, a second exposure area and a third exposure area is for manufacturing a thin-film transistor substrate. The photo-mask includes a first peripheral line pattern, a first dummy line pattern, a first overlapping pixel pattern and a second overlapping pixel pattern. The first peripheral line pattern is in the first exposure area. The first dummy line pattern is in the first exposure area and connected to the first peripheral line pattern. The first overlapping pixel pattern is in the first exposure area and connected to the first dummy line pattern. The first overlapping pixel pattern is complementary to the second overlapping pixel pattern in the second exposure area. After exposing through and overlapping the first and second overlapping pixel patterns, two patterns respectively formed from exposing through the first and second exposure area are unified.

Abstract: A method for manufacturing a surface, the surface having a multiplicity of slightly different patterns, is disclosed with the method comprising the steps of designing a stencil mask having a set of characters for forming the patterns on the surface and reducing shot count or total write time by use of a character varying technique. A system for manufacturing a surface is also disclosed.

Abstract: A method for fracturing or mask data preparation or proximity effect correction is disclosed which comprises the steps of inputting patterns to be formed on a surface, a subset of the patterns being slightly different variations of each other and selecting a set of characters some of which are complex characters to be used to form the number of patterns, and reducing shot count or total write time by use of a character varying technique. A system for fracturing or mask data preparation or proximity effect correction is also disclosed.

Abstract: Methods to reduce the write time for forming mask patterns having angled and non-angled features using electron beam lithography are disclosed. In one exemplary embodiment, non-angled features of the mask pattern are formed by exposure to an electron beam. The orientation of the substrate and a path of the generally rectangular-shaped shot from the electron beam may be relatively altered such that the substrate is exposed to the electron beam to form the angled features as if they were non-angled features. In another exemplary embodiment, the electron beam lithography system determines whether it is necessary to relatively alter the orientation of the substrate and a path of the generally rectangular-shaped shot from the electron beam to form the angled features based on the number of angled features and the time required for relatively altering the orientation. Electron beam lithography systems employing a rotatable stage, rotatable apertures, or both, are also disclosed.

Abstract: A method of forming a pattern on a photosensitive resin film in lithography, a method of forming a pattern for a semiconductor device, and a method of manufacturing a semiconductor device using the patterned film are disclosed. In an aspect of the invention, there is provided a method of forming a pattern on a photosensitive resin film, comprising forming a processing-object film above a semiconductor substrate, forming a first patterned photosensitive resin layer on the processing-object film, implanting ions into the first patterned photosensitive resin layer, the sum (Rp+3dRp) of a projected range (Rp) for the ions in the first photosensitive resin layer and three times a standard deviation (dRp) of the projected range being greater than a thickness of the first patterned photosensitive resin layer, and forming a second patterned photosensitive resin layer on the ion-implanted first patterned photosensitive resin layer.

Abstract: One embodiment relates to a computer method of providing an electronic mask set for an integrated circuit (IC) layer. In the method, a first electronic mask is generated for the IC layer. The first electronic mask includes a first series of longitudinal segments from the IC layer, where the first series has fewer than all of the longitudinal segments in the IC layer. A second electronic mask is also generated for the IC layer. The second electronic mask includes a second series of longitudinal segments from the IC layer, where the second series has fewer than all of the longitudinal segments in the IC layer and differs from the first series. The first and second masks are generated so a coupling segment extends traverse to the first direction and couples one longitudinal segment on the IC layer to another longitudinal segment on the IC layer.

Abstract: A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.

Abstract: A quantum well is formed for a deep well III-V semiconductor device using double pass patterning. In one example, the well is formed by forming a first photolithography pattern over terminals on a material stack, etching a well between the terminals using the first photolithography patterning, removing the first photolithography pattern, forming a second photolithography pattern over the terminals and at least a portion of the well, deepening the well between the terminals by etching using the second photolithography pattern, removing the second photolithography pattern, and finishing the terminals and the well to form a device on the material stack.

Abstract: A method of patterning a plurality of polysilicon structures includes forming a polysilicon layer over a semiconductor body, and patterning the polysilicon layer to form a first polysilicon structure using a first patterning process that reduces line-edge roughness (LER). The method further includes patterning the polysilicon layer to form a second polysilicon structure using a second patterning process that is different from the first patterning process after performing the first patterning process.

Abstract: A method for manufacturing a surface, the surface having a multiplicity of slightly different patterns, is disclosed with the method comprising the steps of designing a stencil mask having a set of characters for forming the patterns on the surface and reducing shot count or total write time by use of a character varying technique. A system for manufacturing a surface is also disclosed.

Abstract: A pattern is formed by applying a positive resist composition comprising a polymer comprising 7-oxanorbornane ring-bearing recurring units and acid labile group-bearing recurring units and an acid generator onto a substrate to form a resist film, heat treating and exposing the resist film to radiation, heat treating and developing the resist film with a developer, and causing the resist film to crosslink and cure with the aid of acid and/or heat. A second resist pattern is then formed in the space area of the first resist pattern. The double patterning process reduces the pitch between patterns to one half.

Abstract: The method for fabricating the semiconductor device includes the step of forming a photoresist film 84 over a substrate 10, the step of exposing interconnection patterns to the photoresist film 84, the step of exposing to the photoresist film 84 hole patterns of a plurality of holes positioned at ends or bent portions of the interconnection patterns where holes to be connected to the interconnection patterns are to be formed, and the step of developing the photoresist film 84 with the interconnection patterns and the holes patterns exposed to. Thus, the insufficient exposure energy at the ends or the bent portions of the patterns due to optical proximity effect is compensated to prevent the shortening at the pattern ends or the rounding at the pattern bent portions. The contacts with the contact plugs connected to the pattern ends or the pattern bent portions can be ensured.