Metal Etched Patents (Class 430/318)
  • Patent number: 8211617
    Abstract: A printed mask derived from a composition comprised of at least one compound including at least one alkaline-hydrolyzable group, and at least one compound including at least one ethylene oxide group. The printed mask is removable using an alkaline solution in about 30 seconds or less.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: July 3, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Norine E. Chang, C. Wayne Jaeger, Scott Jong Ho Limb, Eric J. Shrader, Francisco E. Torres, Kris Schmidt
  • Publication number: 20120154800
    Abstract: A method for producing planar extended electrodes with nanoscale spacings that exhibit very large SERS signals, with each nanoscale gap having one well-defined hot spot. The resulting highly sensitive substrate has extended metal electrodes separated by a nanoscale gap. The electrodes act as optical antennas to enhance dramatically the local electromagnetic field for purposes of spectroscopy or nonlinear optics. SERS response is consistent with a very small number of molecules in the hotspot, showing blinking and wandering of Raman lines. Sensitivity is sufficiently high that SERS from physisorbed atmospheric contaminants may be detected after minutes of exposure to ambient conditions.
    Type: Application
    Filed: February 12, 2008
    Publication date: June 21, 2012
    Inventors: Douglas Natelson, Daniel Robert Ward, Zachary Kyle Keane
  • Patent number: 8197659
    Abstract: A method for manufacturing a multilayer printed circuit board including providing a core substrate having a penetrating-hole, forming an electroless plated film on a surface of the substrate and an inner wall surface of the penetrating-hole, electrolytically plating the substrate while moving with respect to the surface of the substrate an insulating member in contact with the surface of the substrate such that an electrolytic plated film is formed on the electroless plated film, an opening space inside the penetrating-hole is filled with an electrolytic material, and a through-hole conductor structure is formed in the penetrating-hole, forming an etching resist having an opening pattern on the electrolytic plated film, and removing an exposed pattern of the electrolytic plated film exposed by the opening pattern and a pattern of the electroless plated film under the exposed pattern such that a conductor circuit is formed on the surface of the substrate.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: June 12, 2012
    Assignee: IBIDEN Co., Ltd.
    Inventors: Toru Nakai, Satoru Kawai, Hiroshi Niwa, Yoshiyuki Iwata
  • Patent number: 8187795
    Abstract: Described herein are processing techniques for fabrication of stretchable and/or flexible electronic devices using laser ablation patterning methods. The laser ablation patterning methods utilized herein allow for efficient manufacture of large area (e.g., up to 1 mm2 or greater or 1 m2 or greater) stretchable and/or flexible electronic devices, for example manufacturing methods permitting a reduced number of steps. The techniques described herein further provide for improved heterogeneous integration of components within an electronic device, for example components having improved alignment and/or relative positioning within an electronic device. Also described herein are flexible and/or stretchable electronic devices, such as interconnects, sensors and actuators.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: May 29, 2012
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Kanti Jain, Kevin Lin
  • Patent number: 8168372
    Abstract: Novel, developer-soluble, hard mask compositions and methods of using those compositions to form microelectronic structures are provided. The composition comprises the compound a compound for controlling development rate, and a crosslinking agent in a solvent system. The methods involve applying the composition to a substrate and curing the composition. An imaging layer is applied to the composition, followed by light exposure and developing, during which the light-exposed portions of the imaging layer are removed, along with portions of the hard mask composition adjacent said light-exposed portions. The size of the hard mask composition structures are controlled by the development rate, and they yield feature sizes that are a fraction of the imaging layer feature sizes, to give a pattern that can ultimately be transferred to the substrate.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: May 1, 2012
    Assignee: Brewer Science Inc.
    Inventor: Sam X. Sun
  • Patent number: 8163611
    Abstract: A resist pattern (5) is formed in a dimension of a limitation of an exposure resolution over a hard mask material film (4) over a work film (3). The material film (4) is processed using the resist pattern (5) as a mask. A hard mask pattern (6) is thereby formed. Thereby a resist pattern (7), over a non-selected region (6b), having an opening (7a) through which a selection region (6a) in the mask pattern is exposed is formed. Only the mask pattern (6a) exposed through the opening (7a) is slimmed by performing a selection etching, the work film (3) is etched by using the mask pattern (6). A work film pattern (8) is thereby formed, which include a wide pattern section (8a) of a dimension width of the limitation of the exposure resolution and a slimmed pattern section (8a) of a dimension that is not more than the limitation of the exposure resolution.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: April 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hashimoto, Soichi Inoue, Kazuhiro Takahata, Kei Yoshikawa
  • Patent number: 8153349
    Abstract: A polymer composition includes an aromatic ring-containing polymer represented by Formula 1: wherein m and n satisfy the relations 1?m<190, 0?n<190, and 1?m+n<190.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 10, 2012
    Assignee: Cheil Industries, Inc.
    Inventors: Hwan Sung Cheon, Jong Seob Kim, Kyong Ho Yoon, Min Soo Kim, Jin Kuk Lee, Jee Yun Song
  • Patent number: 8148050
    Abstract: Disclosed herein is a method for fabricating a probe needle tip of a probe card, in which, in order to prevent a poor grinding effect caused by irregular removal or flexibility of the photoresists laminated to be high in the course of polishing a first metal loaded into the opening of the photoresists laminated into a multilayer configuration upon formation of the probe needle tip of the probe card, a second metal is laminated on any one of one or more stacked photoresist layers, thus firmly holding the photoresist layers on/beneath the metal.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: April 3, 2012
    Assignees: Byung Ho Jo, Microfriend Inc.
    Inventor: Byung Ho Jo
  • Patent number: 8142984
    Abstract: Lithographically patterned nanowire electrodeposition (LPNE) combines attributes of photolithography with the versatility of bottom-up electrochemical synthesis. Photolithography is employed to define the position of a sacrificial nanoband electrode, preferably formed from a metal such as nickel, copper, silver, gold or the like, which is stripped using electrooxidation or a chemical etchant to advantageously recess the nanoband electrode between a substrate surface and the photoresist to form a trench defined by the substrate surface, the photoresist and the nanoband electrode. The trench acts as a “nanoform” to form an incipient nanowire during its electrodeposition. The width of the nanowire is determined by the electrodeposition duration while its height is determined by the height of the nanoband electrode.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: March 27, 2012
    Assignee: The Regents of the University of California
    Inventors: Reginald M. Penner, Erik J. Menke, Michael A. Thompson, Chengxiang Xiang
  • Patent number: 8142250
    Abstract: A method of forming a color filter touch sensing substrate integrates touch-sensing structures/elements of a touch panel into the inner side of the color filter substrate, which faces a thin film transistor substrate, and forms patterned assistant electrodes on the surfaces of the transparent sensing pads for decreasing the equivalent resistance of the touch-sensing structures/elements. Moreover, since an adjacent transparent conductive layer and an assistant electrode layer are patterned to form the transparent sensing pads and the patterned assistant electrodes, a simplified pattern-transferring process can be applied to the transparent sensing pads and the patterned assistant electrodes, or bridge structures can be formed from the assistant electrode layer for electrically connecting between some transparent sensing pads. Therefore, the forming process is simplified.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: March 27, 2012
    Assignee: AU Optronics Corp.
    Inventors: Yu-Feng Chien, Chau-Shiang Huang, Tun-Chun Yang, Seok-Lyul Lee
  • Patent number: 8137893
    Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.
    Type: Grant
    Filed: January 1, 2011
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Sean David Burns, Matthew E. Colburn, Steven John Holmes, Wu-Song Huang
  • Patent number: 8133659
    Abstract: This invention provides methods of creating via or trench structures on a developer-soluble hardmask layer using a multiple exposure-development process. The hardmask layer is patterned while the imaging layer is developed. After the imaging layer is stripped using organic solvents, the same hardmask can be further patterned using subsequent exposure-development processes. Eventually, the pattern can be transferred to the substrate using an etching process.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: March 13, 2012
    Assignee: Brewer Science Inc.
    Inventors: Sam X. Sun, Hao Xu, Tony D. Flaim
  • Patent number: 8105759
    Abstract: A photosensitive resin composition comprising (A) a binder polymer, (B) a photopolymerizing compound with a polymerizable ethylenic unsaturated bond, (C) a photoradical polymerization initiator containing a 2,4,5-triarylimidazole dimer or its derivative, and (D) a compound represented by the following general formula (1) (wherein R1 and R2 each independently represent C1-20 alkyl, etc., and R3, R4, R5, R6, R7, R8, R9 and R10 each independently represent hydrogen, etc.).
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: January 31, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masahiro Miyasaka, Takashi Kumaki
  • Patent number: 8101339
    Abstract: A photosensitive resin composition according to the invention comprises (A) a binder polymer, (B) a photopolymerizing compound with an ethylenic unsaturated group and (C) a photopolymerization initiator, wherein component (B) contains a compound represented by the following general formula (I). [Wherein R1-R3 each independently represent a group represented by the following general formula (II): or the following general formula (III): and at least one of R1-R3 is a group represented by general formula (III).
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: January 24, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventor: Yoshiki Ajioka
  • Patent number: 8084184
    Abstract: A composition for removing a photoresist includes a) an amine compound having a cyclic amine and/or a diamine, b) a glycol ether compound, c) a corrosion inhibitor and d) a polar solvent. The composition further includes a stripping promoter. Further disclosed is a method of manufacturing an array substrate using the composition for removing a photoresist.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: December 27, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Hyun Choung, Hong-Sick Park, Sun-Young Hong, Bong-Kyun Kim, Byeoung-Jin Lee, Byung-Uk Kim, Jong-Hyun Jeong, Suk-Il Yoon, Sung-Gun Shin, Soon-Beom Huh, Se-Hwan Jung, Doo-Young Jang
  • Patent number: 8080366
    Abstract: An in-line process for making a thin film electronic device on a substrate is described comprising the steps of: a) depositing a structurable layer onto a substrate; b) depositing a patternable material onto the structurable layer in a first pattern; and c) etching the structurable layer in areas uncovered by the patternable material. The steps are carried out without intermediate exposure of the substrate to ambient air.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: December 20, 2011
    Assignee: OTB Solar B.V.
    Inventors: Ronaldus Joannes Cornelis Maria Kok, Marinus Franciscus Johannes Evers, Franciscus Cornelius Dings
  • Patent number: 8052498
    Abstract: A method of forming a color filter touch sensing substrate integrates touch-sensing structures/elements of a touch panel into the inner side of the color filter substrate, which faces a thin film transistor substrate, and forms patterned assistant electrodes on the surfaces of the transparent sensing pads for decreasing the equivalent resistance of the touch-sensing structures/elements. Moreover, since an adjacent transparent conductive layer and an assistant electrode layer are patterned to form the transparent sensing pads and the patterned assistant electrodes, a simplified pattern-transferring process can be applied to the transparent sensing pads and the patterned assistant electrodes, or bridge structures can be formed from the assistant electrode layer for electrically connecting between some transparent sensing pads. Therefore, the forming process is simplified.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: November 8, 2011
    Assignee: AU Optronics Corp.
    Inventors: Yu-Feng Chien, Chau-Shiang Huang, Tun-Chun Yang, Seok-Lyul Lee
  • Patent number: 8053164
    Abstract: The present invention relates to a resist composition with a hardener and a solvent, and a method for forming a pattern using the resist composition. The hardener has a thermal-decomposable core part, and a first photosensitive bond art. The solvent has a low-molecular resin, and a second photosensitive bond part.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-Sung Kim, Seung-Jun Lee, Jung-Mok Bae
  • Patent number: 8017309
    Abstract: A method of manufacturing a wiring circuit board includes: preparing an insulating layer; forming conductive thin films on the upper surface and the side end surface of the insulating layer; covering the conductive thin films formed on the upper surface and the side end surface of the insulating layer with photoresists; arranging a photomask so that an end portion and a portion to be provided with a conductive layer in the conductive thin film formed on the upper surface of the insulating layer are shaded and exposing the photoresist covering the conductive thin film formed on the upper surface of the insulating layer from above through the photomask; exposing the photoresist covering the conductive thin film formed on the side end surface of the insulating layer from below; forming plating resists by removing unexposed portions of the photoresists so as to form exposed portions into patterns; forming an end portion conductive layer on the end portion of the conductive thin film formed on the upper surface of
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: September 13, 2011
    Assignee: Nitto Denko Corporation
    Inventor: Keiji Takemura
  • Patent number: 8007983
    Abstract: The photosensitive resin composition of the invention is characterized by comprising (A) a binder polymer, (B) a photopolymerizing compound with at least one polymerizable ethylenic unsaturated bond in the molecule, (C) a photopolymerization initiator and (D) a compound represented by the following general formula (1). In formula (1), R1, R2, R3 and R4 are each independently hydrogen or a compound of the following general formula (2). In general formula (2), R5 represents a C4-30 hydrocarbon group.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: August 30, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventor: Mitsuaki Watanabe
  • Patent number: 7989148
    Abstract: In a method for forming a photoelectric composite board (10) on which a photoelectric transducer (5) is mounted, photo-masks (111, 112, 113) which are used in processes to form the photoelectric composite board (10) are respectively disposed on the basis of a reference mark (33) previously formed on a metal thin film (101). In addition, openings (22) are formed on solder resist layers (8) by irradiating laser beams at positions defined on the basis of a reference point (4a) defined above a light deflector (4) formed on an end of a light guide (3).
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Tooru Nakashiba, Hiroyuki Yagyu, Shinji Hashimoto, Yuuki Kasai
  • Patent number: 7989142
    Abstract: An exemplary method for fabricating a TFT array substrate includes providing an insulating substrate (201); coating a gate metal layer (202) on the substrate; forming a plurality of gate electrodes (212) using a first photo-mask process; forming a gate insulating layer (203), a semiconducting layer (205), and a source/drain metal layer (206) on the substrate having the gate electrodes; forming a plurality of source electrodes (217) and a plurality of drain electrodes (218) using a second photo-mask process; forming a passivation material layer (209) and a photo resist layer on the gate insulating layer, the source electrodes and the drain electrodes; forming a passivation layer (219) and the photo resist pattern (234) using a third photo-mask process; forming a transparent conductive metal layer (204) on the photo resist pattern, the drain electrode and the gate insulating layer; and forming a pixel electrode (214) through removing the photo resist pattern.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Chimel Innolux Corporation
    Inventor: Jian-Jhong Fu
  • Patent number: 7979144
    Abstract: According to one embodiment, a pattern forming system includes a patterning tool, a multi-axis robot, and a simulation tool that are coupled to a pattern forming tool that is executed on a suitable computing system. The pattern forming tool receives a contour measurement from the patterning tool and transmits the measured contour to the simulation tool to model the electrical characteristics of a conductive pattern or a dielectric pattern on the measured contour. Upon receipt of the modeled characteristics, the pattern forming system may adjust one or more dimensions of the pattern according to the model, and subsequently create, using the patterning tool, the corrected pattern on the surface.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: July 12, 2011
    Assignee: Raytheon Company
    Inventors: Sankerlingam Rajendran, Billy D. Ables
  • Patent number: 7960090
    Abstract: A pattern forming method includes a step of forming a pattern of a resist on a surface of a thin film formed on the base material; a step of forming a reverse layer on the pattern of the resist; a step of forming a reverse pattern, of the reverse layer complementary to the pattern of the resist by removing the resist after removing the reverse layer to expose a surface of the resist; a step of forming a hard mask layer including the thin film, on which the reverse layer is formed, by etching the thin film through the reverse pattern of the reverse layer as a mask; and a step of etching the base material through, as a mask, the hard mask layer on which the reverse layer remains or the hard mask layer on which the reverse layer has been removed.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: June 14, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsunori Terasaki, Junichi Seki
  • Patent number: 7960095
    Abstract: Resist compositions having good footing properties even on difficult substrates are obtained by using a combination of base additives including a room temperature solid base, and a liquid low vapor pressure base. The compositions are especially useful on metal substrates such as chromium-containing layers commonly used in mask-making.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Wayne M. Moreau, Marie Angelopoulos, Wu-Song Huang, David R. Medeiros, Karen E. Petrillo
  • Patent number: 7955784
    Abstract: A photoresist composition includes about 100 parts by weight of resin mixture including novolak resin and acryl resin and about 10 parts to about 50 parts by weight of naphthoquinone diazosulfonic acid ester. A weight-average molecular weight of the novolak resin is no less than about 30,000. A weight-average molecular weight of the acryl resin is no less than about 20,000. The acryl resin makes up about 1% to about 15% of the total weight of the resin mixture. When a photoresist film formed using the photoresist composition is heated, a profile variation of the photoresist composition is relatively small. Therefore, a residual photoresist film has a uniform thickness, and a short circuit and/or an open defect in a TFT substrate may be reduced.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: June 7, 2011
    Assignees: Samsung Electronics Co., Ltd., AZ Electronic Materials (Japan) K.K.
    Inventors: Hi-Kuk Lee, Woo-Seok Jeon, Doo-Hee Jung, Jeong-Min Park, Deok-Man Kang, Si-Young Jung, Jae-Young Choi
  • Patent number: 7906274
    Abstract: A method of forming a lithographic template, the method including, inter alia, creating a multi-layered structure, by forming, on a body, a conducting layer, and forming on the conducting layer, a patterned layer having protrusions and recessions, the recessions exposing portions of the conducting layer; depositing a hard mask material anisotropically on the multi-layered structure covering a top surface of the patterned layer and the portions of the conducting layer; removing the patterned layer by a lift-off process, with the hard mask material remaining on the portions of the conducting layer; positioning a resist pattern on the multi-layered structure to define a region of the multi-layered structure; and selectively removing portions of the multi-layered structure in superimposition with the region using the hard mask material as an etching mask.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: March 15, 2011
    Assignee: Molecular Imprints, Inc.
    Inventors: Gerard M. Schmid, Douglas J. Resnick, Michael N. Miller
  • Patent number: 7887997
    Abstract: A manufacturing method for conducting films on two opposite surfaces of a transparent substrate of a touch control circuit, includes: contacting a first photoresist layer having photosensitive and discolored emulsion on a first conducting coat formed on a first surface of the transparent substrate, and contacting a second photoresist layer on a second conducting coat formed on a second surface of the transparent substrate; exposing the first photoresist layer to form a circuit pattern with distinguishable color on exposed regions of the first photoresist layer; employing the circuit pattern as an aligning benchmark for the second photoresist layer, and exposing the second photoresist layer accordingly; developing and etching those arranged on the two surfaces of the transparent substrate at the same time to form a first conducting film of a touch control circuit from the first conducting coat and form a second conducting film of the touch control circuit from the second conducting coat.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: February 15, 2011
    Assignee: TPK Touch Solutions Inc.
    Inventor: Wei-Ping Chou
  • Publication number: 20110025909
    Abstract: A method for coating wafer level camera modules, comprising: providing a wafer level camera module comprising an outer surface, depositing an opaque layer onto the outer surface, applying a photoresist layer onto the opaque layer, exposing a selected area of the photoresist layer to light to remove the selected area, etching part of the opaque layer within the selected area to form an light incident hole, and removing the remaining photoresist layer.
    Type: Application
    Filed: June 28, 2010
    Publication date: February 3, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: TAI-SHENG TSAI
  • Patent number: 7879533
    Abstract: An etching residue removal method includes a cleaning sequence. Preferably, the cleaning sequence has a first washing processing, first drying processing, stripper processing, rinsing processing, second washing processing and second drying processing. In the first washing processing, an insulation film and metal lines thereon are washed by pure water. In the first drying processing, the insulation film and metal lines are dried in a nitrogen atmosphere at room temperature, for example. In the stripper processing, the etching residue on the insulation film and metal lines are stripped by amine stripper, for example. In the rinsing processing, the insulation film and metal lines are rinsed with an IPA rinse solution, for example. In the second washing processing, the insulation film and metal lines are washed with pure water. In the second drying processing, the insulation film and metal lines are dried in the nitrogen atmosphere at room temperature, for example.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: February 1, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takeshi Itou
  • Patent number: 7875419
    Abstract: It is an object to provide a technique for removing a resist favorably without leaving residue in the case of using a nonaqueous resist stripper. According to the present invention, in order to achieve the object, when a resist pattern is removed by using the nonaqueous resist stripper, it becomes easier to remove the resist pattern after dry etching or ion doping, by performing exposure treatment on the resist pattern. After a resist pattern is formed from a DNQ-novolac resin type of positive resist composition, the resist pattern is irradiated with light within the range of photosensitive wavelength of the DNQ photosensitizer, thereby removing the resist pattern with the nonaqueous resist stripper.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: January 25, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaharu Nagai, Kiyofumi Ogino, Teruhisa Nakai, Eiji Shioda
  • Patent number: 7862982
    Abstract: A new lithographic process comprises reducing the linewidth of an image while maintaining the lithographic process window, and using this process to fabricate pitch split structures comprising nm order (e.g., about 22 nm) node semiconductor devices. The process comprises applying a lithographic resist layer on a surface of a substrate and patterning and developing the lithographic resist layer to form a nm order node image having an initial line width. Overcoating the nm order node image with an acidic polymer produces an acidic polymer coated image. Heating the acidic polymer coated image gives a heat treated coating on the image, the heating being conducted at a temperature and for a time sufficient to reduce the initial linewidth to a subsequent narrowed linewidth. Developing the heated treated coating removes it from the image resulting in a free-standing trimmed lithographic feature on the substrate. Optionally repeating the foregoing steps further reduces the linewidth of the narrowed line.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: January 4, 2011
    Assignee: International Business Machines Corporation
    Inventors: Sean David Burns, Matthew E. Colburn, Steven John Holmes, Wu-Song Huang
  • Patent number: 7838433
    Abstract: A method and apparatus for process integration in manufacture of a photomask are disclosed. In one embodiment, a cluster tool suitable for process integration in manufacture of a photomask including a vacuum transfer chamber having coupled thereto at least one hard mask deposition chamber and at least one plasma chamber configured for etching chromium. In another embodiment, a method for process integration in manufacture of a photomask includes depositing a hard mask on a substrate in a first processing chamber, depositing a resist layer on the substrate, patterning the resist layer, etching the hard mask through apertures formed in the patterned resist layer in a second chamber; and etching a chromium layer through apertures formed in the hard mask in a third chamber.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: November 23, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Ajay Kumar
  • Patent number: 7759053
    Abstract: The invention includes methods of fabricating integrated circuitry and semiconductor processing polymer residue removing solutions. In one implementation, a method of fabricating integrated circuitry includes forming a conductive metal line over a semiconductor substrate. The conductive line is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a method of fabricating integrated circuitry includes forming an insulating layer over a semiconductor substrate. A contact opening is at least partially formed into the insulating layer. The contact opening is exposed to a solution comprising an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. In one implementation, a semiconductor processing polymer residue removing solution comprises an inorganic acid, hydrogen peroxide and a carboxylic acid buffering agent. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: July 20, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Donald L. Yates
  • Patent number: 7758759
    Abstract: A process for etching a metal or alloy surface which comprises applying an etch-resist ink by ink jet printing to selected areas of the metal or alloy, solidifying the etch-resist ink without the use of actinic light and/or particle beam radiation and then removing the exposed metal or alloy by a chemical etching process wherein the etch-resist ink comprises the components: A) 60 to 100 parts carrier vehicle comprising one or more components which contain at least one metal chelating group; D) 0 to 40 parts colorant; and E) 0 to 5 parts surfactant; wherein the ink has a viscosity of not greater than 30 cPs (mPa·s) at the firing temperature, all parts are by weight and the total number of parts A)+B)+C)=100.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: July 20, 2010
    Assignee: Fujifilm Imaging Colorants Limited
    Inventors: Mark Robert James, David Cottrell
  • Patent number: 7754416
    Abstract: This process for producing a resist pattern includes: the step of laminating (a) a support having an upper surface on which copper exists, (b) an inorganic substance layer consisting of an inorganic substance supplied from an inorganic substance source, and (c) a photoresist layer consisting of a chemically amplified type positive photoresist composition, to obtain a photoresist laminate, the step of selectively irradiating active light or radioactive rays to said photoresist laminate, and the step of developing said (c) photoresist layer together with said (b) inorganic substance layer to form a resist pattern.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: July 13, 2010
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Koichi Misumi, Koji Saito, Kaoru Ishikawa
  • Patent number: 7749680
    Abstract: A photoresist composition includes a base resin, a copolymer of acrylic acid or methacrylic acid and 3,3-dimethoxypropene, a photoacid generator, an organic base, and an organic solvent, and is used for forming a fine (micro) pattern in a semiconductor device by double patterning. The invention method can markedly reduce the number of steps in etching and hard mask deposition processes, so that work hours and manufacturing costs may be reduced, contributing to an increase in yield of semiconductor devices.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: July 6, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae Chang Jung, Sung Koo Lee
  • Patent number: 7745101
    Abstract: A method of making a metallic pattern (250) comprises: depositing a layer of photoresist (130) on a substrate (110); forming a pattern on the photoresist; depositing a layer of metal nanoparticles (190) on the photoresist and pattern; removing the photoresist and overlying metal nanoparticles on the photoresist; and sintering the remaining nanoparticles to form a metallic pattern.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: June 29, 2010
    Assignee: Eastman Kodak Company
    Inventors: Lee W. Tutt, Therese M. Feller
  • Patent number: 7736822
    Abstract: There is provided a resist underlayer coating forming composition used in processes for manufacturing a mask blank and a mask, and a mask blank and a mask manufactured from the composition. The resist underlayer coating forming composition comprises a polymer compound having a halogen atom-containing repeating structural unit and a solvent. In a mask blank including a thin film for forming transfer pattern and a chemically-amplified type resist coating on a substrate in that order, the composition is used for forming a resist underlayer coating between the thin film for forming transfer pattern and the resist coating. The polymer compound is preferably a compound containing a halogen atom in an amount of at least 10 mass %.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: June 15, 2010
    Assignees: Hoya Corporation, Nissan Chemical Industries, Ltd.
    Inventors: Masahiro Hashimoto, Tomoyuki Enomoto, Takahiro Sakaguchi, Rikimaru Sakamoto, Masaki Nagai
  • Patent number: 7718350
    Abstract: The frame plating process of the invention comprises the dry film resist pattern formation step at which a part of the dry film resist is located in such a way as to cap the upper position of the given pattern of opening concavity corresponding to the site needing film thickness precision. It is thus possible to obtain a fairly good film thickness distribution at the specific site needing film thickness precision in a simple manner yet without depending on the film thickness distribution of the plated film based on plating conditions.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: May 18, 2010
    Assignee: TDK Corporation
    Inventor: Akifumi Kamijima
  • Patent number: 7700269
    Abstract: A method of forming a stacked structure in an electronic device, where a photoresist for performing multi-patterning processes is used. Also, a method of manufacturing a FED in which different structures can be multi-patterned by using a single photoresist mask. The photoresist has a solubility to a solvent by heat-treatment after exposure, and a complicated structure can be formed using the photoresist.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 20, 2010
    Assignees: Samsung SDI Co., Ltd., E. I. du Pont de Nemours and Company
    Inventors: Shang-Hyeun Park, Hang-Woo Lee, Young-Hwan Kim
  • Patent number: 7678532
    Abstract: The present invention provides a method of processing a substrate, comprising a reflow process for forming a desired pattern by dissolving a resist pattern, whereby occurrence of defectives, such as disconnection, can be prevented, and a pattern having an appropriate uniformity can be formed efficiently on each predetermined area desired to be masked. From a photoresist pattern 206 including thicker film portions and thinner film portions, the thinner film portions are removed by a re-developing process. Next, the photoresist so formed by the re-developing process on a backing layer 205 is dissolved such that it passes through a stepped portion 205a formed at each edge portion 205b of the backing layer 205, thereby masking a predetermined area Tg.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: March 16, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Yutaka Asou, Masatoshi Shiraishi
  • Publication number: 20100055618
    Abstract: A method of manufacturing an array substrate of a transreflective LCD is provided in the invention. In the method, a gate line, a common line and an embossing pattern are formed with a full tone mask, a data line, a source/drain electrode, a reflective plate and a TFT channel region are formed with a first dual tone mask, and a pixel electrode connected with the drain electrode is formed with a second dual tone mask, and thus a horizontal electric field type transreflective LCD can be obtained.
    Type: Application
    Filed: August 26, 2009
    Publication date: March 4, 2010
    Inventors: Young Suk Song, Seung Jin Choi, Seong Yeol Yoo
  • Patent number: 7670747
    Abstract: A pattern transfer method includes first through third steps. In the first step, a desired pattern is transferred onto a resin layer formed on a substrate, a release layer being disposed between the substrate and the resin layer. In the second step, which is executed after the first step, the pattern having been transferred onto the resin layer is transferred to the substrate and the release layer is partially exposed. In the third step, which is executed after the second step, the release layer present between the substrate and the resin layer is dissolved and is thus removed from the substrate.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: March 2, 2010
    Assignee: Nikon Corporation
    Inventors: Toshio Ikugata, Akiko Miyakawa
  • Patent number: 7642039
    Abstract: A method of producing an address plate comprising the steps of; coating a layer of conducting inorganic material onto a substrate, coating a layer of photoresist above this layer of conductive material and curing this layer, exposing, through a mask, the desired pattern of the conductors onto the layer of photoresist, developing the photoresist and etching the layer of the conductive material and coating the resulting etched layer with a layer of dielectric material. A further layer of photoresist is then applied, the thickness of this layer being equal to the desired height of a relief pattern, curing the further layer of photoresist, exposing, through a second mask, the desired structure of the relief pattern onto the layer of photoresist, developing the photoresist and allowing the layer to dry. This results in spacers raised above the layer of dielectric material.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: January 5, 2010
    Assignee: Eastman Kodak Company
    Inventors: John R. Fyson, Christopher B. Rider
  • Patent number: 7629693
    Abstract: Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: December 8, 2009
    Assignee: Micron Technology, Inc
    Inventors: Mirzafer K. Abatchev, Gurtej Sandhu, Luan Tran, William T. Rericha, D. Mark Durcan
  • Patent number: 7608390
    Abstract: The present invention discloses a composition suitable for use as a top antireflective coating and barrier layer for immersion lithography. The inventive composition is soluble in aqueous base solutions and insoluble in water. The inventive composition comprises a polymer having at least one hydrophobic moiety, at least one acidic moiety with a pKa of 1 or less, and at least one aqueous base soluble moiety. The present invention also discloses a method of forming a patterned layer on a substrate by using the inventive composition in lithography.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: October 27, 2009
    Assignee: International Business Machines Corporation
    Inventors: Mahmoud Khojasteh, Wu-Song Huang, Margaret C. Lawson, Kaushal S. Patel, Irene Popova, Pushkara R. Varanasi
  • Publication number: 20090250253
    Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The method of manufacturing a printed circuit board in accordance with an embodiment of the present invention includes: providing a first resin layer having a first pattern on one surface thereof; forming a conductive bump, which is electrically connected to the first pattern, on one surface of the first resin layer; compressing an insulation layer and the first resin layer such that the conductive bump passes through the insulation layer; laminating a second resin layer, which has a second pattern on a surface thereof facing the insulation layer, on the insulation layer; and forming an opening by etching a part of at least one of the first resin layer and the second resin layer.
    Type: Application
    Filed: October 15, 2008
    Publication date: October 8, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho-Sik Park, Keung-Jin Sohn, Joon-Sik Shin, Sang-Youp Lee, Joung-Gul Ryu, Jung-Hwan Park, Jee-Soo Mok
  • Patent number: 7595143
    Abstract: A photoresist composition includes about 10 to about 70% by weight of a binder resin including a phenol-based polymer, about 0.5 to about 10% by weight of a photo-acid generator, about 1 to about 20% by weight of a cross-linker, about 0.1 to about 5% by weight of a dye and about 10 to about 80% by weight of a solvent. The photoresist composition may be applied to, for example, a method of manufacturing a TFT substrate.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: September 29, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Min Park, Hi-Kuk Lee, Hyoc-Min Youn, Ki-Hyuk Koo, Byung-Uk Kim
  • Patent number: 7585613
    Abstract: There is disclosed an antireflection film composition used for lithography comprising: at least a light absorbing silicone resin with mass average molecular weight of 30,000 or less in which components having molecular weight of less than 600 account for 5% or less of the whole resin; a first acid generator that is decomposed at a temperature of 200 degrees C. or less; and an organic solvent. There can be provided an antireflection film composition that prevents intermixing in the vicinity of the antireflection film/photoresist film interface, that provides a resist pattern over the antireflection film with almost vertical wall profile, and that provides less damage to an underlying layer of the antireflection film.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: September 8, 2009
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tsutomu Ogihara, Motoaki Iwabuchi, Takeshi Asano, Takafumi Ueda