Abstract: A method of manufacturing a selectively relief-treated image member that comprises: (a) providing a precursor of the image member, the precursor comprising a surface having an image-forming layer comprising a photosensitive resist composition comprising: (i) a polymerizable material, and (ii) a binder; (b) delivering radiation image-wise to the precursor; (c) developing the precursor in a developer in order to selectively remove the image-forming layer in regions to which said radiation was not delivered image-wise in step (b); and (d) contacting the image-wise exposed precursor with a relief-treatment material, in order to selectively relief-treat regions of the surface of the precursor in which the image-forming layer was removed on development in step (c).

Abstract: A method for adjusting out of tolerance critical dimensions of an under processed photomask to be within predetermined defined limits after the photosensistive resist material has been removed from the exposed photomask. The method includes measuring the critical dimensions of the opaque material of the under processed photomask after the photosensitive resist material has been removed, and exposing the photomask to electrified plasma gases for removing excess opaque material without degrading the reflectivity of the photomask beyond specified limits.

Abstract: A socket assembly for removably receiving a solder ball of a chip package and methods for forming the same. The socket assembly is a raised construction formed over a substrate and includes a socket, a ball contact structure, and an electrical trace. A relatively thick photoresist layer, which may have a thickness in a range from about 20 microns to about 450 microns, is used in the process of forming the socket assembly. The photoresist layer may have formed therein a patterned opening used as a mold for the socket assembly. Alternatively, the photoresist layer may be an integral and permanent component of the socket assembly. The socket assembly is configured such that a solder ball may be disposed in the socket so as to be electrically connected to the socket assembly. Optionally, the socket assembly includes one or more ball penetration structures for facilitating the establishment of electrical contact and for adapting the socket assembly to solder balls of different dimensions.

Abstract: This invention provides a method and apparatus for depositing a silicon oxide film over an antireflective layer to reduce footing experienced in the a subsequently applied photoresist layer without substantially altering the optical qualities of the antireflective layer. The invention thereby provides more accurate etching of underlying layers during patterning operations. The invention is also capable of providing more accurate patterning of thin films by reducing inaccuracies caused by excessive etching of photoresist during patterning. Additionally, the film of the present invention may be patterned and used as a mask in the patterning of underlying layers.

Abstract: Acid-catalyzed positive photoresist compositions which are imageable with 193 nm radiation and are developable to form photoresist structures of high resolution and high etch resistance are enabled by the use of a combination of cyclic olefin polymer, photosensitive acid generator and a hydrophobic non-steroidal multi-alicyclic component containing plural acid labile linking groups. The cyclic olefin polymers preferably contain i) cyclic olefin units having polar functional moieties, ii) cyclic olefin units having acid labile moieties that inhibit solubility in aqueous alkaline solutions.

Abstract: A method of patterning electrically conductive polymers is: forming a surface of a conducting polymer on a substrate, applying a mask to this surface, applying irradiation to form regions of exposed conducting polymer and regions of unexposed conducting polymer, removing the mask, and gently removing by non-chemically reactive means the regions of exposed conducting polymer.

Abstract: Partial photoresist etching is disclosed. A film on a semiconductor wafer includes a hard mask, doped polysilicon below the hard mask, undoped polysilicon below the doped polysilicon, and a stop layer below the undoped polysilicon. Photoresist etching is performed through the hard mask and the doped polysilicon by using a photoresist mask. After the photoresist mask is removed, photoresist-free etching is performed through the undoped polysilicon through to the stop layer by using the hard mask. A semiconductor device is disclosed that may be fabricated using this partial photoresist etching process.

Abstract: Copolymers prepared by radical polymerization of a substituted norbornene monomer and a fluoromethacrylic acid, fluoromethacrylonitrile, or fluoromethacrylate comonomer are provided. The polymers are useful in lithographic phtoresist compositions, particularly chemical amplification resists. In a preferred embodiment, the polymers are substantially transparent to deep ultraviolet (DUV) radiation, i.e., radiation of a wavelength less than 250 nm, including 157 nm, 193 nm and 248 nm radiation, and are thus useful in DUV lithographic photoresist compositions. A process for using the composition to generate resist images on a substrate is also provided, i.e., in the manufacture of integrated circuits or the like.

Abstract: A two step passivation procedure, used to remove chlorine from polymer layers formed on the sides of metal structures, prior to removal of the defining photoresist shape, and of the polymer layers, has been developed. The procedure features a first passivation step, performed at a low substrate temperature, (100-140° C.) at low RF power, (150 to 250 watts), and using a 2 to 1 ratio of oxygen to water, resulting in removal of corrosion causing chlorine, from the polymer layers, located on the sides of a first group of defined metal structures, which in turn reside at the edge of a semiconductor substrate. A second passivation step, of the two step passivation procedure, is then performed using water only, at higher substrate temperature, (200-250° C.), resulting in removal of chlorine from polymer layers located on the sides of a second set of metal structures, which reside at the center of the semiconductor substrate.

Abstract: A method of manufacturing a printed circuit board (PCB) having wiring layers electrically connected via solid cylindrical copper interconnecting bodies includes the following steps: locally providing on a base or an insulated layer with a first copper foil wiring layer; fully coating the first wiring layer with a conductive layer; coating areas on the first wiring layer that are not used for interconnection purpose with a layer of dry-film resist to expose other areas on the first wiring layer to be used for interconnection purpose; removing the conductive layer by micro etching; forming solid cylindrical copper interconnecting bodies of a desired height on the interconnecting areas through electric plating; removing the dry-film resist, so that the solid cylindrical copper interconnecting bodies consisting of pure copper project from the interconnecting areas; and providing a second wiring layer over the first wiring layer.

Abstract: A semiconductor packaging part and a method of forming the part by applying a minute plating with a high positional accuracy to a semiconductor chip to be packaged. A pair of alignment holes 2, 3 are formed at a pitch equal to n-times (n=1, 2 . . .

Abstract: A method of etching a noble metal electrode layer disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.35 &mgr;m and having a noble metal profile equal to or greater than about 80°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the noble metal electrode layer by employing a high density inductively coupled plasma of an etchants gas comprising a gas selected from the group consisting nitrogen, oxygen, a halogen (e.g., chlorine), argon, and a gas selected from the group consisting of BCl3, HBr, and SiCl4 mixtures thereof. A semiconductor device having a substrate and a plurality of noble metal electrodes supported by the substrate. The noble metal electrodes have a dimension (e.g., a width) which include a value equal to or less than about 0.3 &mgr;m and a platinum profile equal to or greater than about 85°.

Abstract: A ruler or similar flat article is provided with an upstanding handle in the form of a decorative design. The ruler and handle may be formed by a photoetch or chemical milling process, with full etching through the metal at edges and partial etching at the design elements in the body portion and handle portion. The handle portion can be unitarily formed and bent at a partially etched join line, and then reinforced using a solder or a braze. Brass or another metal may be used. The partially etched design detail in the handle portion creates a textured surface that facilitates gripping.

Abstract: Disclosed is an etching method of a laminated assembly having a metal layer and a non-thermoplastic polyimide layer bonded together via thermoplastic polyimide, which comprises using an etchant at least containing an alkali metal hydroxide, water and oxyalkylamine, wherein the concentrations of the alkali metal hydroxide (X weight %) and of the water (Y weight %) have relationships represented by coordinate points present within a region (inclusive of boundary lines) defined by the following expressions [1] and [2]:

Abstract: A method for fabricating a mask for patterning a radiation sensitive layer in a lithographic printer is disclosed. An attenuating (absorptive or reflective) layer is coated over a substantially transparent base substrate such that after processing a two-dimensional spatially varying attenuating pattern is created with a continuously or discretely varying transmission or reflection function. In accordance with the present invention the two-dimensional attenuating pattern is formed by e-beam patterning of radiation sensitive layer to create a three-dimensional surface relief pattern. This pattern is transferred to the attenuating layer by an anisotropic etch, typically a directional reactive plasma etch. The attenuation of this radiation absorbing or reflecting layer varies with layer thickness. In one embodiment of this invention the attenuation of the mask would vary spatially in a continuous manner.

Abstract: A method of fabricating a liquid crystal display device includes forming first and second metal layers on a substrate, forming a first photoresist layer on the second metal layer, partially removing the first photoresist layer, so that the first photoresist layer has first and second portions, removing the first portion of the first photoresist layer and a portion of the second metal layer, so that a portion of the first metal layer is exposed, forming an insulating layer on the second metal layer including the exposed portion of the first metal layer, forming a second photoresist layer on the insulating layer, removing a portion of the second photoresist layer to expose a portion of the insulating layer, and removing the portion of the insulating layer and first metal layer.

Abstract: A method of making a electrically operated programmable resistance memory element. A silylated photoresist sidewall spacer is used as a mask for form raised portions on an edge of a conductive layer. The modified conductive layer is used as an electrode for the memory element.

Abstract: A method of preparing an x-ray mask comprising providing a substrate, and applying sequentially to a surface of the substrate i) an etch stop layer resistant to etchant for an x-ray absorber, and ii) an x-ray absorber layer. The method then includes removing a portion of the substrate below the layers to create an active region of the substrate above the removed portion of the substrate and an inactive region over remaining portions of the substrate, applying a resist layer above the absorber layer, and exposing a portion of the resist layer using electron beam irradiation and developing the resist layer to form a latent mask image over the active region of the substrate.

Abstract: A new method of forming a bi-layer photoresist mask with a reduced critical dimension bias between isolated and dense lines and reduced edge roughness is described. A layer to be etched is provided on a semiconductor substrate wherein the surface of the layer has an uneven topography. The layer to be etched is coated with a first planarized photoresist layer which is baked. The first photoresist layer is coated with a second silicon-containing photoresist layer which is baked. Portions of the second photoresist layer not covered by a mask are exposed to actinic light. The exposed portions of the second photoresist layer are developed away. Then, portions of the first photoresist layer not covered by the second photoresist layer remaining are developed away in a dry development step wherein sufficient SO2 gas is included in the developing recipe to reduce microloading to form a bi-layer photoresist mask comprising the first and second photoresist layers remaining.

Abstract: The invention provides a structuring method, in particular for stepped wafer or die surfaces. The method includes photolithographically exposing a pattern comprising at least a first pattern portion and a second pattern portion onto a surface, said surface comprising at least a first surface portion at which a tangential plane to the surface extends in a first plane and a second surface portion at which a tangential plane to the surface extends in a second plane not coinciding with the first plane. The method comprises a first exposure step, in which the first pattern portion is exposed. Therein, the first pattern portion is focused into a first focal plane. The method further comprises a second exposure step, in which the second pattern portion is exposed. Therein, the second pattern portion is focused into a second focal plane which is different from the first focal plane.

Abstract: Novel norbornene fluoroacrylate copolymers are provided. The polymers are useful in lithographic photoresist compositions, particularly chemical amplification resists. In a preferred embodiment, the polymers are substantially transparent to deep ultraviolet (DUV) radiation, i.e., radiation of a wavelength less than 250 nm, including 157 nm, 193 nm and 248 nm radiation, and are thus useful in DUV lithographic photoresist compositions. A process for using the composition to generate resist images on a substrate is also provided, i.e., in the manufacture of integrated circuits or the like.

Abstract: This production process is designed to produce a chromium layer (4) making it possible as it were for the material of the connection bump (8) to remain in a region perfectly bounded by the chromium layer (4).

Abstract: Provided is a method of producing a printed circuit board. The method comprises preparing a base having a plurality of through via conductors having through holes, filling the through holes of the through via conductors with resin paste by printing in such a manner that, of the through holes, those which are arranged at smaller intervals are filled with a smaller amount of resin paste than those which are arranged at larger intervals, curing the resin paste, and removing an unnecessary portion of resin resulting from the curing of the resin paste. A mask used for carrying out the filling by printing is also provided.

Abstract: A low cost, durable mask for use in structuring anodically bondable glass materials and other structurable glass materials.

Abstract: Disclosed is a method for fabricating a plate-type magnetic resistance sensor chip simply and easily. First, a characteristic membrane composed of NiCo and NiFe is deposited over a surface of a glass wafer, exposed to light, and etched in a predetermined pattern to establish sensing parts. Then, a protective film is formed atop each of the sensing parts by depositing a SiO2 membrane over the glass wafer, exposing the SiO2 membrane to light, and etching the SiO2 membrane in the same pattern as in the sensing part. The resulting structure is subjected to sand blasting to form through-holes at every corner of the sensing parts. A NiFe film is deposited around the through-holes on both sides of the glass wafer and within the through-holes to form conductors.

Abstract: Antireflective compositions characterized by the presence of an SiO-containing polymer having pendant chromophore moieties are useful antireflective coating/hardmask compositions in lithographic processes. These compositions provide outstanding optical, mechanical and etch selectivity properties while being applicable using spin-on application techniques. The compositions are especially useful in lithographic processes used to configure underlying material layers on a substrate, especially metal or semiconductor layers.

Abstract: A negative pattern is formed to be transparent in the far ultraviolet region including the wavelength 193 nm of an ArF excimer laser and, despite its chemical structure having high dry etching, does not swell and has excellent resolution. An acid-catalyzed reaction is utilized wherein a &ggr;-hydroxy or &dgr;-hydroxy carboxylic acid structure is partially or entirely converted to a &ggr;-lactone or &dgr;-lactone structure. The negative pattern is developed with an aqueous alkali solution without swelling.

Abstract: A method for creating a photomask which includes a layer of hard mask material the inclusion of which improves the uniformity of critical dimensions on the photomask by minimizing the affect of macro and micro loading. The method for producing the photomask of the instant invention includes two etching processes. The first etching process etches the layer of hard mask, and the second etching process etches the anti-reflective material and opaque material.

Abstract: A fabrication method for a self-aligned metal-insulator-metal capacitor is described. A plurality of metal interconnects is provided. A metal interconnect is etched back to form a recess in the metal interconnect using a patterned photoresist as a mask. A capacitor insulator is formed on the resulting structure, partially filling the recess in the metal interconnect and covering other metal interconnects. A top electrode metal layer is then deposited on the capacitor insulator, completely filling the recess in the metal interconnect. The top electrode metal layer that is formed above the recess of the metal interconnect is subsequently removed.

Abstract: The present invention relates to a method for mitigating formation of silicon grass. A silylation process is performed on a semiconductor structure, the structure including a photoresist layer, an underlayer under the photoresist layer, and a substrate under the underlayer. A chemical mechanical polishing process is employed to remove a portion of the photoresist layer.

Abstract: A lithographic photoresist composition is provided that can be used as a chemical amplification photoresist. In a preferred embodiment, the composition is substantially transparent to deep ultraviolet radiation, i.e., radiation of a wavelength less than 250 nm, including 157 nm, 193 nm and 248 nm radiation, and has improved sensitivity and resolution. The composition comprises a fluorinated vinylic polymer, particularly a fluorinated methacrylate, a fluorinated methacrylonitrile, or a fluorinated methacrylic acid, and a photoacid generator. The polymer may be a homopolymer or a copolymer. A process for using the composition to generate resist images on a substrate is also provided, i.e., in the manufacture of integrated circuits or the like.

Abstract: Disclosed are methods for forming a resist pattern which solve a problem caused by halation and interference phenomena due to reflected light from the substrate. A first method forms between the substrate and resist film an anti-reflective film whose photoabsorbance of the exposure light is greater on the substrate surface side than on the resist surface side. A second method forms between the substrate and resist film a two-layer anti-reflective film made up of an upper interference film for the exposure light and a lower film having higher exposure light absorbance than the upper film and functions as a light shielding film. A third method forms between the substrate and resist film a two-layer anti-reflective film consisting of a lower film that reflects exposure light and an upper film that is an interference film for the exposure light.

Abstract: A method of programming a conductive semiconductor device having a plurality of conductive links by selective removal of all or portions of the conductive link using photolithographic and subtractive etching. Removal of only pre-selected conductive links is accomplished by use of a programmable array shutter to expose photoresist only above the conductive links to be removed.

Abstract: A method of forming a semiconductor device, includes providing a structure having a first critical dimension, forming a lithographic pattern on the structure, and etching the structure with an O2-containing material to trim the first critical dimension to a second critical dimension, the second critical dimension being smaller than the first critical dimension. Thereafter, any offset between the nested features and the isolated feature can be corrected.

Abstract: One or more through holes are formed by a process in a printed circuit board substrate formed of a resinous dielectric sheet and a conductive layer covering one surface of the dielectric sheet. The process involves the forming by laser one or more cavities on other surface of the dielectric sheet such that the cavities penetrate only the dielectric sheet, without penetrating the conductive layer. Both surfaces of the dielectric sheet are coated with a liquid photoresist layer such that the cavities are filled with the photoresist. A plurality of small areas are formed by photolithography on the surface which is covered with the conductive layer. The small areas are corresponding in location and shape to the cavities which may be of any shape. The small areas are stripped of the conductive, layer by etching before the cavities are stripped of the photoresist. The through holes are thus formed in the small areas defined by the cavities.

Abstract: A precursor for electronic parts, for example printed circuit boards, has a negative-working thermally-imagable layer on a substrate, for example a copper board or semiconductor. The layer comprises a cross-linking agent, a thermally-activated acid generator, and a polymeric substance containing polyvinylphenol units and alkyl acrylate units. Such as layer has improved mechanical properties with maintenance of good imaging properties.

Abstract: A method for manufacturing an LCD including at least two stacked thin layers in which the upper thin film smoothly and completely covers the lower thin film includes the steps of coating a photo-resist on a patterned layer, patterning the photo-resist by exposing and developing the photo-resist with a mask which has lines and spaces in which a distance between the lines is smaller than a resolution of an exposure system used and etching the metal layer using the patterned photo-resist as a mask. The resulting photo-resist pattern has a comb shape.

Abstract: A method for fabricating a resonator, and in particular, a thin film bulk acoustic resonator (FBAR), and a resonator embodying the method are disclosed. An FBAR is fabricated on a substrate by reducing mass from a top electrode layer. For a substrate having multiple resonators, mass is reduced from only selected resonator to provide resonators having different resonance frequencies on the same substrate.

Abstract: A method of fabricating a metal-insulator-metal capacitor (MIMcap) (230), including forming a bottom capacitor plate (210), and depositing a capacitor dielectric (212) over the bottom plate (210). A conductive layer (213) is deposited over the capacitor dielectric (212). A photoresist (216) is deposited over the conductive layer (213). The conductive layer (213) is exposed to an isotropic etchant (224) to form a top capacitor plate (214). Portions (226) of the conductive layer (213) are undercut from beneath the photoresist (216) when forming the top plate (214).

Abstract: Conductive layers are formed in the trenches made in an insulating film in the following manner. First, an amorphous silicon film 26A is deposited in the trenches 25 made in a silicon oxide film 24. A photoresist film 30 is then formed on the amorphous silicon film 26A by means of spin coating. Then, exposure light is applied to the entire surface of the photoresist film 30, thereby exposing to light those parts of the photoresist film 30 which lie outside the trenches 25. The other parts of the photoresist film 30, which lie in the trenches 25 are not exposed to light because the light reaching them is inadequate. Further, the photoresist film 30 is developed thereby removing those parts of the film 30 which lie outside the trenches 25 and which have been exposed to light. Thereafter, those parts of the amorphous silicon film 26A, which lie outside the trenches 25, are removed by means of dry etching using, as a mask, the unexposed parts of the photoresist film 30 which remain in the trenches 25.

Abstract: A method of making a multilayer buildup printed circuit board and mounting substrate wherein a resin laminated wiring sheet, which has a copper foil, an epoxy-acrylate photosensitive resin composition having a fluorene structure, and a conductive pattern, are overlaid on the conductive pattern side of a supporting substrate at 100° C. and 3 kg/cm2, and adhered thereto at 200 to 300° C. and 10 kg/cm2. The copper foil is entirely etched by wet-etching or is etched into a predetermined pattern so as to form a wiring structure. Since the epoxy-acrylate photosensitive resin composition is not treated at 100° C. or more, and hence is in a semi-cured state, the epoxy-acrylate photosensitive resin composition can be heat-bonded onto the supporting substrate.

Abstract: Features of two or more distinct sizes designed to optimize performance of an integrated circuit device are formed by transferring a pattern from a resist patterned with features of a single minimum feature size for which a resist exposure tool is optimized to a layer of preferably soluble material such as germanium oxide. Portions of this pattern are then enlarged using a block-out mask and the resulting pattern transferred to a further underlying layer preferably using an anisotropic reactive ion etch. The soluble material can then be removed leaving a robust mask with differing feature sizes for further processing. Preferably, Damascene conductive lines and vias are formed by providing an insulator as the further underlying material and filling the openings with metal or other conductive material.

Abstract: A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and a transition metal layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the transition metal layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the transition metal layer. The first etch step includes an etch chemistry that is selective to the transition metal layer over the ultra-thin photoresist layer and the dielectric layer. The transition metal layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.

Abstract: The present invention discloses a dual-photoresist method for forming fine-pitched solder bumps on flip chips by utilizing two separate layers of photoresist, i.e., a first thin photoresist layer for patterning the BLM layers on top of the aluminum bonding pads and a second thick photoresist layer for patterning the via openings on top of the BLM layers to supply the necessary thickness required for the solder bumps. The first, thin photoresist layer permits an accurate imaging process to be conducted without focusing problems which are normally associated with thick photoresist layers. As an optional step, the present invention may further utilize a thin layer of non-leachable metal such as Cu or Ni for coating on top of the BLM layer and thus further improving the electrical characteristics of the solder bumps subsequently formed thereon.

Abstract: A negative resist composition, comprising:

Abstract: A maskless exposure system for selectively exposing a photosensitive work surface, such as a photoresist layer, includes a semiconductor substrate having an elongated aperture. A series of shutters and associated guides are formed upon the substrate using conventional wafer processing methods. The shutters move between a first position covering the aperture and a second position exposing the aperture. A corresponding series of computer-controlled actuators, in the form of electromagnetic coils, cooperate with the shutters for selectively sliding each shutter between its first and second positions. A light beam is directed toward the aperture, and the shutters create a patterned light beam exiting the aperture. A computer-controlled stepper is synchronized with the shutter actuators and adjusts the relationship between the patterned light beam and the photosensitive work surface to direct the patterned light beam at different portions of the work material.

Abstract: A metal layer, an etching resist and a photoresist are successively applied to an electrically insulating substrate. Whereupon the photoresist is patterned by photolithography in such a way that it covers a pattern of the later coarse conductor structures and the entire region of the later fine conductor structures. After the uncovered etching resist has been stripped, the photoresist is removed, whereupon the etching resist is patterned with the aid of a laser beam in such a way that it has the pattern of the fine conductor structures. The coarse conductor structures and the fine conductor structures are then formed in a common etching process.

Abstract: An oxide hard mask is formed during semiconductor device manufacturing between a deep ultraviolet photoresist and an anti-reflective coating to prevent interactions with the photoresist, thereby preventing reduction of a critical dimension of a patterned conductive layer. Embodiments include a method of manufacturing a semiconductor device comprising depositing a substantially nitrogen free oxide layer on the anti-reflective coating, such as a silicon oxide derived from tertaethyl orthosilicate by plasma enhanced chemical vapor deposition.

Abstract: The invention provides a method of forming a conductive structure on an integrated circuit substrate. A metal bump, of a first material, is structured on the substrate so that the metal bump electrically contacts a metal part on the substrate. A protective layer is formed on the metal bump. The first material has a first conductivity. The protective layer is of a second material which has a second conductivity which is more than the first conductivity.

Abstract: In one embodiment, the present invention relates to a method of forming a conductive structure having a width of about 100 nm or less, involving the steps of providing a substrate having a conductive film; patterning a photoresist over a first portion of the conductive film wherein a second portion of the conductive film is exposed, the photoresist having at least one sidewall over the conductive film; depositing a sidewall film over the conductive film and the photoresist, the sidewall film having a vertical portion adjacent the sidewall of the photoresist and a horizontal portion in areas not adjacent the sidewall of the photoresist; removing the horizontal portion of the sidewall film exposing a third portion of the conductive film; removing the photoresist exposing a fourth portion of the conductive film; and etching the third portion and the fourth portion of the conductive film thereby providing the conductive structure having a width of about 100 nm or less underlying the vertical portion of the sidewa