Radiation Modifying Product Or Process Of Making Patents (Class 430/4)
  • Patent number: 8103984
    Abstract: According to various embodiments of the invention, systems and methods are provided for compressed design phase contour data created during the manufacturing of integrated circuits. In one embodiment of the invention, the method begins by generating a contour layout from a target layout during the design phase of a circuit. This contour layout is generated by way of a contour generator tool. Next, a set of differences between the contour layout and the target layout are calculated. A dataset containing these differences is generated. In some embodiments, the contour generator uses a post-optical proximity correction (OPC) layout of the target layout in order to generate the contour layout.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: January 24, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventor: Christophe Pierrat
  • Patent number: 8088537
    Abstract: The present invention relates to a resist top coat composition and a patterning process adopting such a material, which resist top coat composition is provided for forming a top coat on a photoresist film so as to protect the photoresist film, in liguid immersion photolithography.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: January 3, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Jun Hatakeyama, Yuji Harada
  • Patent number: 8053346
    Abstract: A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: November 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Nam Gyu Ryu, Ho Ryong Kim, Won John Choi, Jae Hwan Kim, Seoung Hyun Kang, Young Hee Yoon
  • Patent number: 8026023
    Abstract: A lithographic pellicle is provided that includes a pellicle frame, a pellicle film stretched over one end face of the pellicle frame via a pellicle film adhesive, and an exposure master plate adhesive provided on the other end face, wherein corners formed between a pellicle film adhesion face and exposure master plate adhesion face of the pellicle frame and inside and outside faces of the frame are subjected to C chamfering, and the chamfer dimension on the exposure master plate adhesion face is greater than C0.35 (mm) but no greater than C0.55 (mm).
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 27, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Yuichi Hamada
  • Publication number: 20110217629
    Abstract: An illumination device is provided and has a light guide plate, a light source and a light modulator, wherein the light modulator has a pair of transparent substrates a pair of electrodes and a light modulator layer. The light modulator layer includes a first region being changed between a transparent state and a scatterable state depending on intensity of an electric field, and a second region being more transparent than the first region in a scatterable state at an electric field having a certain intensity, the electric field being applied when the first region is changed between the transparent state and the scatterable state, and an occupancy rate of the first region in the light modulator layer is increased with increase in distance from the light source.
    Type: Application
    Filed: May 18, 2011
    Publication date: September 8, 2011
    Applicant: SONY CORPORATION
    Inventors: Kentaro Okuyama, Harumi Sato
  • Patent number: 7998355
    Abstract: A method of generating a mask for printing a pattern including a plurality of features. The method includes the steps of depositing a layer of transmissive material having a predefined percentage transmission on a substrate; depositing a layer of opaque material on the transmissive material; etching a portion of the substrate, the substrate being etched to a depth based on an etching selectivity between the transmissive layer and the substrate; exposing a portion of the transmissive layer by etching the opaque material; etching the exposed portion of the transmissive layer so as to expose an upper surface of the substrate; where the exposed portions of the substrate and the etched portions of the substrate exhibit a predefined phase shift relative to one another with respect to an illumination signal.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: August 16, 2011
    Assignee: ASML Masktools B.V.
    Inventors: Douglas Van Den Broeke, Kurt E. Wampler, Jang Fung Chen
  • Patent number: 7972750
    Abstract: The mask blank is patterned to form a corresponding mask having a light shielding film pattern with enhanced resolution. A mask blank (10) on which a chemically amplified resist film (20) is formed, the mask blank (10) comprising a substrate (12), a light shielding film (13) provided on the substrate (12), and a resist underlying film (18) provided on the light shielding film (13), for suppressing the deactivation of the chemically amplified resist film (20). When the light shielding film (13) is etched using the patterned chemically amplified resist film (20) as a mask, the etching rate of the deactivation preventive film (18) is higher than the etching rate of the chemically amplified resist film (20).
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: July 5, 2011
    Assignee: Hoya Corporation
    Inventor: Masahiro Hashimoto
  • Patent number: 7968252
    Abstract: The present invention is directed to reduce pellicle frame distortions due to the tension of a pellicle film and caused during handling, thereby providing an excellent pellicle frame capable of reducing the distortion of a photomask due to a pellicle affixation. In the pellicle frame of the present invention, the frame consists of a plurality of layers of which at least one layer has a different elastic modulus. It is preferable to: make the pellicle frame compositely of a layer having an elastic modulus of 10 GPa or smaller and of a layer having an elastic modulus of 50 GPa or greater; join these layers of the pellicle frame in a direction perpendicular to the pellicle film face; laminate such that layers having a large elastic modulus form the outermost layer; or reverse this lamination structure.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: June 28, 2011
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Toru Shirasaki
  • Patent number: 7960708
    Abstract: Various embodiments disclose devices and methods for fabricating microporous particulate filters with regularly space pores wherein sheet membrane substrates are exposed to energetic particle radiation through a mask and the damaged regions removed in a suitable developer. The required depth of field is achieved by using energetic particles to minimize diffraction and an energetic particle source with suitably small diameter.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: June 14, 2011
    Assignee: University of Houston
    Inventors: John C. Wolfe, Paul Ruchhoeft
  • Patent number: 7955763
    Abstract: A method of manufacturing a mask blank glass substrate or mask blank that includes a mark forming step, and a mask blank glass substrate or mask blank that includes a mark. The mark is a pit formed by irradiating laser light onto a mirror-like surface in an area, having no influence on transfer, on a surface of the mask blank glass substrate. The pit is used as a marker for individually identifying or managing the mask blank glass substrate. The marker may be correlated with information including at least one of substrate information about the mask blank glass substrate, thin film information about the mask pattern thin film, and resist film information about the resist film. A mask blank glass substrate with marker correlated to at least one of the resist film information and thin film information may be used to manufacture a new mask blank.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: June 7, 2011
    Assignee: Hoya Corporation
    Inventors: Akinori Kurikawa, Hisashi Kasahara, Yasushi Okubo
  • Patent number: 7855048
    Abstract: A method of fabricating a semiconductor device using lithography. The method can include providing a wafer assembly having a layer to be processed disposed under a photo resist layer and illuminating the wafer assembly with an exposure dose transmitted through a birefringent material disposed between a final optical element of an imaging subsystem used to transmit the exposure dose and the photo resist layer. Also disclosed is a wafer assembly from which at least one semiconductor device can be fabricated. The wafer assembly can include a layer to be processed, a photo resist layer disposed over the layer to be processed and a contrast enhancing, birefringent top anti-reflecting coating (TARC).
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: December 21, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Cyrus E. Tabery, Bruno M. LaFontaine, Adam R. Pawloski, Jongwook Kye
  • Patent number: 7851108
    Abstract: A method of manufacturing a mask blank glass substrate or mask blank that includes a mark forming step, and a mask blank glass substrate or mask blank that includes a mark. The mark is a pit formed by irradiating laser light onto a mirror-like surface in an area, having no influence on transfer, on a surface of the mask blank glass substrate. The pit is used as a marker for individually identifying or managing the mask blank glass substrate. The marker may be correlated with information including at least one of substrate information about the mask blank glass substrate, thin film information about the mask pattern thin film, and resist film information about the resist film. A mask blank glass substrate with marker correlated to at least one of the resist film information and thin film information may be used to manufacture a new mask blank.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: December 14, 2010
    Assignee: Hoya Corporation
    Inventors: Akinori Kurikawa, Hisashi Kasahara, Yasushi Okubo
  • Patent number: 7833681
    Abstract: A mask blank is equipped with a thin film that forms a mask pattern formed on a substrate and a chemically amplified type resist film that is formed above the thin film. In the mask blank, a protective film that prevents movement of a substance that inhibits a chemical amplification function of the resist film from a bottom portion of the resist film to inside the resist film is provided between the thin film and the resist film. The mask blank suppresses the error of the line width dimension of the transfer pattern formed on the substrate to the design dimension of the transfer pattern line width of the transfer mask (actual dimension error) and also suppress linearity up to 10 nm.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: November 16, 2010
    Assignees: Hoya Corporation, Nissin Chemical Industries, Ltd.
    Inventors: Masahiro Hashimoto, Tomoyuki Enomoto, Takahiro Sakaguchi, Rikimaru Sakamoto, Masaki Nagai
  • Patent number: 7791021
    Abstract: The edges of the reticle are detected with respect to the microstructured patterns exposed by the stepper, and the shapes of the microstructured patterns at the surface and at the bottom of the photoresist are detected. The microstructured patterns are evaluated by calculating, and displaying on the screen, the dislocation vector that represents the relationship in position between the detected patterns on the surface and at the bottom of the photoresist. Furthermore, dislocation vectors between the microstructured patterns at multiple positions in a single-chip or single-shot area or on one wafer are likewise calculated, then the sizes and distribution status of the dislocation vectors at each such position are categorized as characteristic quantities, and the corresponding tendencies are analyzed. Thus, stepper or wafer abnormality is detected.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: September 7, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Fumihiro Sasajima, Osamu Komuro, Fumio Mizuno
  • Patent number: 7740991
    Abstract: A beam dose computing method includes specifying a matrix of rows and columns of regions as divided from a surface area of a target object to include first, second and third regions of different sizes, the third regions being less in size than the first and second regions, determining first corrected doses of a charged particle beam for correcting fogging effects in the first regions, determining corrected size values for correcting pattern line width deviations occurring due to loading effects in the second regions, using said corrected size values in said second regions to create a map of base doses of the beam in respective ones of said second regions, using said corrected size values to prepare a map of proximity effect correction coefficients in respective ones of said second regions, using the maps to determine second corrected doses of said beam for correction of proximity effects in said third regions, and using the first and second corrected doses to determine an actual beam dose at each position on
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: June 22, 2010
    Assignee: NuFlare Technology, Inc.
    Inventors: Keiko Emi, Junichi Suzuki, Takayuki Abe, Tomohiro Iijima, Jun Yashima
  • Patent number: 7732101
    Abstract: In a method of producing a glass substrate for a mask blank, a surface of the glass substrate is polished by the use of an alkaline polishing liquid that contains colloidal silica abrasive grains, from which alkali metal is removed to suppress occurrence of an alkali metal gel substance protrusion adhered on the glass substrate. The polishing process may include a surface roughness control step for initially finishing the surface of the glass substrate to a predetermined surface roughness by moving a polishing member and the glass substrate relative to each other under a predetermined pressure. This may be followed by a protrusion suppressing step under a pressure lower than the predetermined pressure, to minimize polishing rate and suppress occurrence of a fine convex protrusion.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: June 8, 2010
    Assignee: Hoya Corporation
    Inventors: Kesahiro Koike, Junji Miyagaki
  • Publication number: 20100118398
    Abstract: The invention relates to a method for producing polarisation-sensitive and/or polarising filters, in addition to the use of polarisation-sensitive photosensors in order to measure the polarisation of incident light. The invention also relates to embodiments of polarisation-sensitive sensors in order to measure rotational angles and powerful electric or magnetic fields, in addition to polarisation-producing reproduction devices and embodiments of polarisation-producing reproduction devices in order to reproduce polarised signals or to reproduce independent signals.
    Type: Application
    Filed: June 22, 2006
    Publication date: May 13, 2010
    Inventor: Gunter Grau
  • Patent number: 7644387
    Abstract: A semiconductor mask correcting device is provided with an image acquiring unit acquiring a mask image, an extraction unit extracting only a main pattern from the mask data, an inspection unit inspecting a defective portion by comparing the extracted main pattern with a main pattern which is obtained from the mask image after a drawing by matching to each other, and a correction unit correcting the defective portion specified by the inspection unit, wherein the extraction unit includes a recognition section recognizing the main pattern and the assist pattern as a figure, a specification section specifying the assist pattern from figures which is recognized on the basis of a predetermined condition, and a main pattern extracting section extracting as the main pattern a figure other than the assist pattern.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 5, 2010
    Assignee: SII Nano Technology Inc.
    Inventor: Kokoro Kato
  • Publication number: 20090321891
    Abstract: A method for generating reticle data for forming a reticle. The method includes recognizing a non-layout region free from main chips in a process pattern, dividing the non-layout region into a plurality of rectangular non-layout regions, generating scribe data using the plurality of divided rectangular non-layout region as a plurality of dummy chips, and generating a dummy pattern for each of the dummy chips.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 31, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Kenji Suzuki, Yukisada Horie, Katsuhito Kojima
  • Patent number: 7639864
    Abstract: Optimization of illumination for a full-chip layer is disclosed. A pitch frequency of the full-chip layer is determined so as to generate a pitch frequency histogram of the full-chip layer. The pitch frequency indicates how often a given pitch occurs in the full-chip layer. The pitch frequency histogram is equated to be the first eigenfunction from the sum of coherent system representation of a transformation cross coefficient. An integral equation for the first eigenfunction of the transformation cross coefficient is solved so as to define the optimal illumination for imaging the full-chip layer.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: December 29, 2009
    Assignee: ASML Masktools B.V.
    Inventors: Robert J. Socha, Jang Fung Chen
  • Patent number: 7632609
    Abstract: A susceptor having the most basic structure has a three-layer structure including a first and a second transparent quartz part and an opaque quartz part sandwiched therebetween. For example, the opaque quartz part is made of “foamed quartz”. In addition, the opacity of the opaque quartz part to flash light is determined to fall within an appropriate range based on the material or thickness of the opaque quartz part, taking into consideration the composition or thickness of a thin film formed on the substrate and various conditions concerning the energy of the irradiation light during flash light irradiation or the like. The stack structure may be composed of a stack of a plurality of opaque quartz layers having different opacities.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: December 15, 2009
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Noriyasu Fukushima, Hiroki Yoshikawa, Hideo Kaneko, Yukio Inazuki
  • Patent number: 7629596
    Abstract: To provide production methods for a 3-D mold, a finely processed product, and a fine pattern molded product in which the depth and the line width can be formed with high precision, a 3-D mold, a finely processed product, a fine-pattern molded product, and an optical element formed with high precision.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: December 8, 2009
    Assignee: Tokyo University of Science Educational Foundation Administrative Organization
    Inventor: Jun Taniguchi
  • Publication number: 20090295285
    Abstract: A spontaneous emission display includes a support, a first electrode section provided on the support and having a fine wire structure portion made of a conductive metal and a translucent conductive film, and a display section formed on the first electrode section and having a light-emitting layer. The volume resistance of the fine wire structure portion of the first electrode is 10?4 ?·cm or less and/or the surface resistance thereof is 100 ?/sq or less. The volume resistance of the conductive film is 0.05 ?·cm or more and/or the surface resistance thereof is 100 ?/sq or more. When the surface resistance of the first electrode section before a bending test is denoted by R1 and that after the bending test is denoted by R2, R2/R1<18 is satisfied.
    Type: Application
    Filed: September 28, 2007
    Publication date: December 3, 2009
    Applicant: FUJIFILM CORPORATION
    Inventors: Tsukasa Tokunaga, Makoto Kusuoka, Tadashi Kuriki, Akira Ichiki
  • Patent number: 7601486
    Abstract: A method and a material for creating an antireflective coating on an integrated circuit. A preferred embodiment comprises applying a dark polymer material on a reflective surface, curing the dark polymer material, and roughening a top surface of the dark polymer material. The roughening can be achieved by ashing the dark polymer material in an ash chamber. The dark polymer material, preferably a black matrix resin or a polyimide black matrix resin, when ashed in an oxygen rich atmosphere for a short period of time, forms a surface that is capable of absorbing light as well as randomly refracting light it does not absorb. A protective cap layer may be formed on top of the ashed dark polymer material to provide protection for the dark polymer material.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: October 13, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Jason Michael Neidrich
  • Patent number: 7595206
    Abstract: A semiconductor light emitting device can have stable electric characteristics and can emit light with high intensity from a substrate surface. The device can include a transparent substrate and a semiconductor layer on the substrate. The semiconductor layer can include a first conductive type semiconductor layer, a luminescent layer, a second conductive type semiconductor layer, and first and second electrodes disposed to make contact with the first and second conductive type semiconductor layers, respectively. The first conductive type semiconductor layer, the luminescent layer, and the second conductive type semiconductor layer can be laminated in order from the side adjacent the substrate. An end face of the semiconductor layer can include a first terrace provided in an end face of the first conductive type semiconductor layer in parallel with the substrate surface, and an inclined end face region provided nearer to the substrate than the first terrace.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 29, 2009
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Naochika Horio, Munehiro Kato, Masahiko Tsuchiya, Satoshi Tanaka
  • Patent number: 7575798
    Abstract: A substrate includes an opaque chrome coating on a surface of the substrate dry-etched to form an aperture, wherein chrome in the aperture is below detectable limit. A method of forming an opaque chrome coating on a substrate includes depositing an initial thickness of the opaque chrome coating on the substrate without ion-assist or with undetectable ion-assist and depositing the remainder of the opaque chrome coating with or without ion-assist. In one embodiment the invention is directed to an apertured optical element having a substrate transmissive to light and an opaque chrome coating on the substrate defining an aperture. Three- and four-layer opaque coatings of various materials are disclosed, including three-layer chrome/chrome oxide/chrome coatings.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: August 18, 2009
    Assignee: Corning Incorporated
    Inventors: Robert A. Bellman, Ljerka Ukrainczyk, Jose M. Quintal, Paul A. Sachenik
  • Patent number: 7566882
    Abstract: One embodiment pertains to a method of electron beam lithography. An illumination electron beam is formed, and a dynamic pattern generating device is used to generate an electron-reflective pattern of pixels and to reflect the illumination electron beam from said pattern so as to form a patterned electron beam. The patterned electron beam is projected onto a platter configured to hold and rotate a plurality of target substrates. Said generated pattern of pixels is shifted in correspondence with the rotation of the platter so that the patterned electron beam writes a swath path of pixels over the target substrates. Other features, aspects and embodiments are also disclosed.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: July 28, 2009
    Assignee: KLA-Tencor Technologies Corporation
    Inventor: Harald F. Hess
  • Patent number: 7563477
    Abstract: In a method for fabricating an organic electroluminescent display, a first electrode layer is formed on a transparent substrate, and a hole transport layer is formed on the first electrode layer. After an organic luminescent layer is formed on the hole transport layer by scanning a donor film disposed on the substrate using a laser beam, the donor film is removed and then a second electrode is formed on the organic luminescent layer. The laser beam dithers while performing the scanning operation to make the energy distribution uniform.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: July 21, 2009
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Seong Taek Lee, Jang Hyuk Kwon, Tae Min Kang, Joon Young Park
  • Publication number: 20090127440
    Abstract: A colored microlens array includes a plurality of microlenses for focusing incident light on a plurality of respective positions, on a substrate or a transparent film provided on the substrate, in which peripheral sections of the plurality of microlenses overlap each other at the adjacent positions and the microlenses are colored in a plurality of colors and arranged in a predetermined color arrangement.
    Type: Application
    Filed: September 4, 2008
    Publication date: May 21, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Junichi Nakai
  • Patent number: 7531293
    Abstract: The invention is directed to a radiation sensitive compound comprising a surface binding group proximate to one end of the compound for attachment to a substrate, and a metal binding group proximate to an opposite end of the compound. The metal binding group is not radiation sensitive. The radiation sensitive compound also includes a body portion disposed between the surface binding group and the metal binding group, and a radiation sensitive group positioned in the body portion or adjacent to the metal binding group. The surface binding group is capable of attaching to a substrate selected from a metal, a metal oxide, or a semiconductor material.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: May 12, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Cherie R. Kagan, Laura L. Kosbar, Sally A. Swanson, Charan Srinivasan
  • Publication number: 20080311484
    Abstract: The radiation image conversion panel in accordance with the present invention has an aluminum substrate, an alumite layer formed on a surface of the aluminum substrate, an intermediate film covering the alumite layer and having a radiation transparency and a light transparency, and a converting part provided on the intermediate film and adapted to convert a radiation image.
    Type: Application
    Filed: June 15, 2007
    Publication date: December 18, 2008
    Inventors: Jun Sakurai, Ichinobu Shimizu, Gouji Kamimura, Takaharu Suzuki, Yutaka Kusuyama, Kazuhiro Shirakawa
  • Patent number: 7437702
    Abstract: A method for making a mask in a process of fabricating a semiconductor device is disclosed, in which one database is classified into an SRAM block and a random logic block so that OPC is separately performed for the SRAM block and the random logic block, thereby improving performance of the OPC. The method includes dividing an input database into an SRAM block and a random logic block, respectively performing optical proximity correction (OPC) for the SRAM block and the random logic block, and combining the SRAM block to the random logic block.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: October 14, 2008
    Assignee: Dongbuanam Semiconductor, Inc.
    Inventor: Mun Hoe Do
  • Patent number: 7435959
    Abstract: The edges of the reticle are detected with respect to the microstructured patterns exposed by the stepper, and the shapes of the microstructured patterns at the surface and at the bottom of the photoresist are detected. The microstructured patterns are evaluated by calculating, and displaying on the screen, the dislocation vector that represents the relationship in position between the detected patterns on the surface and at the bottom of the photoresist. Furthermore, dislocation vectors between the microstructured patterns at multiple positions in a single-chip or single-shot area or on one wafer are likewise calculated, then the sizes and distribution status of the dislocation vectors at each such position are categorized as characteristic quantities, and the corresponding tendencies are analyzed. Thus, stepper or wafer abnormality is detected.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: October 14, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Fumihiro Sasajima, Osamu Komuro, Fumio Mizuno
  • Publication number: 20080220340
    Abstract: Embodiments of an apparatus and methods for heating a substrate and a sacrificial layer are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: John Kulp, Michael A. Carcasi, Merritt Funk
  • Patent number: 7416820
    Abstract: An optical pellicle to protect a photomask from particulate contamination during semiconductor lithography is provided which has enhanced transparency and operational characteristics. The pellicle utilizes alternating layers of a transparent polymer and a transparent inorganic layer to form pellicles which have high transmission properties and high strength. In a preferred pellicle, a three-layer pellicle is provided having a transparent inorganic layer sandwiched between two polymer layers. A five-layer pellicle is also provided with the outer layers and a middle layer being polymer layers and the inner layers an inorganic material. The preferred polymer layer is a perfluorinated polymer such as Teflon® and the preferred inorganic material is silicon dioxide. The pellicle of the invention provides light transmission of greater than 0.99% at incident light angles up to arcsine 0.45.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: August 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: Timothy A Brunner, Michael S Hibbs
  • Patent number: 7416601
    Abstract: Black perylene pigments which comprise one of the isomers of the formula Ia or Ib in which R1, R2 are each independently phenylene, naphthylene or pyridylene, each of which may be mono- or polysubstituted by C1-C12-alkyl, C1-C6-alkoxy, hydroxyl, nitro, and/or halogen; X is halogen; n Is from 0 to 4, or comprises a mixture of both isomers and has a blackness value ?210 in an alkyd/melamine baking varnish.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: August 26, 2008
    Assignee: BASF Aktiengesellschaft
    Inventors: Peter Erk, Andreas Stohr, Arno Boehm, Walter Kurtz, Jin Mizuguchi, Benno Sens
  • Publication number: 20080182178
    Abstract: Compositions comprising photobleachable organic materials can be bleached by 193 nm light, and brought back to their original state by stimuli after exposure. (reversible photobleaching). We use these compositions in art-known contrast enhancement layers and as a part of a photoresist, especially in optical lithography processes for semiconductor fabrication. They may comprise polymers such as organosilicon polymers, polymers comprising polymers of aromatic hydroxyl compounds such as phenol and naphthol such as phenol formaldehyde polymers and naphthol formaldehyde polymers styrene polymers and phenolic acrylate polymers or cyclic materials comprising: where the radicals “R” and “Y” represent organo, or substituted organo moieties, Structures I, II, and III represent basic organic skeletons and can be unsubstituted or substituted in any available position with any one or combinations of multiple substituents.
    Type: Application
    Filed: January 25, 2007
    Publication date: July 31, 2008
    Inventors: John A. Hoffnagle, David R. Medeiros, Robert D. Miller, Libor Vycklicky, Gregory M. Wallraff
  • Publication number: 20080170229
    Abstract: Methods of selecting crystalline quartz material for use in an optical apparatuses are disclosed. In some embodiments, the methods can enable a relatively fast, simple and/or reliable selection of samples with respect to their lifetime properties under laser irradiation.
    Type: Application
    Filed: January 3, 2008
    Publication date: July 17, 2008
    Applicant: CARL ZEISS SMT AG
    Inventor: Wilfried Clauss
  • Publication number: 20080166638
    Abstract: A photoresist composition includes a base resin, a copolymer of acrylic acid or methacrylic acid and 3,3-dimethoxypropene, a photoacid generator, an organic base, and an organic solvent, and is used for forming a fine (micro) pattern in a semiconductor device by double patterning. The invention method can markedly reduce the number of steps in etching and hard mask deposition processes, so that work hours and manufacturing costs may be reduced, contributing to an increase in yield of semiconductor devices.
    Type: Application
    Filed: June 26, 2007
    Publication date: July 10, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jae Chang Jung, Sung Koo Lee
  • Publication number: 20080151163
    Abstract: An optical compensation panel is disclosed. The optical compensation panel includes a first optical compensation layer, a second optical compensation layer and an adhesive layer for bonding the first optical compensation layer and the second optical compensation layer so as to face each other, wherein the adhesive layer is made of a photopolymerization material, photopolymerization of which is started by a photopolymerization initiator upon irradiation with light, with the photopolymerization initiator being contained in an amount of from 2 to 5% by weight relative to the photopolymerization material in starting the photopolymerization, and the adhesive layer is formed so as to have a rate of change in glass transition temperature of the adhesive layer falling within 150% and a rate of change in weight of the adhesive layer falling within 5% before and after an annealing treatment.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 26, 2008
    Applicant: SONY CORPORATION
    Inventors: Toshinobu Sekiuchi, Kei Yonezawa
  • Publication number: 20080144161
    Abstract: A method for creating an integrated linear polarizer is provided. An electro-optical component is fabricated and may include a bottom electrode, a bottom cladding layer, side cladding features, an electro-optic polymer layer, a top cladding layer, and a top electrode. After fabrication, the electro-optical component is poled to create or enhance polarization properties of the electro-optic polymer layer. The electro-optical component may be heated to at least a first threshold temperature. An electric field may then be applied to the electro-optical component. In the presence of the electric field, the electro-optical component may be cooled to at or below a second threshold temperature that is less than the first threshold temperature. Once the electro-optical component has cooled to the second threshold temperature, the electric field may be removed.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 19, 2008
    Inventors: Dashun Steve Zhou, Michael G. Lee, Alexei L. Glebov
  • Patent number: 7384713
    Abstract: A method of manufacturing an exposure mask blank including a substrate and a light-shielding film formed on the substrate, comprising measuring a first flatness of each of a plurality of substrates before formation of a light-shielding film, predicting, on the basis of the first flatness, a second flatness of each substrate when chucked on an exposure apparatus, selecting from the plurality of substrates, at least one substrate having a predetermined flatness on the basis of the second flatness, predicting a desired third flatness of the at least one substrate after a light-shielding film is formed on the substrate, forming a light-shielding film on the selected at least one substrate, measuring a fourth flatness of the at least one substrate having the formed light-shielding film, and determining whether the at least one substrate having the light-shielding film has the desired third flatness by comparing the fourth flatness with the third flatness.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masamitsu Itoh
  • Publication number: 20080131787
    Abstract: An oxetane-containing compound, a photoresist composition including the same, a method of preparing patterns using the photoresist composition, and an inkjet print head including polymerization products of the oxetane-containing compound.
    Type: Application
    Filed: June 26, 2007
    Publication date: June 5, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyu-sik Kim, Jin-baek Kim, Young-ung Ha, Byung-ha Park, Ji-young Park, Su-min Kim
  • Patent number: 7375352
    Abstract: In order to make it possible to improve throughput of AFM scratch processing, enable correction of small defects in clear defect correction with a high degree of precision, and enable correction in a shorter period of time in the event of overcutting by AFM scratch processing, throughput of AFM scratch processing is increased by maximizing high-resolution of the electron beam device and minimizing the time taken in observations using a device incorporating both an electro-optical system and an AFM head in a vacuum, correcting small clear defects with high precision by eliminating portions left over from AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material, and correction in a short time is made possible by eliminating portions remaining using AFM scratch processing after applying a clear defect correction film using an electron beam while providing light-blocking film raw material also in cases of overcutting in AFM scratc
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: May 20, 2008
    Assignee: SII NanoTechnology Inc.
    Inventors: Osamu Takaoka, Ryoji Hagiwara
  • Publication number: 20080113273
    Abstract: There are provided a wafer scale lens module and a manufacturing method thereof. A wafer scale lens module including: at least one lens including a lens substrate and a lens element deposited on at least one surface of the lens substrate, wherein a stop is integrally formed on at least one surface of the lens to adjust light amount. The stop may be a photo resist layer. The wafer scale lens module is lighter in weight and smaller in size and has a stop formed of a photo resist which is excellently bonded to a UV curing polymer, thereby precluding a need for forming an additional bonding film. The stop can be fabricated only through an exposure process due to characteristics of the photo resist, thereby saving manufacturing costs and time.
    Type: Application
    Filed: November 7, 2007
    Publication date: May 15, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Su Jin, Hye Ran Oh, In Cheol Chang
  • Publication number: 20080099438
    Abstract: Wavefront modulation methods based on a general multiple-scan imaging model are invented for EUV maskless lithography. The model includes the effects of both deterministic image blur caused by uniform linear scanning of the wafer and stochastic blur due to laser's random timing jitter. It is shown that the expected blurred image intensity is a linear function of a “double convolution” of the stationary image with the “scanning pupil” function and the probability density function of the laser's timing jitter. Consequently, the spectrum of the expected blurred image is the product of the stationary image spectrum and the spectrums of the “scanning pupil” function and the probability density function. An inverse-filtering method to modulate EUV wavefront is invented to reduce image blur by coating the EUV reflective mirror on the Fourier plane with a thin absorbing layer whose thickness profile will determine the amplitude and phase modulation of the incident wave.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 1, 2008
    Inventor: Yijian Chen
  • Patent number: 7358512
    Abstract: One embodiment relates to a dynamic pattern generator for controllably reflecting charged particles. The generator includes at least a controllable light emitter array, an optical lens, and an array of light-sensitive devices. The controllable light emitter array is configured to emit a pattern of light. The optical lens is configured to demagnify the pattern of light. The array of light-sensitive devices is configured to receive the demagnified pattern of light and to produce a corresponding pattern of surface voltages. Other embodiments and features are also disclosed.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: April 15, 2008
    Assignee: KLA-Tencor Technologies Corporation
    Inventor: Vincenzo Lordi
  • Publication number: 20080076034
    Abstract: A trim mask is used in conjunction with an additional mask for forming a patterned photoresist layer while using a two-step two-mask photoexposure method. The trim mask is used after exposing a blanket photoresist layer with the other mask. The trim mask comprises a transparent substrate. The trim mask also comprises patterned opaque layer and an adjoining patterned attenuated layer located exposed adjoining the patterned opaque layer and coincident with a latent images formed using the additional mask. The trim mask assists in addressing location dependent critical dimension variability when forming a patterned photoresist layer from the blanket photoresist layer or for creating uniform sub-lithographic imaging not possible with conventional lithographic techniques, including alternating phase shift lithography.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 27, 2008
    Inventors: Brent A. Anderson, Jed H. Rankin
  • Patent number: 7348104
    Abstract: A method is disclosed for forming an array of focusing elements for use in a lithography system. The method involves varying an exposure characteristic over an area to create a focusing element that varies in thickness in certain embodiments. In further embodiments, the method includes the steps of providing a first pattern via lithography in a substrate, depositing a conductive absorber material on the substrate, applying an electrical potential to at least a first portion of the conductive absorber material, leaving a second portion of the conductive material without the electrical potential, and etching the second portion of the conductive material to provide a first pattern on the substrate that is aligned with the first portion of the conductive absorber material.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: March 25, 2008
    Assignee: Massachusetts Institute of Technology
    Inventors: Dario Gil, Jeffrey T. Hastings, James G. Goodberlet, Rajesh Menon, David J. Carter, Henry I. Smith
  • Patent number: 7332098
    Abstract: The present invention provides a phase shift mask and fabricating method thereof, by which a critical dimension of a semiconductor pattern can be accurately formed in a manner of compensating a boundary step difference between an active area and an insulating layer. The present invention includes a transparent substrate and at least two halftone layers on the transparent substrate to have light transmittance lower than that of the transparent substrate, each comprising front and rear parts differing in thickness from each other.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jun Seok Lee