Abstract: Provided are radiation enhanced resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming these layers and cells. Radiation creates defects in resistive switching materials that allow forming and breaking conductive paths in these materials thereby improving their resistive switching characteristics. For example, ionizing radiation may break chemical bonds in various materials used for such a layer, while non-ionizing radiation may form electronic traps. Radiation power, dozing, and other processing characteristics can be controlled to generate a distribution of defects within the resistive switching layer. For example, an uneven distribution of defects through the thickness of a layer may help with lowering switching voltages and/or currents. Radiation may be performed before or after thermal annealing, which may be used to control distribution of radiation created defects and other types of defects in resistive switching layers.

Abstract: Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes.

Abstract: A highly reliable semiconductor device including an oxide semiconductor is provided. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer to a channel formation region, whereby oxygen vacancies which might be generated in the channel formation region are filled. Further, a protective insulating layer containing a small amount of hydrogen and functioning as a barrier layer having a low permeability to oxygen is formed over the gate electrode layer so as to cover side surfaces of an oxide layer and a gate insulating layer that are provided over the oxide semiconductor layer, whereby release of oxygen from the gate insulating layer and/or the oxide layer is prevented and generation of oxygen vacancies in a channel formation region is prevented.

Abstract: A thin film, a method of forming the thin film, a semiconductor device including the thin film, and a method of manufacturing the semiconductor device include forming a thin film including a metal oxynitride, and treating the thin film with inert gas ions so as to stabilize properties of the thin film. The metal oxynitride may include zinc oxynitride (ZnOxNy). The inert gas ions may include at least one of Ar ions and Ne ions. The treating of the thin film with the inert gas ions may be performed by a sputtering process, a plasma treatment process, or the like.

Abstract: A method of manufacturing an array substrate for an FFS mode LCD device includes forming a gate line and a gate electrode on a substrate, forming a pixel electrode in the pixel region, forming a gate insulating layer on the gate line, the gate electrode and the pixel electrode, forming a data line, a source electrode, a drain electrode, and a semiconductor layer on the gate insulating layer, forming a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer including a drain contact hole and a pixel contact hole, and forming a connection pattern and a common electrode on the passivation layer, wherein the common electrode includes bar-shaped first openings in the pixel region, and the connection pattern contacts the drain electrode and the pixel electrode through the drain contact hole and the pixel contact hole, respectively.

Abstract: Methods for producing RRAM resistive switching elements having reduced forming voltage include doping to create oxygen deficiencies in the dielectric film. Oxygen deficiencies in a dielectric film promote formation of conductive pathways.

Abstract: According to an aspect of the present invention, there is provided a thin-film transistor (TFT) sensor, including a bottom gate electrode on a substrate, an insulation layer on the bottom gate electrode, an active layer in a donut shape on the insulation layer, the active layer including a channel through which a current generated by a charged body flows, an etch stop layer on the active layer, the etch stop layer including a first contact hole and a second contact hole, and a source electrode and a drain electrode burying the first and second contact holes, the source and drain electrodes being disposed on the etch stop layer so as to face each other.

Abstract: Phase-change memory structures are formed with ultra-thin heater liners and ultra-thin phase-change layers, thereby increasing heating capacities and lowering reset currents. Embodiments include forming a first interlayer dielectric (ILD) over a bottom electrode, removing a portion of the first ILD, forming a cell area, forming a u-shaped heater liner within the cell area, forming an interlayer dielectric structure within the u-shaped heater liner, the interlayer dielectric structure including a protruding portion extending above a top surface of the first ILD, forming a phase-change layer on side surfaces of the protruding portion and/or on the first ILD surrounding the protruding portion, and forming a dielectric spacer surrounding the protruding portion.

Abstract: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.

Abstract: A flexible display substrate, a flexible organic light emitting display device, and a method of manufacturing the same are provided. The flexible display substrate comprises a flexible substrate including a display area and a non-display area extending from the display area, and a wire formed on the flexible substrate. At least a part of the non-display area of the flexible substrate is formed in a crooked shape in a bending direction, and the wire positioned on at least a part of the non-display area of the flexible substrate includes a plurality of first wire patterns, and a second wire pattern formed on the plurality of first wire patterns and electrically connected with the plurality of first wire patterns.

Abstract: An AlGaN/GaN-HEMT has a structure including: compound semiconductor layers formed on a substrate; a gate electrode, a gate pad that has a current path formed between the gate electrode and itself, and a semiconductor layer that is spontaneously polarized and piezoelectrically polarized, which are formed on the compound semiconductor layer; and a gate electrode connection layer formed on the semiconductor layer, wherein the gate electrode connection layer and the gate electrode are electrically connected with each other. This structure which is relatively simple allows the AlGaN/GaN-HEMT to realize an intended normally-off operation without causing such inconveniences as increase in a sheet resistance, increase in an on-resistance, and increase in a leakage current.

Abstract: A thin film transistor includes, on an insulating substrate, at least: a gate electrode; a gate insulating layer; a source electrode; a drain electrode; a metal oxide layer including a semiconductor region and an insulating region, each of the semiconductor region and the insulating region being composed of a same metal oxide material; and an insulating protective layer. The semiconductor region includes a region between the source electrode and the drain electrode, and is overlaid on a part of each of them. The semiconductor region is formed between the gate insulating layer and the insulating protective layer to abut on at least one of them. The electric conductivity of the semiconductor region is higher than that of the insulating region.

Abstract: A semiconductor element structure and a manufacturing method for the same are provided. The semiconductor element structure may comprise a gate electrode, a dielectric layer, an active layer, a source, a drain and a protective layer. The active layer and the gate electrode are disposed on opposing sides of the dielectric layer. The source is disposed on the active layer. The drain is disposed on the active layer. The protective layer is disposed on the active layer. The protective layer may have a hydrogen content less than or equal to 0.1 at % and a sheet resistance higher than or equal to 10? 10 Ohm/sq.

Abstract: Embodiments of the present invention generally include methods for forming semiconductor films having nominal I2-II-IV-VI4 stoichiometry, such as CZTS or CZTSSe, using a solution of including sources of the I, II, IV, and VI elements in a liquid solvent. Precursors may be mixed in the solvent to form the solution. Metal halide salts may be used as precursors in some examples. The solution may be coated onto a substrate and annealed to yield the semiconductor film. In some examples, the source of the ‘I’ and ‘IV’ elements may contain the elements in a +2 oxidation state, while the semiconductor film may contain the ‘I’ element in a +1 oxidation state and the ‘IV’ element in a +4 oxidation state. Examples may be used to provide I2-(II,IV)-IV-VI4 films.

Abstract: A method for controlling the concentration of a donor in a Ga2O3-based single crystal includes: a step in which a Group IV element is implanted as a donor impurity in a Ga2O3-based single crystal by ion implantation process to form, in the Ga2O3-based single crystal, a donor impurity implantation region that has a higher concentration of the Group IV element than the region in which the Group IV element has not been implanted; and a step in which annealing at 800 C or higher is conducted to activate the Group IV element present in the donor impurity implantation region and thereby form a high-donor-concentration region. Thus, the donor concentration in the Ga2O3-based single crystal is controlled.

Abstract: A method of manufacturing an IGZO active layer includes depositing ions including In, Ga, and Zn from a first target, and depositing ions including In from a second target having a different atomic composition from the first target. The deposition of ions from the second target may be controlled to adjust an atomic % of In in the IGZO layer to be about 45 atomic % to about 80 atomic %.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: This disclosure provides systems, methods and apparatus for fabricating thin film transistor devices. In one aspect, a substrate having a source region, a drain region, and a channel region between the source region and the drain region is provided. The substrate also includes an oxide semiconductor layer, a first dielectric layer overlying the channel region, and a first metal layer on the dielectric layer. A second metal layer is formed on the oxide semiconductor layer overlying the source region and the drain region. The oxide semiconductor layer and the second metal layer are treated to form a heavily doped n-type oxide semiconductor in the oxide semiconductor layer overlying the source region and the drain region. An oxide in the second metal layer also can be formed.

Abstract: Methods, devices, and systems associated with oxide based memory are described herein. In one or more embodiments, a method of forming an oxide based memory cell includes forming a first electrode, forming a tunnel barrier, wherein a first portion of the tunnel barrier includes a first material and a second portion of the tunnel barrier includes a second material, forming an oxygen source, and forming a second electrode.

Abstract: In a hybrid integrated module, a semiconductor die is mechanically coupled face-to-face to an integrated device in which the substrate has been removed. For example, the integrated circuit may include an optical device fabricated on a silicon-on-insulator (SOI) wafer in which the backside silicon handler has been completely removed, thereby facilitating improved device performance and highly efficient thermal tuning of the operating wavelength of the optical device. Moreover, the semiconductor die may be a VLSI chip that provides power, and serves as a mechanical handler and/or an electrical driver. The thermal tuning efficiency of the substrateless optical device may be enhanced by over 100× relative to an optical device with an intact substrate, and by 5× relative to an optical device in which the substrate has only been removed in proximity to the optical device.

Abstract: Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing. At least one electrode in a memory element is reactive, while another may be inert. The precursor layer is converted into a resistance switching layer as a result of this diffusion. The precursor layer may initially include a stoichiometric oxide that generally does not exhibit resistance switching characteristics until oxygen vacancies are created. Metals forming such oxides may be more electronegative than metals forming a reactive electrode. The reactive electrode may have substantially no oxygen at least prior to annealing. Annealing may be performed at 250-400° C. in the presence of hydrogen. These methods simplify process control and may be used to form nonvolatile memory elements including resistance switching layers less than 20 Angstroms thick.

Abstract: Perpendicular spin transfer torque memory (STTM) devices with enhanced stability and methods of fabricating perpendicular STTM devices with enhanced stability are described. For example, a material layer stack for a magnetic tunneling junction includes a fixed magnetic layer. A dielectric layer is disposed above the fixed magnetic layer. A free magnetic layer is disposed above the dielectric layer. A conductive oxide material layer is disposed on the free magnetic layer.

Abstract: One object is to have stable electrical characteristics and high reliability and to manufacture a semiconductor device including a semi-conductive oxide film. Film formation is performed by a sputtering method using a target in which gallium oxide is added to a material that is easy to volatilize compared to gallium when the material is heated at 400° C. to 700° C. like zinc, and a formed film is heated at 400° C. to 700° C., whereby the added material is segregated in the vicinity of a surface of the film and the oxide is crystallized. Further, a semi-conductive oxide film is deposited thereover, whereby a semi-conductive oxide having a crystal which succeeds a crystal structure of the oxide that is crystallized by heat treatment is formed.

Abstract: This disclosure provides systems, methods and apparatus for a thin film transistor (TFT) device on a substrate. In one aspect, the TFT device includes a gate electrode, an oxide semiconductor layer, and a gate insulator between the gate electrode and the oxide semiconductor layer. The oxide semiconductor layer includes at least two metal oxides, with the two metal oxides having a varying concentration relative to one another between a lower surface and an upper surface of the oxide semiconductor layer. The TFT device also includes a source metal adjacent to a portion of the oxide semiconductor layer and a drain metal adjacent to another portion of the oxide semiconductor layer. The composition of the oxide semiconductor layer can be precisely controlled by a sequential deposition technique using atomic layer deposition (ALD).

Abstract: According to one embodiment, dry etching is performed so that an upper-layer wiring material layer, a memory-layer constituting layer, and an interlayer insulating film are processed to form a pattern including a line-and-space pattern extending in a second direction and a dummy pattern connecting line patterns constituting the line-and-space pattern in a memory cell formation region and an upper-layer wiring hookup region. Then, the dummy pattern is removed.

Abstract: The invention provides an array substrate, a fabrication method thereof and a display device. The array substrate comprises a base substrate; a gate layer which is disposed on the base substrate and comprises a gate; a gate insulating layer disposed on the gate layer; a source layer which is disposed on the gate insulating layer and comprises a source; a metal oxide semiconductor layer which is disposed on the source layer and the gate insulating layer and comprises an active layer, wherein the source is in direct contact with the active layer; and a pixel electrode layer in direct contact with the active layer. A position where the gate is formed in the gate layer corresponds to a position between the source and a contacting portion of the pixel electrode layer with the active layer.

Abstract: When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.

Abstract: Disclosed is a thin film transistor including a light-shielding layer made of the same material as a semiconductor layer on a substrate, and a method for fabricating the same. The thin film transistor includes a substrate, a light-shielding layer and a buffer layer formed on the substrate in this order, a semiconductor layer formed on the buffer layer, the semiconductor layer formed of the same material as the light-shielding layer, a gate insulating film and a gate electrode formed on the semiconductor layer in this order, an interlayer insulating film formed on the substrate such that it covers the gate electrode, the interlayer insulating film comprising a source contact hole and a drain contact hole exposing source and drain areas of the semiconductor layer, respectively, and a source electrode and a drain electrode electrically connected to the semiconductor layer through the source contact hole and the drain contact hole.

Abstract: An object is to reduce the manufacturing cost of a semiconductor device. An object is to improve the aperture ratio of a semiconductor device. An object is to make a display portion of a semiconductor device display a higher-definition image. An object is to provide a semiconductor device which can be operated at high speed. The semiconductor device includes a driver circuit portion and a display portion over one substrate. The driver circuit portion includes: a driver circuit TFT in which source and drain electrodes are formed using a metal and a channel layer is formed using an oxide semiconductor; and a driver circuit wiring formed using a metal. The display portion includes: a pixel TFT in which source and drain electrodes are formed using an oxide conductor and a semiconductor layer is formed using an oxide semiconductor; and a display wiring formed using an oxide conductor.

Abstract: A method for processing an oxide semiconductor containing indium, gallium, and zinc is provided. In the method, the oxide semiconductor layer comprises a plurality of excess oxygen, a first oxygen vacancy that is close to first indium and captures first hydrogen, and a second oxygen vacancy that is close to second indium and captures second hydrogen, the first hydrogen captured by the first oxygen vacancy is bonded to one of a plurality of excess oxygen to so that a hydroxyl is formed; the hydroxyl is bonded to the second hydrogen captured by the second oxygen vacancy to release as water; and then, the first oxygen vacancy captures one of excess oxygen and the second oxygen vacancy captures one of excess oxygen.

Abstract: A semiconductor device including an oxide semiconductor with stable electric characteristics and high reliability is provided. An island-shaped oxide semiconductor layer is formed by using a resist mask, the resist mask is removed, oxygen is introduced (added) to the oxide semiconductor layer, and heat treatment is performed. The removal of the resist mask, introduction of the oxygen, and heat treatment are performed successively without exposure to the air. Through the oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, whereby the oxide semiconductor layer is highly purified. Chlorine may be introduced to an insulating layer over which the oxide semiconductor layer is formed before formation of the oxide semiconductor layer.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: A non-transitory computer readable medium encoded with a program for fabricating a gate stack for a transistor is disclosed. The program includes instructions configured to perform a method. The method includes forming a high dielectric constant layer on a semiconductor layer. A metal layer is formed on the high dielectric constant layer. A silicon containing layer is formed over the metal layer. An oxidized layer incidentally forms during the silicon containing layer formation and resides on the metal layer beneath the silicon containing layer. The silicon containing layer is removed. The oxidized layer residing on the metal layer is removed after removing the silicon containing layer.

Abstract: Disclosed is a semiconductor device which consumes low power and has high reliability and tolerance for electrostatic discharge. The semiconductor device includes, over a first substrate, a pixel portion and a driver circuit portion both of which have a thin film transistor having an oxide semiconductor layer. The semiconductor device further possesses a second substrate to which a first counter electrode layer and a second counter electrode layer are provided, and a liquid crystal layer is interposed between the first and second substrates. The first and second counter electrode layers are provided over the pixel portion and the driver circuit portion, respectively, and the second counter electrode layer has the same potential as the first counter electrode layer.

Abstract: A bottom-gate transistor with a short channel length and a method for manufacturing the transistor are provided. A bottom-gate transistor with a short channel length in which portions of a source electrode and a drain electrode which are proximate to a channel formation region are thinner than other portions thereof was devised. In addition, the portions of the source electrode and the drain electrode which are proximate to the channel formation region are formed in a later step than the other portions thereof, whereby a bottom-gate transistor with a short channel length can be manufactured.

Abstract: A miniaturized transistor having high electrical characteristics can be provided with high yield. High performance, high reliability, and high productivity of a semiconductor device including the transistor can be achieved. The semiconductor device includes a gate electrode over an insulating surface; a base insulating film which is over the insulating surface and from which the gate electrode protrudes; a gate insulating film over the base insulating film and the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode in contact with an oxide semiconductor film. The thickness of the oxide semiconductor film is smaller than the difference between the thickness of the gate electrode and the thickness of the base insulating film.

Abstract: A conductive bridge resistive memory device is provided, comprising a first electrode, a memory layer electrically coupled to the first electrode, an ion-supplying layer containing a source of ions of a first metal element capable of diffusion into and out of the memory layer, a semiconductor layer disposed between the memory layer and the ion-supplying layer, and a second electrode electrically coupled to the ion-supplying layer.

Abstract: The present invention provides methods for fabricating a thin film transistor and an array substrate, which are applicable in the field of display device fabrication, and solve the problem of performing patterning process too many times during the fabrications of a thin film transistor and an array substrate. The method for fabricating a thin film transistor comprises: forming a gate layer on a substrate; forming a gate insulation layer on the substrate; forming an oxide semiconductor layer and a barrier layer and on the substrate; and forming a source-drain layer on the substrate, wherein, the step of forming the oxide semiconductor layer and the barrier layer comprises: sequentially forming an oxide semiconductor film a the barrier film; and forming the oxide semiconductor layer from the oxide semiconductor film and the barrier layer from the barrier film by performing a patterning process once.

Abstract: A thin film transistor (TFT) structure includes a first metal layer. The first metal layer is configured with an insulating layer, a second metal layer covers a surface of the insulating layer, an area of the second metal layer that corresponds to an area above the first metal layer is configured with a gap. An area of the insulating layer that corresponds to the gap is configured with a groove. An active layer made of an indium gallium zinc oxide (IGZO) covers surfaces of the second metal layer, the gap, and the groove.

Abstract: A memory device is disclosed. The memory device comprises a first metal layer and a first metal oxide layer coupled to the first metal layer. The first metal layer is also coupled to a second metal oxide, which in turn is couple to a second metal layer. The formation of the first metal oxide layer may occur in-situ when the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer. Control of the oxygen vacancy or ion concentrations of the first metal oxide layer and the second metal oxide layer is utilized in the information and the operation of the memory device. Selection of a dielectric constant and a thickness of the first and second metal oxide layer may be utilized to result in similar electrical field stress across the first metal oxide layer and the second metal oxide layer and improve the cycling robustness and data retention for the memory device.

Abstract: A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material, wherein one or more of the gas flows provides a pressure that at least contributes to the separation of the surface of the substrate from the face of the delivery head. A system capable of carrying out such a process is also disclosed.

Abstract: Methods and memory devices formed using etch bias homogenization are provided. One example method of forming a memory device using etch bias homogenization includes forming conductive material at respective levels over a substrate. Each respective level of conductive material is electrically coupled to corresponding circuitry on the substrate during patterning of the respective level of conductive material so that each respective level of conductive material has a homogenized etch bias during patterning thereof. Each respective level of conductive material electrically coupled to corresponding circuitry on the substrate is patterned.

Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract: Provided is a method of producing a light-emitting apparatus having a field effect transistor for driving an organic EL device, the field effect transistor including an oxide semiconductor containing at least one element selected from In and Zn, the method including the steps of: forming a field effect transistor on a substrate; forming an insulating layer; forming a lower electrode on the insulating layer; forming an organic layer for constituting an organic EL device on the lower electrode; forming an upper electrode on the organic layer; and after the step of forming the semiconductor layer of the field effect transistor and before the step of forming the organic layer, performing heat treatment such that an amount of a component that is desorbable as H2O from the field effect transistor during the step of forming the organic layer is less than 10?5 g/m2.

Abstract: An oxide including indium (In), gallium (Ga) and zinc (Zn), wherein diffraction peaks are observed at positions corresponding to incident angles (2?) of 7.0° to 8.4°, 30.6° to 32.0°, 33.8° to 35.8°, 53.5° to 56.5° and 56.5° to 59.5° in an X-ray diffraction measurement (CuK? rays), and one of diffraction peaks observed at positions corresponding to incident angles (2?) of 30.6° to 32.0° and 33.8° to 35.8° is a main peak and the other is a sub peak.

Abstract: A method for manufacturing a thin film transistor array panel according to an exemplary embodiment of the present invention includes, forming a gate electrode, a gate insulating layer, and an oxide semiconductor layer on a substrate, first heat treating the substrate comprising the oxide semiconductor layer, forming a source electrode and a drain electrode on the oxide semiconductor layer, the source and drain electrodes facing each other, and forming a passivation layer on the source electrode and the drain electrode. The first heat treating is performed at more than 1 atmosphere and at most 50 or less atmospheres.

Abstract: An amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method.

Abstract: The method includes: forming a lower electrode layer above a substrate; forming a variable resistance layer on the lower electrode layer; forming an upper electrode layer on the variable resistance layer; forming a hard mask layer on the upper electrode layer; forming a photoresist mask on the hard mask layer; forming a hard mask by performing etching on the hard mask layer using the photoresist mask; and forming a nonvolatile memory element by performing etching on the upper electrode layer, the variable resistance layer, and the lower electrode layer, using the hard mask. In the forming of a photoresist mask, the photoresist mask is formed to have corner portions which recede toward the center portion in planar view.

Abstract: A device capable of having an easy production process and achieving a long lifetime. The device has a substrate, two or more electrodes facing each other disposed on the substrate and a positive hole injection transport layer disposed between two electrodes among the two or more electrodes. The positive hole injection transport layer has a transition metal-containing nanoparticle containing at least a transition metal compound including a transition metal oxide, a transition metal and a protecting agent, or at least the transition metal compound including the transition metal oxide, and the protecting agent.

Abstract: According to example embodiments, a nonvolatile memory cell includes a first electrode and a second electrode, a resistance change film between the first electrode and the second electrode, and a first barrier film contacting the second electrode. The resist change film contains oxygen ions and contacts the first electrode. The first barrier film is configured to reduce (and/or block) the outflow of the oxygen ions from the resistance change film.