Abstract: To provide a semiconductor device, such as semiconductor laser, having no need of complicated process, ensuring a high yield and mass-productivity necessary for cost reduction, and exhibiting excellent initial characteristics and reliability, nitride semiconductor layers containing a plurality of group III elements are formed on a base body surface having recess (opening) such that the nitride semiconductor layer varies in at least one of composition ratio of the group III elements, band gap energy, refractive index, electrical conductivity and specific resistance within the layer in response to the recess of the base body. In addition, by heating the structure in an atmosphere containing hydrogen and using a layer containing Al as an etching stop layer, controllability and production yield can be improved without influences from fluctuation in etching depth, or the like. Further, etching and re-growth can be conducted consecutively to provide an inexpensive process.

Abstract: Methods and apparatus for fabricating a multiple display modular assembly. In one example of a method, a first flexible layer is coupled to a substrate, a second flexible layer is coupled to the first flexible layer, and a third flexible layer is coupled to the second flexible layer. Each of the flexible layers may be generated from a separate web-line process. In one example, one flexible layer may have a display plane with a driver backplane, a second flexible layer may have a fine interconnect, and a third flexible layer may have gross interconnect. The multiple flexible layer modular assembly may apply to either flexible or rigid displays.

Abstract: The present invention relates to patterning methods for organic devices, and more particularly to patterning methods using a die. The method includes depositing a first layer of organic materials over a substrate; depositing a second layer of an electrode material over the first layer of organic materials; pressing a patterned die having a raised portion onto the second layer; and removing the patterned die. Preferably the patterned die is coated with a metal. Optionally the method includes depositing additional layers over the substrate prior to pressing the patterned die.

Abstract: A mesa structure including an active layer is formed by selective growth on a semiconductor substrate and a layer containing aluminum is grown on the topmost part of the mesa structure. This aluminum-containing layer is then oxidized and used as a mask to form current blocking layers.

Abstract: A sensor having an active sensing material exposed to the substance to be detected and an active reference material that is shielded from the substance to be detected. Thermocouples having a set of junctions proximate to the active sensing material and another set of junctions to the active reference material for measuring the temperatures at the respective materials. The junctions are connected differentially in that a difference of the two temperatures is measured. A heater is proximate and common to the two materials. Heat pulses may be applied to the materials via the heater and the temperatures are measured. If ambient factors or substances affect the active sensing material, its thermal response will be different than that of the active reference material, and a differential pulse-like indication of temperature will be detected.

Abstract: An n-cap layer is formed on a top surface of p-type clad layers, the p-type clad layer is a top layer of a stacked structure having a pn-junction for emitting carriers into light-emitting region of a GaN based light-emitting device, thus increasing the activation ratio of acceptor impurities in the p-type clad layers. The n-cap layer is used also as a current blocking layer, thereby constructing a current-blocked structure. The n-cap layer should preferably be made of InuAlvGa1−u−vN (0<u, v<1) deposited as thick as 1.0 micron or more. The present invention will easily provide a high luminous efficiency GaN based semiconductor light-emitting device without using any complicated processes such as electron-beam irradiation or thermal annealing.

Abstract: The invention relates to a method for producing a light-emitting component. A sequence of layers including at least one active layer is formed on the front face of a basic substrate consisting of semiconductor material. Subsequently, the basic substrate is at least partially removed and the sequence of layers is connected to an external substrate. The basic substrate is removed by wet-chemical etching in an etching agent that acts selectively on the material of the basic substrate. A first metallic contact layer is then applied to an end surface of the sequence of layers, and a second metallic contact layer is applied to an end surface of the external substrate. The sequence of layers is connected to the external substrate by connecting the first metallic contact layer to the second metallic contact layer using heat, by means of eutectic bonding.

Abstract: A method of fabricating oxide-apertured vertical cavity surface emitting lasers involving the steps of: i) defining, during the fabrication of one or more VCSELs on an electronic chip, a number of mesa structures of different sizes; ii) selectively oxidizing the chip and mesa structures to produce an oxide-aperture for each structure; iii) inspecting the chip to determine which one of the mesas is desired or optimal; iv) choosing an appropriate metalization mask that serves to metalize and electrically connect only that desired mesa structure; and v) depositing, a dielectric top mirror on that electrically connected mesa. Advantageously, the method may be practiced using a variety of fabrication techniques and apparatus that are compatible with conventional devices. A distinguishing characteristic of our inventive method, is that only a desired or optimal mesa is completed while the remaining mesas on a particular chip remain unprocessed.

Abstract: An integrated laser/modulator ("ILM") operating with reduced chirping is formed on a single semiconductor substrate. A reduction in chirping and any resultant wavelength dispersion is realized by precisely controlling the length of a window region incorporated in the ILM in order to isolate the ILM's active regions from any residual reflections.

Abstract: Composite units of an optical semiconductor device and a supporting substrate are disclosed, in which the rear surface of the optical semiconductor device is provided with one or more electrode patterns and the top surface of the supporting substrate is provided with one or more electrode patterns. The optical semiconductor device and the supporting substrate are fixed to each other by once melting and solidifying one or more solder bumps which intervene between the one or more electrode patterns provided on the rear surface of the optical semiconductor device and the one or more electrode patterns provided on the top surface of the supporting substrate. A good grade of accuracy in the mutual geometric position of the optical semiconductor device and the supporting substrate is obtained in a horizontal direction due to a phenomenon called "the self alignment results" in this specification, in which a molten metal is inclined to become a ball based on surface tension.

Abstract: The present invention is directed to fabricating a MOSFET-controlled FEA, in which the emitter array and the cathode electrode are separated and connected to each other by a MOSFET, the cathode electrode and the n-well beneath the emitter array thereby being used as a source and a drain of the MOSFET.

Abstract: A method of fabricating a liquid crystal display device including a field effect transistor includes forming a gate electrode on an electrically insulating substrate, the gate electrode being located in a transistor region of the substrate; forming an electrically insulating film on the substrate and covering the gate electrode; forming source and drain electrodes on the electrically insulating film on opposite sides of the gate electrode in the transistor region; forming a display electrode on the electrically insulating substrate in a display region of the substrate, adjacent the transistor region, the drain electrode being electrically connected to the display electrode; and forming, in the transistor region, a semiconductor film of a .pi.-conjugated polymer on the source and drain electrodes and on the electrically insulating film between the source and drain electrodes in the transistor region; arranging a transparent plate, including a transparent electrode, opposite and spaced from the .pi.

Abstract: A III-V compound light emitter is integrated with Si-based actuators. The Proposed devices take advantage of the superior optical properties of III-V compounds and the superior mechanical properties of Si, as well as mature fabrication technologies of Si-Micro-Electro-Mechanical Systems (MEMS). The emitter can be a light emitting diode (LED), a vertical cavity surface emitting laser (VCSEL) or an edge emitting laser. Electro or magnetic based actuation from Si-based actuators provides linear or angular movement of the light emitter.

Abstract: The present invention provides a photosensitive semiconductor device comprising a sealing body composed of a resin material for sealing photosensitive semiconductor elemental devices, a inside of the sealing body having a light-transmissive property, a surface of the sealing body composed of the resin material containing carbon.Owing to the above-described construction, the present invention can provide a photosensitive semiconductor device which eliminates the need for a mold resin forming process for forming only a lightproof film and is capable of simplifying a manufacturing process thereof and being rendered compact in size.

Abstract: A method of fabricating a photodiode and at least one MOS device within a first active region and a second active region, respectively, of a substrate is disclosed. First, a gate structure is formed on the substrate within the second active region, and lightly-doped regions are formed by introducing first dopants into the substrate through the gate structure as masking. Then, a diffusion region is formed in the substrate within the first active region by ion implantation. Then, an insulating layer is formed to overlie the first and second active region, a portion of which within the second active region is thereafter patterned to sidewall spacers on the sidewalls of the gate structure. Subsequently, heavily-doped regions are formed by introducing second dopants throughout the second active region into the substrate by the gate structure and sidewall spacers as masking. In addition, the insulating layer can be thinned before the step of patterning the insulating layer to form the sidewall spacers is performed.

Abstract: A method for manufacturing a semiconductor structure having improved light mitting characteristics includes the step of exposing a semiconductor substrate, such as a silicon wafer, to an unbiased etching solution comprised of an acid, water, and an oxidizing agent to form a porous region having interstitial spaces in the semiconductor structure. Next, an electrically conductive contact structure is formed in the interstitial spaces and on the semiconductor structure. The large surface area at the interface junction between the electrical contact layer and the porous region is believed to enhance the intensity of light emitted by the porous region by allowing increased electrical current flow across the interface junction.

Abstract: A multiple layer patterning system with an undercut allows the deposition of a material onto a substrate from a direction substantially perpendicular to the substrate, followed by the angular deposition of a protective cap. Because of the angular deposition, the protective cap extends into the undercut and completely covers and surrounds any previously exposed surface of the material. The material is thereby protected from subsequent exposure to substances that may be deleterious.

Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the devices perform characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.

Abstract: A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.

Abstract: A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a LED array display chip, fabricated of an array of LEDs, formed on a substrate, having connection pads positioned about the perimeter of the LED array display chip, a separate silicon driver chip having connection pads routed to an uppermost surface, positioned to cooperatively engage those of the display chip when properly registered and interconnected using wafer level processing technology. The display chip being flip chip mounted to the driver chip and having a layer of interchip bonding dielectric positioned between the space defined by the display chip and the driver chip. The LED display and driver chip package subsequently having selectively removed the substrate onto which the LED array was initially formed, thereby exposing the connection pads of the display chip and a remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer.

Abstract: A method of fabricating an active matrix LED array includes forming layers of material on a substrate, which layers cooperate to emit light when activated. Row and column dividers are formed in the layers to divide the layers into an array of LEDs arranged in rows and columns. One FET is formed on the row dividers in association with each LED and a source of each FET is connected to an anode of the associated LED. Row and column buses are formed on the row and column dividers, respectively, and the drain of each FET is connected to an adjacent row bus with the gate of each FET being connected to an adjacent column bus. A cathode for each LED is connected as a common terminal for all of the LEDs in the array.

Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the device's performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.

Abstract: A passive region is provided adjacent the mirror surface of a laser. A mesa is formed with an end face parallel to the mirror surface to be formed. The passive region is grown against the end face, and the mirror surface is formed therein by cleaving. The passive region is provided exclusively at the area of the active region. The passive region is provided at the area of the active region preferably in the following manner: two depressions are formed in the layer structure of the laser at the area of the mirror surface to be formed, reaching down to the active layer. Then a portion of the active layer situated between the depressions is selectively removed, whereupon the passive region is grown starting from the depressions in the tubular cavity thus formed.

Abstract: A method for forming an electrical connection between a semiconductor die and a corresponding electrical component mounted within an electrical device is provided. The method includes wire bonding metal wires to the bond pads of the die and then severing the metal wires to form loose leads attached to the bond pads. With the die mounted to the electrical device, the loose leads are bonded to the electrical component using a bonding tip. In an illustrative embodiment, the electrical device is a field emission display package and the electrical component is conductive traces for the package. Advantageous, the method can be used to form the electrical connection between the die mounted in a sealed space and the corresponding electrical component which is outside of the sealed space.

Abstract: A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.

Abstract: A semiconductor substrate is utilized to integrally form a drive circuit and a pixel array to produce a transparent semiconductor device for a light valve comprising a pixel array region and a drive circuit region on a major face of the semiconductor substrate. A stopper film is formed on the major face of the semiconductor substrate at the pixel array region, and a pixel array is formed over the silicon oxide stopper film. A drive circuit is formed on the drive circuit region, and silicon oxide posts are embedded in the major face of the semiconductor substrate at the drive circuit region. A thickness of the semiconductor substrate is then selectively removed from a back face opposite to the major face thereof to reach the stopper film. After the selective removing step, the portion of the semiconductor substrate under the pixel region is completely removed while a portion of the semiconductor substrate under the drive circuit region remains.