Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
  • Publication number: 20010032985
    Abstract: A light emitting device includes several LEDs, mounted on a shared submount, and coupled to circuitry formed on the submount. The LEDs can be of the III-Nitride type. The architecture of the LEDs can be either inverted, or non-inverted. Inverted LEDs offer improved light generation. The LEDs may emit light of the same wavelength or different wavelengths. The circuitry can couple the LEDs in a combination of series and parallel, and can be switchable between various configurations. Other circuitry can include photosensitive devices for feedback and control of the intensity of the emitted light, or an oscillator, strobing the LEDs.
    Type: Application
    Filed: May 15, 2001
    Publication date: October 25, 2001
    Inventors: Jerome C. Bhat, Daniel A. Steigerwald, Reena Khare
  • Publication number: 20010016366
    Abstract: The semiconductor light emitting element of the present invention includes: a compound semiconductor substrate having a first conductivity type; a light emitting layer; a compound semiconductor interface layer having a second conductivity type and not containing Al; and a current diffusion layer having the second conductivity type and being made of a compound semiconductor not containing Al.
    Type: Application
    Filed: April 23, 2001
    Publication date: August 23, 2001
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kazuaki Sasaki, Junichi Nakamura
  • Patent number: 6265237
    Abstract: A method of manufacturing and testing a laser device that facilitates in-wafer testing of the laser device includes forming the laser device on a wafer and forming a light detecting device on the wafer adjacent to the laser device. The laser device should include a grating. The method further includes causing the laser device to lase while in the wafer and detecting light generated from the laser device with the light detecting device. Finally, the method includes obtaining an electro-optic parameter of the laser device from the detected light.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: July 24, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: William Rudolph Heffner, John E. Johnson
  • Patent number: 6251698
    Abstract: A process for the production of microsensors machined in silicon, and in particular accelerometers for applications of assisting with navigation in aircraft, and pressure sensors. In order to improve the production of certain active parts of the sensor, and in particular of a beam forming a resonator, which needs to have well-controlled width and thickness characteristics, the following procedure is adopted. A beam having a thickness equal to the desired final thickness, and a width greater than the desired final width, is produced by micromachining the silicon on a first plate, the beam being covered on its upper face by a mask defining the desired final width. The plate is assembled with another plate. The two faces of the beam are oxidized in order to cover them with a thin protective layer. The thin protective layer on the upper face is removed, by vertical directional etching, without removing the mask already present.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: June 26, 2001
    Assignee: Sextant Avionique
    Inventors: Olivier Lefort, Isabelle Thomas
  • Patent number: 6229189
    Abstract: An optoelectronic device has an epitaxial layer structure that has a substrate and a first layer formed adjacent to the substrate. The first layer may, for example, form a contact layer. A second layer is formed adjacent to the first layer. The second layer forms a selectively optically varying layer, so that during a first state the second layer is optically absorbing and during a second state the layer is optically transparent. A third layer is formed adjacent to the second layer. A fourth layer is formed adjacent to the third layer. The fourth layer is an optically transparent layer. An optoelectronic device and an electronic device may be formed on the same substrate that share the same layers. The layers used depends upon the devices formed.
    Type: Grant
    Filed: December 24, 1998
    Date of Patent: May 8, 2001
    Assignee: Hughes Electronics Corporation
    Inventors: Daniel Yap, Daniel Docter, William Stanchina
  • Patent number: 6200825
    Abstract: A p type semiconductor layer, an i type crystalline (polycrystalline, microcrystalline) photoelectric conversion layer, and an n type semiconductor layer are successively formed in the same plasma CVD deposition chamber. The p type semiconductor layer is produced on condition that the pressure in the deposition chamber is at least 5 Torr. Accordingly, a silicon-based thin film photoelectric conversion device having the p type semiconductor layer, the i type crystalline photoelectric conversion layer, and the n type semiconductor layer stacked on each other is manufactured. A method of manufacturing a silicon-based thin film photoelectric conversion device is thus implemented to produce a photoelectric conversion device having a superior performance and quality by a simple apparatus at a low cost and with high productivity.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: March 13, 2001
    Assignee: Kaneka Corporation
    Inventors: Masashi Yoshimi, Yoshifumi Okamoto, Kenji Yamamoto
  • Patent number: 6194239
    Abstract: The present invention provides new and improved methods for making crystalline semiconductor thin films which may be bonded to different kinds of substrates. The thin films may be flexible. In accordance with preferred methods, a multi-layer porous structure including two or more porous layers having different porosities is formed in a semiconductor substrate. A semiconductor thin film is grown on the porous structure. Electrodes and/or a desired support substrate may be attached to the grown film. The grown film is separated from the semiconductor substrate along a line of weakness defined in the porous structure. The separated thin film attached to the support substrate may be further processed to provide improved film products, solar panels and light emitting diode devices. These thin film semiconductors are excellent in crystallinity and may be inexpensively produced, thereby enabling production of solar cells and light emitting diodes at lower cost.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: February 27, 2001
    Assignee: Sony Corporation
    Inventor: Hiroshi Tayanaka
  • Patent number: 6194238
    Abstract: In order to prevent deterioration of adhesion between a molding resin and a lead frame and a light transmission characteristic due to the attachment of a translucent resin to an upper surface of the lead frame upon charging a photocoupler with the translucent resin, a concave portion is provided in an island of a lead frame to which the smallest semiconductor device is attached. The filling of the translucent resin between opposed semiconductor devices includes filling through the concave portion. The provision of the concave portion prevents the translucent resin from contacting the upper surface, resulting in a more stable configuration.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: February 27, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Kenji Mizuuchi
  • Patent number: 6190932
    Abstract: A p type semiconductor layer, an i type amorphous photoelectric conversion layer and an n type semiconductor layer of an amorphous type photoelectric conversion unit are formed in separate deposition chambers, respectively. A p type semiconductor layer, an i type crystalline photoelectric conversion layer and an n type semiconductor layer of crystalline type photoelectric conversion unit are formed continuously in one deposition chamber. Accordingly, a method of manufacturing a tandem type thin film photoelectric conversion device is obtained by which a tandem type thin film photoelectric conversion device having superior performance and high quality can be formed by a simple apparatus at a low cost with superior productivity.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: February 20, 2001
    Assignee: Kaneka Corporation
    Inventors: Masashi Yoshimi, Yoshifumi Okamoto
  • Patent number: 6090635
    Abstract: A heterostructure device includes a ridge-waveguide laser monolithically integrated with a ridge-waveguide rear facet monitor (RFM). An integral V-groove etched directly into the device substrate enables passive alignment of an optical fiber to the active region of the laser. The layer and RFM facets were formed using an in-situ multistep reactive ion etch process.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: July 18, 2000
    Assignee: GTE Laboratories Incorporated
    Inventors: Mark Alan Rothman, Chan-Long Shieh, Craig Alfred Armiento, John Alvin Thompson, Alfred Joseph Negri
  • Patent number: 6087194
    Abstract: Composite units of an optical semiconductor device and a supporting substrate are disclosed, in which the rear surface of the optical semiconductor device is provided with one or more electrode patterns and the top surface of the supporting substrate is provided with one or more electrode patterns. The optical semiconductor device and the supporting substrate are fixed to each other by once melting and solidifying one or more solder bumps which intervene between the one or more electrode patterns provided on the rear surface of the optical semiconductor device and the one or more electrode patterns provided on the top surface of the supporting substrate. A good grade of accuracy in the mutual geometric position of the optical semiconductor device and the supporting substrate is obtained in a horizontal direction due to a phenomenon called "the self alignment results" in this specification, in which a molten metal is inclined to become a ball based on surface tension.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: July 11, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Hisao Matsukura, Yasuhiko Kudou, Hajime Hotta, Akio Hirakawa, Masaki Sugawara, Jiro Utsunomiya, Kiyoshi Kurosawa
  • Patent number: 6074890
    Abstract: A method of fabricating MEMS devices having a master/slave structure in which the motion of a signal device is slaved to a control device through the fabrication of a mechanical coupler. The preferred fabrication uses a backside dry etch to release the suspended MEMS devices and mechanical coupler.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: June 13, 2000
    Assignee: Rockwell Science Center, LLC
    Inventors: Jun J. Yao, Sangtae Park
  • Patent number: 6015719
    Abstract: Methods for the fabrication of TS LED chips with improved light extraction and optics, particularly increased top surface emission, and the TS LEDs so fabricated are described. Non-absorbing DBRs within the chip permit the fabrication of the LEDs. The transparent DBRs redirect light away from absorbing regions such as contacts within the chip, increasing the light extraction efficiency of the LED. The non-absorbing DBRs can also redirect light toward the top surface of the chip, improving the amount of top surface emission and the on-axis intensity of the packaged LED. These benefits are accomplished with optically non-absorbing layers, maintaining the advantages of a TS LED, which advantages include .about.6 light escape cones, and improved multiple pass light extraction.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: January 18, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Fred A. Kish, Jr., Stephen A. Stockman
  • Patent number: 5994154
    Abstract: There is provided an optical semiconductor device, including a first semiconductor layer, a first insulating layer formed on the first semiconductor layer, the first insulating layer having a different index of refraction from that of the first semiconductor layer, a highly doped, second semiconductor layer formed on the first insulating layer, a third semiconductor layer formed on the second semiconductor layer, a device isolation region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the device isolation region defining a device formation region therein, the device formation region being formed with a recess starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a second insulating layer covering an inner sidewall of the recess therewith, a multi-layered structure formed within the recess, the multi-layered structure having at least a q
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: November 30, 1999
    Assignee: NEC Corporation
    Inventor: Takenori Morikawa
  • Patent number: 5978401
    Abstract: A monolithic transceiver that includes both a vertical cavity surface emitting laser (VCSEL) and a resonant cavity photodetector (RCPD) formed therein. The monolithic transceiver may also be an array of VCSEL and RCPD devices. The monolithic transceiver may be an integrated circuit, and may include a substrate layer. Both the vertical cavity surface emitting laser and the resonant cavity photodetector may be grown or otherwise formed on the substrate layer using standard processing techniques. Because standard processing techniques may be used, the present invention may provide a highly manufacturable transceiver, with independently controlled laser and photodetector characteristics.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: November 2, 1999
    Assignee: Honeywell Inc.
    Inventor: Robert A. Morgan
  • Patent number: 5943357
    Abstract: A long wavelength VCSEL with a photodetector, wherein the VCSEL includes a first and second stack of DBRs disposed on a first surface of a first substrate element, having an active region sandwiched therebetween, and a PIN photodetector including a first doped region disposed on a second substrate element, a undoped region disposed on the first doped region, and a second doped region disposed on the undoped region. The PIN photodetector is mounted to an opposed surface of the first substrate element, thereby monitoring a back VCSEL emission. The device is fabricated to allow for automatic power control (APC) of the VCSEL.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: August 24, 1999
    Assignee: Motorola, Inc.
    Inventors: Michael S. Lebby, Jamal Ramdani, Wenbin Jiang
  • Patent number: 5891792
    Abstract: A structure and method for fabricating an ESD device for FET transistors by forming a silicon germanium region 40 under a channel region 44 of a field effect transistor (FET). The silicon germanium region 40 comprises the base of a parasitic bipolar 200 transistor that increases the turn on speed. The method comprises:a) forming a gate dielectric layer 20 over a substrate 10;b) forming a gate 30 over the gate 30; the substrate having a channel region under the gate; the channel region extending from the surface of the substrate to a channel depth below the substrate surface;c) forming a silicon germanium region 40 under the channel region 44 using a tilt angle ion implant of Germanium ions;d) forming source and drain doped regions 50 70 adjacent to the channel region and the silicon germanium region whereby the silicon germanium region comprises a base of a parasitic bipolar transistor 40.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: April 6, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiaw-Ren Shih, Jian-Hsing Lee
  • Patent number: 5848088
    Abstract: A surface emission type semiconductor laser having an optical detector which can satisfactorily assure both the laser emission characteristics of the photoemitter and the optical-to-electrical conversion efficiency. The laser comprises a first conducting semiconductor layer and a second conducting semiconductor layer formed on first and second regions of a semiconductor substrate. Over the second conducting semiconductor layer on the first region is formed an optical resonator which emits light perpendicular to the plane of the semiconductor substrate. On the second region, at least one photodiode is formed by the first and second conducting semiconductor layers. On the first region the second conducting semiconductor layer is formed with a thickness of at least 1 .mu.m, and is used as a lower electrode for supplying a current to the optical resonator. On the second region, the second conducting semiconductor layer forming the at least one photodiode is formed with a thickness of less than 1 .mu.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: December 8, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Katsumi Mori, Takayuki Kondo, Takeo Kaneko
  • Patent number: 5837561
    Abstract: A method for fabricating transparent substrate vertical cavity surface emitting lasers ("VCSEL"s) using wafer bonding is described. The VCSELs have their active layers located much more closely to a heat sink than is possible in known absorbing substrate VCSELs. The improved heat transport from the active layer to the heat sink permits higher current operation with increased light output as a result of the lower thermal impedance of the system. Alternatively, the same light output can be obtained from the wafer bonded VCSEL at lower drive currents. Additional embodiments use wafer bonding to improve current crowding, current and/or optical confinement in a VCSEL and to integrate additional optoelectronic devices with the VCSEL.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: November 17, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Fred A. Kish, Jr., Richard P. Schneider, Jr.
  • Patent number: 5827753
    Abstract: A method of fabricating a monolithically integrated LED array and driving circuitry includes sequentially forming overlying layers of material on the surface of a semiconductor substrate, the layers cooperating to emit light when activated. An insulating layer is formed on the layers and the layers are isolated into an array area and driver circuitry areas with row and column dividers dividing the array area into an array of LEDs arranged in rows and columns. Row and column driver circuits are formed on the insulating layer in the driver circuitry areas and row and column buses individually couple each LED in the array to row and column driver circuits.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: October 27, 1998
    Assignee: Motorola, Inc.
    Inventors: Rong-Ting Huang, Phil Wright, Chan-Long Shieh, Paige M. Holm
  • Patent number: 5798283
    Abstract: A method for integrating one or more microelectromechanical (MEM) devices with electronic circuitry. The method comprises the steps of forming each MEM device within a cavity below a device surface of the substrate; encapsulating the MEM device prior to forming electronic circuitry on the substrate; and releasing the MEM device for operation after fabrication of the electronic circuitry. Planarization of the encapsulated MEM device prior to formation of the electronic circuitry allows the use of standard processing steps for fabrication of the electronic circuitry.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: August 25, 1998
    Assignee: Sandia Corporation
    Inventors: Stephen Montague, James H. Smith, Jeffry J. Sniegowski, Paul J. McWhorter
  • Patent number: 5783340
    Abstract: A method is disclosed for photolithographically defining device features up to the resolution limit of an auto-focusing projection stepper when the device features are to be formed in a wafer cavity at a depth exceeding the depth of focus of the stepper. The method uses a focusing cavity located in a die field at the position of a focusing light beam from the auto-focusing projection stepper, with the focusing cavity being of the same depth as one or more adjacent cavities wherein a semiconductor device is to be formed. The focusing cavity provides a bottom surface for referencing the focusing light beam and focusing the stepper at a predetermined depth below the surface of the wafer, whereat the device features are to be defined.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: July 21, 1998
    Assignee: Sandia Corporation
    Inventors: Anthony J. Farino, Stephen Montague, Jeffry J. Sniegowski, James H. Smith, Paul J. McWhorter
  • Patent number: 5770472
    Abstract: An optical signal processor is implemented as a monolithically integrated semiconductor structure having optical waveguide devices forming beam splitters, optical amplifiers and optical phase shifters. The monolithic structure photonically controls a phased-array microwave antenna. Phase-locked master and slave lasers generate orthogonal light beams having a difference frequency that corresponds to the microwave carrier frequency of the phased-array antenna. The lasers feed the signal processor, which performs beam splitting, optical amplifying and phase shifting functions. A polarizer and an array of diode detectors convert optical output signals from the signal processor into microwave signals that feed the phased-array antenna. The optical waveguides of the signal processor are fabricated in a single selective epitaxial growth step on a semiconductor substrate.
    Type: Grant
    Filed: September 9, 1996
    Date of Patent: June 23, 1998
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Weimin Zhou, Paul H. Shen, Mitra Dutta, Jagadeesh Pamulapati
  • Patent number: 5763323
    Abstract: A method for fabricating an integrated circuit device includes the steps of forming an insulating layer on a substrate and forming a plurality of parallel conductive lines on the insulating layer. An etch barrier is formed on each of the parallel conductive lines, and contact holes are formed between the etch barriers. The contact holes expose portions of the substrate without exposing the plurality of parallel conductive lines. In particular, the contact holes can be formed by forming a patterned mask layer on the insulating layer and etch barriers, and etching exposed portions of the insulating layer. The patterned mask layer selectively exposes a plurality of parallel strips orthogonal to the plurality of parallel conductive lines. Related structures are also discussed.
    Type: Grant
    Filed: August 7, 1996
    Date of Patent: June 9, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-hyung Kim, Joo-young Lee, Young-so Park
  • Patent number: 5756373
    Abstract: In a fabricating method of an optical semiconductor device, a pair of SiO.sub.2 films are formed on an n-InP substrate so as to have a large width in a region I (laser region) and a small width in a region II (optical waveguide region) and have the same gap interval therebetween in the regions I and II, and then an InGaAsP optical guide layer, a MQW (multiquantum well) active layer comprising InGaAsP quantum well layers and InGaAsP barrier layers, and a p-InP layer are selectively grown by MOVPE (metal-organic vapor phase epitaxial growth) method, whereby compressive lattice strain is introduced in the InGaAsP quantum well layers of the region I, and tensile lattice strain is introduced in the InGaAsP quantum well layers of the region II.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: May 26, 1998
    Assignee: NEC Corporation
    Inventor: Yasutaka Sakata