Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
-
Patent number: 6955933Abstract: A light emitting device in accordance with an embodiment of the present invention includes a first semiconductor layer of a first conductivity type having a first surface, and an active region formed overlying the first semiconductor layer. The active region includes a second semiconductor layer which is either a quantum well layer or a barrier layer. The second semiconductor layer is formed from a semiconductor alloy having a composition graded in a direction substantially perpendicular to the first surface of the first semiconductor layer. The light emitting device also includes a third semiconductor layer of a second conductivity type formed overlying the active region.Type: GrantFiled: July 24, 2001Date of Patent: October 18, 2005Assignee: Lumileds Lighting U.S., LLCInventors: David P. Bour, Nathan F. Gardner, Werner K. Goetz, Stephen A. Stockman, Tetsuya Takeuchi, Ghulam Hasnain, Christopher P. Kocot, Mark R. Hueschen
-
Patent number: 6954561Abstract: Thermo-optic devices including a bottom cladding layer, a patterned core material and a top cladding layer, each having a different refractive index, can be made by depositing a heater material, such as tungsten or chromium, on the outside of the bottom and/or top cladding layer. Depending on the refractive index differences between the cladding layers and the core layers, the amount of heater material can also be varied. The heater material can surround the cladding layers, can be present on the sidewalls and top only, or the sidewalls alone, to provide sufficient heat to change the refractive index of the layers and thus the path of light passing-through the device. These devices when built into the substrate can be connected to underlying devices for vertical integration, or connected to other devices and components formed on the same substrate for increased integration.Type: GrantFiled: July 16, 2001Date of Patent: October 11, 2005Inventors: Anisul Khan, Ajay Kumar
-
Patent number: 6949388Abstract: The present invention relates to a CMOS (Complementary Metal Oxide Silicon) image sensor; and, more particularly, to an image sensor integrated into one chip, together with a memory. The CMOS image sensor according to the present invention comprises: a pixel array formed on a chip, having a plurality of unit pixels; a logic circuit formed on the chip to process signals form the pixel array; and a memory formed on the chip to store outputs from the logic circuit, wherein the pixel array, the logic circuit and the memory are isolated from each other by insulating layers, whereby the pixel array, the logic circuit and the memory are integrated on the same chip.Type: GrantFiled: May 12, 2003Date of Patent: September 27, 2005Assignee: Hynix Semiconductor Inc.Inventor: Sang Hoon Park
-
Patent number: 6939731Abstract: When a p-type MgxZn1-xO-type layer is grown based on a metal organic vapor-phase epitaxy process, the p-type MgxZn1-xO-type layer is annealed in an oxygen-containing atmosphere during and/or after completion of the growth of the p-type MgxZn1-xO-type layer. In addition, a vapor-phase epitaxy process of a semiconductor layer is proceed while irradiating ultraviolet light to the surface of a substrate to be grown and source gasses. In addition, when a MgxZn1-xO-type buffer layer that is oriented so as to align the c-axis thereof to a thickness-wise direction is formed by an atomic layer epitaxy process, a metal monoatomic layer is grown at first. In addition, a ZnO-base semiconductor active layer is formed by using a semiconductor material mainly composed of ZnO containing Se or Te. A light emitting device is formed by using these techniques.Type: GrantFiled: April 25, 2002Date of Patent: September 6, 2005Assignee: Shin-Etsu Handotai Co., Ltd.Inventor: Jun-ya Ishizaki
-
Patent number: 6936488Abstract: A light emitting device comprised of a light emitting semiconductor active region disposed on a substrate comprised of GaN having a dislocation density less than 105 per cm2 is provided.Type: GrantFiled: May 19, 2003Date of Patent: August 30, 2005Assignee: General Electric CompanyInventors: Mark P. D'Evelyn, Nicole A. Evers
-
Patent number: 6936487Abstract: A first film of rare-earth metal is formed on a semiconductor region of compound semiconductor exposed on a substrate. A second film essentially comprising silicon is formed on the surface of the first film. The first and second films are heated to silicidate at least a portion of the first film in contact with the second film. It is possible to lower the contact resistance of an ohmic electrode formed on semiconductor having a wide band gap.Type: GrantFiled: May 6, 2003Date of Patent: August 30, 2005Assignee: Fujitsu LimitedInventors: Keiji Ikeda, Yoshimi Yamashita
-
Patent number: 6933529Abstract: An active matrix type organic light emitting diode device and a thin film transistor thereof are disclosed in the present invention. The driving thin film transistor for an active matrix type organic light emitting diode (AMOLED) device having first and second electrodes spaced apart from each other and an organic light emitting layer disposed between the first and second electrodes includes a gate electrode on a substrate, a semiconductor layer over the gate electrode, and source and drain electrodes on the semiconductor layer, wherein the source and drain electrodes are spaced apart from each other and respectively overlap portions of the gate electrode, and an overlapping area between the gate electrode and the source electrode is larger than an overlapping area between the gate electrode and the drain electrode.Type: GrantFiled: June 30, 2003Date of Patent: August 23, 2005Assignee: LG. Philips LCD Co., Ltd.Inventors: Juhn-Suk Yoo, Jae-Yong Park
-
Patent number: 6927079Abstract: A semiconductor wafer is placed into a probe fixture with a front side of the wafer facing up. Power and signal probes are then placed on an integrated circuit (IC) formed on the front side of the wafer. The probe fixture is retained at a test station either in a upright or an inverted position for testing and optical failure analysis. The probe fixture includes a position adjustment mechanism to locate the entire probe above the wafer and to more precisely position a tip of the probe on the IC. Optical failure analysis techniques are performed on the front side or the back side of the wafer while the wafer is retained in the test fixture and the probes are connected to the IC.Type: GrantFiled: December 6, 2000Date of Patent: August 9, 2005Assignee: LSI Logic CorporationInventor: Margaret S. Fyfield
-
Patent number: 6927424Abstract: A light emitting diode is composed of a generally T-shaped body section (36) and a resin forming section (37) projected on a front surface of the body section (36). The body section (36) has an upright portion (32) inserted into a hole (51) provided in a motherboard (50) and base portions (31a and 31b) which extend from the upright portion and which are mounted on a peripheral edge of the hole (51). The resin forming section (37) includes a non-translucent frame (40) extending from a front surface of the upright portion (32) and an extension part (41) further projecting forwardly larger than the frame. The extension part (41) has a mounted portion (42) mounted on the peripheral edge of the hole (51) of the motherboard (50). Mounted in the concave portion (44) provided in the frame (40) is a light emitting diode element (34), which is sealed by a sealing body (45) of a translucent resin.Type: GrantFiled: November 13, 2003Date of Patent: August 9, 2005Assignee: Citizen Electronics Co., Ltd.Inventor: Hidemoto Uekusa
-
Patent number: 6919584Abstract: A colorless light approaching that of white light in nature, is produced by using a blue color LEDs and a green color LED are covered with a red color phosphorescent glue and a yellow phosphorescent glue in separate layers or a mixed layer.Type: GrantFiled: October 3, 2003Date of Patent: July 19, 2005Assignee: Harvatek CorporationInventors: Bily Wang, Jonnie Chuang, Chuanfa Lin
-
Patent number: 6916674Abstract: The present invention discloses a method for fabricating multiple-thickness insulator layers via strain field generated by stress. The strain field is used for alternating a develop mechanism of insulator layers on the quantum dots. By forming the multiple-thickness insulator layers at various developing rates, not only leakage current is prevented, but also components are kept isolated in the nano-electronics components. In nano-electronics manufacturing, the method for fabricating multiple-thickness insulator layers results in both better product reliability and the yield rate. It is potential for integral circuit manufacturing.Type: GrantFiled: November 12, 2003Date of Patent: July 12, 2005Assignee: Industrial Technology Research InstituteInventors: Pang-Shiu Chen, Buo-Chin Hsu, Chee-Wee Liu
-
Patent number: 6917459Abstract: A method of forming a MEMS device includes providing a substructure including a base material and at least one conductive layer formed on a first side of the base material, forming a dielectric layer over the at least one conductive layer of the substructure, forming a protective layer over the dielectric layer, defining an electrical contact area for the MEMS device on the protective layer, and forming an opening within the electrical contact area through the protective layer and the dielectric layer to the at least one conductive layer of the substructure.Type: GrantFiled: June 3, 2003Date of Patent: July 12, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Eric L. Nikkel, Mickey Szepesi, Sadiq Bengali, Michael G. Monroe, Stephen J Potochnik
-
Patent number: 6916673Abstract: The invention relates to a method for producing an optical transmitting and receiving device (1, 1a) comprising a light emitting transmission element (3, 3a) and a receiving element (4, 4a) which converts this light into an electrical magnitude. The transmission and receiving elements are inserted into a silicon substrate. The optical transmitting and receiving device (1) is preferably inserted in a monolithic manner into a common substrate, comprising a sequence of superimposed layers for the light emitting transmission element (3) and the light receiving element (4). An electrically insulating intermediate layer (9, 9a) is incorporated between the transmission and receiving element.Type: GrantFiled: December 19, 2000Date of Patent: July 12, 2005Assignee: Micronas GmbHInventors: Ulrich Sieben, Günter Igel
-
Patent number: 6872584Abstract: In a solid state image sensor having micro lenses, the micro lens and a bonding pad electrode are formed on a planarizing layer. Thus, it is no longer necessary to etch the planarizing layer for exposing the bonding pad under the planarizing layer, by use of a photolithography, and therefore, it is possible to avoid dissolution, deform and detachment of the micro lens, which would have otherwise been caused in the prior art by dissolving a photoresist which was used in the photolithography.Type: GrantFiled: September 19, 2002Date of Patent: March 29, 2005Assignee: NEC Electronics CorporationInventor: Yasutaka Nakashiba
-
Patent number: 6869814Abstract: A light emitting diode (LED), and a method for producing the same. The LED includes a substrate that may be made of silicon, a first conductive layer on one side, and a porous insulating layer on the opposite side. The insulating layer defines microcavities therein, the microcavities having sharp tips on their inner surfaces. The microcavities have gas inside. A second conductive layer is disposed over the insulating layer. When an electrical potential is applied between the conductive layers, the gas-filled microcavities act as plasma discharge lamps, emitting light. The light may be in the ultraviolet portion of the spectrum. The method includes etching a substrate to produce a porous insulating layer on one side, depositing a first conductive layer on the opposite side, and depositing a second conductive layer over the insulating layer. The microcavities in the insulating layer are then filled with gas.Type: GrantFiled: May 21, 2004Date of Patent: March 22, 2005Inventors: Kok Wai Cheah, Wai Kwok Wong, Hoi Lam Tam
-
Patent number: 6870194Abstract: An apparatus and a method are provided for generating an optical pulse by using a current pulse. The arrangement is based on a specific semiconductor structure, where a carrier injector is separated from the optically active region by a potential barrier for the injected carriers and on low carrier mobility in the semiconductor component, which features give rise to formation of a current-assisted strong electric field in the optically active region at moderate current densities before positive net gain is achieved. The current-assisted electric field broadens the gain spectrum in the active layer thus suppressing positive net gain and permitting carrier accumulation in the active layer. When the current pulse is stopped, the positive net gain is achieved, giving rise to an optical emission from the active layer.Type: GrantFiled: January 24, 2003Date of Patent: March 22, 2005Assignee: Oulun YliopistoInventors: Sergey Vainshtein, Juha Tapio Kostamovaara, Larisa Shestak, Mikhail Sverdlov
-
Patent number: 6858875Abstract: A light-emitting-element array has a semiconductor layer formed on a current-blocking layer. Light-emitting elements are formed in the semiconductor layer by diffusion of an impurity of a different conductive type. An isolation trench divides the semiconductor layer into a first region and a remaining region, and divides the array of light-emitting elements into segments disposed alternately in these two regions, each segment preferably including one or two light-emitting elements. A first shared interconnecting pad is electrically coupled to the light-emitting elements in the first region by electrical paths not crossing the isolation trench. A second shared interconnecting pad is electrically coupled to light-emitting elements in the remaining semiconductor region by electrical paths crossing the isolation trench. The array can then be driven by a number of separate interconnecting pads equal to half the number of the light-emitting elements.Type: GrantFiled: July 31, 2003Date of Patent: February 22, 2005Assignee: Oki Data CorporationInventors: Hiroshi Hamano, Masumi Taninaka, Masaharu Nobori, Masumi Koizumi
-
Patent number: 6858909Abstract: A method and structure for a microelectronic device comprises a first film over a substrate, a first polish resistant layer over the first film, a second film over the first polish resistant layer, a second polish resistant layer over the second film, wherein the first and second polish resistant layers comprise diamond-like carbon. The first film comprises an electrically resistive material, while the second film comprises low resistance conductive material. The first film is an electrical resistor embodied as a magnetic read sensor. The electrically resistive material is sensitive to magnetic fields. The device further comprises a generally vertical junction between the first and second films and a dielectric film abutted to the electrically resistive material.Type: GrantFiled: November 29, 2002Date of Patent: February 22, 2005Assignee: International Business Machines CorporationInventors: Marie-Claire Cyrille, Frederick H. Dill, Cherngye Hwang, Jui-Lung Li
-
Patent number: 6849861Abstract: Performance of an electronic device is highly improved by epitaxially growing a perovskite-type oxide thin film on an inorganic amorphous layer or an organic solid layer in a desired direction; and furthermore, a high performance electronic device is provided by incorporating the electronic device into an integrated circuit, wherein oxide thin layers are formed on the inorganic amorphous layer or the organic solid layer, and the perovskite-type oxide thin film is grown epitaxially on the oxide layer, the oxide thin layers being able to be at least one of strontium oxide, magnesium oxide, cerium oxide, zirconium oxide, yttrium stabilized zirconium oxide, and strontium titanate; and as the perovskite-type oxide thin film, the perovskite-type oxide thin film being a piezoelectric or ferroelectric material, for example, is used.Type: GrantFiled: March 27, 2002Date of Patent: February 1, 2005Assignee: Seiko Epson CorporationInventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
-
Patent number: 6849473Abstract: In a semiconductor light-emitting device, on an n-GaAs substrate are stacked an n-GaAs buffer layer, an n-cladding layer, an undoped active layer, a p-cladding layer, a p-intermediate band gap layer and a p-current diffusion layer. Further, a first electrode is formed under the n-GaAs substrate, and a second electrode is formed on the grown-layer side. In this process, a region of the p-intermediate band gap layer just under the second electrode is removed, the p-current diffusion layer is stacked in the removal region on the p-cladding layer, and a junction plane of the p-current diffusion layer and the p-cladding layer becomes high in resistance due to an energy band structure of type II. This semiconductor light-emitting device is capable of reducing ineffective currents with a simple construction and taking out light effectively to outside, thus enhancing the emission intensity.Type: GrantFiled: September 25, 2002Date of Patent: February 1, 2005Assignee: Sharp Kabushiki KaishaInventors: Kazuaki Sasaki, Junichi Nakamura, Shouichi Ohyama
-
Patent number: 6844572Abstract: A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InxGayAlzN, wherein x+y+z=1, 0?x?1, 0?y?1, and 0?z?1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.Type: GrantFiled: March 18, 2003Date of Patent: January 18, 2005Assignees: Sharp Kabushiki Kaisha, Nobuhiko SwakiInventors: Nobuhiko Sawaki, Norikatsu Koide, Kensaku Yamamoto
-
Patent number: 6841842Abstract: An optical-electrical (OE) package includes a substrate electrically coupled to a motherboard via one or more capacitor DC shunts (CDCSs). In one embodiment, the substrate includes an IC chip electrically coupled to a first set of contact-receiving members on an upper surface of the substrate. The substrate also includes a light-emitting package and a photodetector package electrically coupled to respective second and third sets of contact-receiving members on the substrate lower surface. The substrate has internal wiring that electrically interconnects the IC chip, the light-emitting package and the photodetector array. The light-emitting package and the photodetector array are optically coupled to respective first and second waveguide arrays formed in or on the motherboard. The CDCSs mitigate noise generated by the IC chip by serving as a local current source.Type: GrantFiled: August 26, 2003Date of Patent: January 11, 2005Assignee: Intel CorporationInventor: Yuan-Liang Li
-
Patent number: 6833282Abstract: In order to make a charge couple device including an interconnect layer to contact active areas, a first layer of a first titanium nitride layer on the active areas, and then a series of alternating titanium and titanium nitride layers are deposited to form a composite sandwich structure. This structure is less prone flaking while able to withstand high temperature treatment during fabrication of backside illuminated sensors to improve quantum efficiency and reduce dark current.Type: GrantFiled: May 12, 2003Date of Patent: December 21, 2004Assignee: DALSA Semiconductor Inc.Inventors: Robert Groulx, Raymond Frost, Yves Tremblay
-
Patent number: 6831301Abstract: A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each converter is able to (1) convert received electromagnetic signals into electronic signals, which it then may relay to leads on the device on which it is disposed; and (2) receive electronic signals from leads on the device on which it is disposed and convert them into corresponding electromagnetic signals, which it may transmit to a corresponding converter on the other device. Not having a direct physical connection between the chip and the chip package decreases the inductive and capacitive effects commonly experienced with physical bonds.Type: GrantFiled: October 15, 2001Date of Patent: December 14, 2004Assignee: Micron Technology, Inc.Inventors: Tim Murphy, Lee Gotcher
-
Publication number: 20040245530Abstract: An optical semiconductor device of which the moisture resistance and the like are improved and the manufacturing method thereof are provided. An optical semiconductor device of the embodiment is configured to include an optical semiconductor element on a surface of which a circuit portion including a light-receiving or light-emitting element is formed; a terminal portion which is provided on a back of the optical semiconductor element and electrically connected with the circuit portion; a covering layer which covers the surface of the optical semiconductor element and is made of a transparent material; and sealing resin which covers side faces of the covering layer and of the optical semiconductor element. The circuit portion and the terminal portion may be connected by a rewiring pattern.Type: ApplicationFiled: March 30, 2004Publication date: December 9, 2004Inventors: Koujiro Kameyama, Kiyoshi Mita
-
Publication number: 20040232431Abstract: A semiconductor structure for providing cross-point switch functionality includes a monocrystalline silicone substrate, and an amorphous oxide material overlying the monocrystalline silicone substrate. A monocrystalline perovskite oxide material overlies the amorphous oxide material, and a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material. The monocrystalline compound semiconductor material includes an optical source component operable to generate a radiant energy transmission. A diffraction grating is optically coupled with the optical source component and has a configuration for passing the radiant energy transmission in a predetermined radiant energy intensity pattern, forming a plurality of replications of the radiant energy transmission.Type: ApplicationFiled: June 29, 2004Publication date: November 25, 2004Applicant: MOTOROLA, INC.Inventors: Robert Lempkowski, Daniel Gamota
-
Patent number: 6822306Abstract: The reduction in size, noise and voltage is realized in a MOS solid-state imaging device. A gate electrode in a pixel part is formed in a two-level structure. An amplifier gate of an amplifier transistor is formed in the first level while a select gate of a select transistor is formed in the second level. The both are structurally partly overlapped. With the first-level amplifier gate as self-alignment, ions are implanted for a select gate in the second level. Although the gate electrode if formed in one level as in the conventional requires a space of nearly a design rule between the amplifier gate and the select gate, the structure of the invention can eliminate such a dead space. Meanwhile, because the diffusion layer does not exist between the amplifier gate and the select gate, the diffusion layer is eliminated of sheet resistance and voltage drop.Type: GrantFiled: September 16, 2002Date of Patent: November 23, 2004Assignee: Sony CorporationInventor: Keiji Mabuchi
-
Patent number: 6821804Abstract: This invention describes new LEDs having light extraction structures on or within the LED to increase its efficiency. The new light extraction structures provide surfaces for reflecting, refracting or scattering light into directions that are more favorable for the light to escape into the package. The structures can be arrays of light extraction elements or disperser layers. The light extraction elements can have many different shapes and are placed in many locations to increase the efficiency of the LED over conventional LEDs. The disperser layers provide scattering centers for light and can be placed in many locations as well. The new LEDs with arrays of light extraction elements are fabricated with standard processing techniques making them highly manufacturable at costs similar to standard LEDs. The new LEDs with disperser layers are manufactured using new methods and are also highly manufacturable.Type: GrantFiled: September 17, 2003Date of Patent: November 23, 2004Assignee: Cree, Inc.Inventors: Brian Thibeault, Michael Mack, Steven DenBaars
-
Patent number: 6821793Abstract: The disclosure is directed toward an optical excitation/detection device that includes an arrayed plurality of photodetectors and discrete photoemitters, as well as a method for making such a device. A CMOS fabricated photodetector array includes an arrayed plurality of photoreceptor areas and photoemitter areas, wherein each photoreceptor area includes a CMOS integrated photoreceptor and each photoemitter area includes at least two buried electric contact pads. The CMOS array is selectively etched back at the locations of the photoemitter areas for regions to reveal the buried contact pads. A plurality of discrete semiconductor photoemitter devices (such as, for example, light emitting diodes) are inserted into, and mechanically retained within, the regions of the CMOS fabricated photodetector array.Type: GrantFiled: September 22, 2003Date of Patent: November 23, 2004Assignee: Agilent Technologies, Inc.Inventors: Edward Verdonk, Richard J. Pittaro, Shahida Rana, David Andrew King, Frederick A. Stawitcke, Richard D. Pering
-
Patent number: 6818479Abstract: A highly moisture-sensitive element and method of making such element includes an encapsulation enclosure encapsulating all of the highly moisture-sensitive electronic devices on a substrate and a sealing material positioned between the substrate and the encapsulation enclosure to form a complete seal between the substrate and the encapsulation enclosure around each highly moisture-sensitive electronic device or around groups of highly moisture-sensitive electronic devices.Type: GrantFiled: April 9, 2003Date of Patent: November 16, 2004Assignee: Eastman Kodak CompanyInventors: Michael L. Boroson, John Schmittendorf, Jeffrey P. Serbicki
-
Patent number: 6815723Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.Type: GrantFiled: December 12, 2002Date of Patent: November 9, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama
-
Patent number: 6812058Abstract: Data is encoded in a solid state image sensor that includes a sensor pixel array by varying the color processing applied to at least some of the border pixels of the sensor pixel array. Data may be encoded in the color processing by varying the pattern of a color filter mosaic and by varying a pattern of a microlens array in accordance with a predetermined scheme. This scheme includes omission of color filter material and omission of the microlens array from selected pixels. The data, typically encoded in a binary format, is read by illuminating the sensor pixel array and by processing the output signals from the border pixels. The encoded data may include color process codes, mask revision codes and product codes.Type: GrantFiled: February 7, 2002Date of Patent: November 2, 2004Assignee: STMicroelectronics Ltd.Inventor: Carl Dennis
-
Publication number: 20040206968Abstract: An annular oblique light illumination apparatus manufactured by using a flexible wiring substrate in which a plurality of arcuate zonal wiring patterns each in the form of a developed frustconical shape as a light emitting device arranging surface when cut along the pattern are serpiginously formed continuously to a base film of a predetermined shape, by setting and soldering light emitting devices to the arcuate zonal wiring patterns, cutting out the arcuate zonal wiring patterns to form light emitting device arrays and fixing the same to the arranging surface, whereby the wiring substrate can be supported reliably without using any special jig conforming the arcuate shape of the wiring patterns for mounting the light emitting devices, thereby improving the soldering operation efficiency, saving the troubles of exchange and handling of jigs and further, avoiding slackening or distortion of the wiring substrate even in a case of applying soldering by a flow soldering apparatus.Type: ApplicationFiled: March 23, 2004Publication date: October 21, 2004Applicant: Moritex CorporationInventors: Makoto Toyota, Shin Toyoda, Hitoshi Yoshida
-
Patent number: 6798132Abstract: A display device using an organic light emitting element is provided which is structured so as to ensure excellent display performance by avoiding dot defect and improve long-term reliability. The distance between an organic light emitting element and a sealing substrate is controlled using the top of a bank that is placed in a pixel portion and the top of an insulating film that is placed in a driving circuit portion. As a result, a gap is provided between the organic light emitting element and the sealing substrate and a damage to the organic light emitting element can be avoided. Furthermore, the sealing substrate can be as close to an element substrate as possible, thereby keeping the amount of moisture that enters the display device from its sides small.Type: GrantFiled: April 19, 2002Date of Patent: September 28, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Rumo Satake
-
Patent number: 6794686Abstract: A colorless light approaching that of white light in nature, is produced by using no more than two color LEDs covered with one or more layers of complementary color phosphorescent glue on an insulating substrate.Type: GrantFiled: June 19, 2003Date of Patent: September 21, 2004Assignee: Harvatek CorporationInventors: Bill Chang, Bily Wang
-
Patent number: 6791117Abstract: A semiconductor light emitting device is disclosed, which comprises a substrate, and a multi-layer semiconductor film formed on the substrate, the multi-layer semiconductor film including a plurality of semiconductor layers overlaid on the substrate, the semiconductor layers having a light emission layer for emitting a light, wherein the light is picked up at a first side of the multi-layer semiconductor film, which is a side opposite to the substrate, wherein a pattern having a light pickup surface is formed on a light emitting portion of the multi-layer semiconductor film, the light pickup surface is in a (111) plane or a plane in the vicinity of the (111) plane, and an unevenness is formed on the light pickup surface.Type: GrantFiled: January 14, 2003Date of Patent: September 14, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Shunji Yoshitake, Koichi Takahashi, Shinji Nunotani, Kenichi Ohashi
-
Patent number: 6787435Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).Type: GrantFiled: July 5, 2002Date of Patent: September 7, 2004Assignee: GELcore LLCInventors: Shawn R. Gibb, Robert F. Karlicek, Prosanto K. Mukerji, Hari S. Venugopalan, Ivan Eliashevich
-
Patent number: 6784009Abstract: An OLED device having pillars with cross section that is wider on the top. The pillars structure a conductive layer during deposition into distinct portions located between the pillars and on the top of the pillars. In one embodiment, the grooves between the pillars extend outside the electrode region to prevent shorting of adjacent electrodes.Type: GrantFiled: September 6, 2002Date of Patent: August 31, 2004Assignee: Osram Opto Semiconductors (Malaysia) SDN BHDInventors: Hooi Bin Lim, Hagen Klausmann, Bernd Fritz
-
Patent number: 6781211Abstract: Disclosed is a photodiode with improved light-receiving efficiency and coupling effect with an optical fiber, whose capacitance may be decreased. The inventive photodiode includes a substrate; a buffer layer and a light-absorbing layer laminated in sequence on the substrate; an epitaxial layer formed on the upper surface of the light absorbing layer and having an active region with a surface in a convex lens shape so that it has greater surface area and more effective light-receiving area than an active region defined in a two-dimensional plane, the active region further having a convex surface can harvest light with its convex-lens characteristics; a dielectric layer formed on the upper surface of the epitaxial layer; a first metal electrode formed on an upper surface of the dielectric layer; and, a second metal electrode formed on an under surface of the substrate.Type: GrantFiled: January 17, 2003Date of Patent: August 24, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Hwa-Young Kang, Jung-Kee Lee
-
Publication number: 20040149995Abstract: A photo-coupler semiconductor device includes first and second planar lead frames each having a main portion and a distal portion, a light emitting element and a light receiving element respectively mounted on upper surfaces of the distal portions of the first and second lead frames, a light-transmitting resin member which covers the light emitting element and the light receiving element, and supports the distal portions of the first and second lead frames in spaced opposed relation with the light emitting element and the light receiving element being mounted on the upper surfaces of the distal portions so that the main portions of the first and second lead frames are located in coplanar relation, and a opaque resin member which covers the light-transmitting resin member, and supports the main portions of the first and second lead frames. The light-transmitting resin member and the opaque resin member are each composed of an epoxy resin as a base resin.Type: ApplicationFiled: December 30, 2003Publication date: August 5, 2004Inventors: Hiroyuki Shoji, Hideya Takakura, Kazuo Kusuda
-
Publication number: 20040142502Abstract: An active matrix type organic light emitting diode device and a thin film transistor thereof are disclosed in the present invention. The driving thin film transistor for an active matrix type organic light emitting diode (AMOLED) device having first and second electrodes spaced apart from each other and an organic light emitting layer disposed between the first and second electrodes includes a gate electrode on a substrate, a semiconductor layer over the gate electrode, and source and drain electrodes on the semiconductor layer, wherein the source and drain electrodes are spaced apart from each other and respectively overlap portions of the gate electrode, and an overlapping area between the gate electrode and the source electrode is larger than an overlapping area between the gate electrode and the drain electrode.Type: ApplicationFiled: June 30, 2003Publication date: July 22, 2004Applicant: LG.Philips LCD Co., Ltd.Inventors: Juhn-Suk Yoo, Jae-Yong Park
-
Patent number: 6765238Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.Type: GrantFiled: September 12, 2002Date of Patent: July 20, 2004Assignee: Agilent Technologies, Inc.Inventors: Yin-Lan Chang, Ashish Tandon, Michael H. Leary, Michael R. T. Tan
-
Patent number: 6759686Abstract: A light emitting diode (LED), and a method for producing the same. The LED includes a substrate that may be made of silicon, a first conductive layer on one side, and a porous insulating layer on the opposite side. The insulating layer defines microcavities therein, the microcavities having sharp tips on their inner surfaces. The microcavities have gas inside. A second conductive layer is disposed over the insulating layer. When an electrical potential is applied between the conductive layers, the gas-filled microcavities act as plasma discharge lamps, emitting light. The light may be in the ultraviolet portion of the spectrum. The method includes etching a substrate to produce a porous insulating layer on one side, depositing a first conductive layer on the opposite side, and depositing a second conductive layer over the insulating layer. The microcavities in the insulating layer are then filled with gas.Type: GrantFiled: March 14, 2003Date of Patent: July 6, 2004Inventors: Kok Wai Cheah, Wai Kwok Wong, Hoi Lam Tam
-
Patent number: 6756669Abstract: Numerous embodiments of a heat spreader, comprised of a plurality of downset legs, which provides a simple and lower cost method of forming a heat spreader as compared to conventional methods are disclosed, as well as novel apparatus and methods for attaching the heat spreader to a substrate and a secondary device to the heat spreader, are disclosed.Type: GrantFiled: April 5, 2002Date of Patent: June 29, 2004Assignee: Intel CorporationInventors: Sabina J. Houle, Nick Labanok
-
Patent number: 6753552Abstract: A growth-selective structure of LED is created by growing first and patterning an oxidation layer on a substrate, then applying a lateral-growth technology to form a buffer layer on the oxidation layer selectively, and an n-GaN layer, an active layer, and a p-GaN layer on the buffer layer one after another.Type: GrantFiled: August 2, 2003Date of Patent: June 22, 2004Assignee: Formosa Epitaxy IncorporationInventors: Wen-How Lan, Lung-Chien Chen, Fen-Ren Chien
-
Patent number: 6753201Abstract: A method of manufacturing a semiconductor device is provided. The device is manufactured with use of an SOI (Silicon On Insulator) substrate having a first silicon layer, an oxide layer, and a second silicon layer laminated in this order. After forming a trench reaching the oxide layer from the second silicon layer, dry etching is performed, thus allowing the oxide layer located at the trench bottom to be charged at first. This charging forces etching ions to impinge upon part of the second silicon layer located laterally to the trench bottom. Such part is removed, forming a movable section. For example, ions to neutralize the electric charges are administered into the trench, so that the electric charges are removed from charged movable electrodes and their charged surrounding regions. Removing the electric charges prevents the movable section to stick to its surrounding portions.Type: GrantFiled: May 28, 2002Date of Patent: June 22, 2004Assignee: Denso CorporationInventors: Hiroshi Muto, Tsuyoshi Fukada, Kenichi Ao, Minekazu Sakai, Yukihiro Takeuchi, Kazuhiko Kano, Junji Oohara
-
Publication number: 20040115861Abstract: A method of forming an integrated microelectronic device and a micro channel is provided. The method offers an inexpensive way of integrating devices that are usually incompatible during fabrication, a microchannel and a microelectronic structure such as an electro-optic light source, a detector or a MEMs device into a single integrated structure.Type: ApplicationFiled: December 16, 2002Publication date: June 17, 2004Applicant: Palo Alto Research Center IncorporatedInventors: William S. Wong, Michael L. Chabinyc, Steven E. Ready, Michael A. Kneissl, Mark R. Teepe
-
Patent number: 6750072Abstract: The present invention relates to a method for micro-fabricating a pixelless thermal imaging device. The imaging device up-converts a sensed 2-dimensional M/FIR image into a 2-dimensional image in the NIR to visible spectrum in dependence thereupon. A plurality of layers forming an integrated QWIP-LED wafer are crystallographically grown on a surface of a first substrate. The layers comprise an etch stop layer, a bottom contact layer, a plurality of layers forming a QWIP and a LED, and a top contact layer. At the top of the QWIP-LED wafer an optical coupler such as a diffraction grating for coupling at least a portion of incident M/FIR light into modes having an electric field component perpendicular to quantum wells of the QWIP is provided. In following processing steps the first substrate and the etch stop layer are removed. Various different thermal imaging devices are manufactured by changing the order of manufacturing steps, omitting some steps or using different materials.Type: GrantFiled: April 7, 2003Date of Patent: June 15, 2004Assignee: National Research Council of CanadaInventors: Margaret Buchanan, Martin Byloos, Shen Chiu, Emmanuel Dupont, Mae Gao, Hui Chun Liu, Chun-ying Song
-
Patent number: 6737288Abstract: A heterojunction structure has an AlxGa1−xAs layer (0<x≦1), on which an AlyGa1−yAs layer (0≦y≦1 and y<x) is provided and having a band gap energy smaller than that of the AlxGa1−xAs layer and a valence band energy edge higher than that of the AlxGa1−xAs layer. When the AlyGa1−yAs layer is selectively etched, an Au electrode film is formed on a surface of the AlyGa1−yAs layer outside an etching region, a resist pattern is formed covering the Au electrode film and leaving exposed the etching region, and the AlyGa1−yAs layer is selectively removed by etching while irradiating with light, using an etching solution having a Fermi level higher than that of the AlyGa1−yAs layer.Type: GrantFiled: January 31, 2002Date of Patent: May 18, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Zempei Kawazu, Tetsuya Yagi
-
Patent number: 6737679Abstract: An optoelectronic unit and a transparent conductive substrate of the same are disclosed. The transparent conductive substrate comprises a transparent plate, a transparent electrode film, an insulation part, and a bounding pad, wherein the transparent electrode film and the insulation part are formed on the transparent plate, the insulation part divides the transparent electrode film into a first transparent electrode film area and a second transparent electrode film area that non-conduct each other, and the bounding pad is formed on the second transparent electrode film area. The optoelectronic unit comprises the aforementioned transparent conductive substrate, an optoelectronic element, and a conductive wire, wherein one electrode of the optoelectronic element is electrically connected to the aforementioned first transparent electrode film area, and the other electrode of the optoelectronic element is electrically connected to the aforementioned bounding pad by the conductive wire.Type: GrantFiled: January 6, 2003Date of Patent: May 18, 2004Assignee: Highlink Technology CorporationInventors: Ming-Der Lin, Kwang-Ru Wang