Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
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Publication number: 20080067526Abstract: A flexible circuit that includes mounted electrical components, where bonding wires providing an electrical connection to the electrical components are aligned perpendicularly to the primary plane in which the flexible circuit bends and multiple redundant vias for electrical and thermal connections. The flexible circuit may include an array of light emitting diodes “(LEDs”) that are positioned length-wise in a flexile LED strip as well as flexible printed circuits having a plurality of electrical components attached thereto, where the electrical components may include LEDs. Methods of improving the reliability and thermal dissipation of a flexible circuit and producing a flexible circuit with re-aligned bonding wires and multiple vias for electrical and thermal connections are also provided.Type: ApplicationFiled: September 18, 2006Publication date: March 20, 2008Inventor: Tong Fatt Chew
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Patent number: 7341879Abstract: A point source light emitting-diode (LED) comprises a substrate, an epitaxy structure, a first electrode, an isolation layer, a bonding layer, a contact layer, and a connection bridge. The epitaxy structure is located on the substrate, and the substrate has a pattern including a light emitting area located on the light-emitting surface of the epitaxy structure. The first electrode is located on the substrate, and the isolation layer is located on the epitaxy structure adjacent to the first electrode. The contact layer is located on the first electrode, and the bonding layer is located on one portion of the isolation layer. The connection bridge with a width less than one half of the diameter of the light emitting area is located on the other portion of the isolation layer, thereby connecting the contact layer and the bonding layer.Type: GrantFiled: July 7, 2006Date of Patent: March 11, 2008Assignee: Epistar CorporationInventors: Tzu-Ying Yen, Han-Tsun Lai, Jen-Chau Wu, Chung-Cheng Tu
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Patent number: 7326582Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region.Type: GrantFiled: January 10, 2007Date of Patent: February 5, 2008Assignee: Legerity, Inc.Inventors: Chris Speyer, William E. Moore
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Publication number: 20080013583Abstract: A method for manufacturing an optical device, the method includes the steps of: forming a multilayer film, including forming a first mirror above a substrate, forming an active layer above the first mirror, forming a second mirror above the active layer, forming a semiconductor layer on the second mirror, and forming a sacrificial layer on the semiconductor layer; conducting a reflection coefficient examination on the multilayer film; patterning the multilayer film to form a surface-emitting laser section having the first mirror, the active layer and the second mirror, and a diode section having the semiconductor layer; and removing at least a portion of the sacrificial layer to expose at least a portion of an upper surface of the semiconductor layer, wherein an optical film thickness of the semiconductor layer is formed to be an odd multiple or an even multiple of ?/4, where ? is a design wavelength of light emitted by the surface-emitting laser section, and an optical film thickness of the sacrificial layerType: ApplicationFiled: June 26, 2007Publication date: January 17, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Yasutaka IMAI
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Patent number: 7314772Abstract: Embodiments of methods, apparatuses, devices, or systems for forming a photonic device are described.Type: GrantFiled: March 14, 2005Date of Patent: January 1, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Alexander Govyadinov, Robert Newton Bicknell
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Publication number: 20070285411Abstract: An organic light emitting display device includes a substrate, a thin film transistor having a gate insulating layer and an inter-insulating layer, an organic light emitting diode electrically connected with the thin film transistor, and a photo sensor, wherein the gate insulating layer includes a relief structure positioned above the photo sensor.Type: ApplicationFiled: March 8, 2007Publication date: December 13, 2007Inventors: Sun A Yang, Youn Chul Oh, Eun Jung Lee, Won Seok Kang
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Patent number: 7300810Abstract: A solid-state imaging device is provided in which noise to an image signal is restrained and miniaturization is facilitated in a peripheral circuit formation region. A solid-state imaging device includes a pixel formation region 4 and a peripheral circuit formation region 20 formed in the same semiconductor substrate; in the peripheral circuit formation region 20 a first element isolation portion is formed of an element isolation layer 21 in which an insulation layer is buried in a semiconductor substrate 10; in the pixel formation region 4 a second element isolation portion made of an element isolation region 11 formed inside the semiconductor substrate 10 and an element isolation layer 12 projecting upward from the semiconductor substrate 10 is formed; and a photoelectric conversion element 16 (14, 15) is formed extending to a position under the element isolation layer 12 of the second element isolation portion.Type: GrantFiled: November 16, 2006Date of Patent: November 27, 2007Assignee: Sony CorporationInventor: Ikuo Yoshihara
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Patent number: 7297564Abstract: A method of fabricating vertical sidewalls on silicon (110) substrates for use in Si/SiGe photodetectors includes preparing a silicon (110) layer wherein the silicon (110) plane is parallel to an underlying silicon wafer surface. Masking the silicon (110) layer with mask sidewalls parallel to a silicon (111) layer plane and etching the silicon (110) layer to remove an un-masked portion thereof, leaving a patterned silicon (110) layer having vertical silicon (111) sidewalls. Removing the mask; growing SiGe-containing layers on the patterned silicon (110) layer; and fabricating a photodetector.Type: GrantFiled: May 2, 2006Date of Patent: November 20, 2007Assignee: Sharp Laboratories of America, Inc.Inventors: Douglas J. Tweet, Jong-Jan Lee, Jer-Shen Maa, Sheng Teng Hsu
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Patent number: 7285431Abstract: This invention relates to a method for manufacturing a GaN based LED of a back hole structure, and the method comprises: epitaxially growing an N type GaN layer, a multi-quantum wells emitting active region and a P type GaN layer in turn on an insulation substrate made of sapphire or other materials; etching the N type GaN layer by photoetching, and forming a P type ohmic contact electrode and an N type ohmic contact electrode; scribing the chip to divide the dies on the epitaxial chip into individual die; forming a SiO2 insulation isolation layer on both sides of the silicon chip, forming a metal electrode on a face side, and forming a back hole pattern on a back side; forming a back hole; forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching; forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base; on the back side of the base, directly attaching the base to a heat sink of a housing; bonding the die with the facType: GrantFiled: June 27, 2005Date of Patent: October 23, 2007Assignee: Institute of Semiconductors, Chinese Academy of SciencesInventors: Jinmin Li, Guohong Wang, Liangchen Wang, Long Ma, Zhongchao Fan
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Patent number: 7285433Abstract: The invention is directed to a method for optical and electrical isolation between adjacent integrated devices. The method comprises the steps of forming at least one trench through an exposed surface of a semiconductor wafer by removing a portion of the semiconductor wafer material, forming an electrically insulating layer on the sidewalls and the bottom of the at least one trench, filling the at least one trench by conformally depositing an optically isolating material, and planarizing the semiconductor wafer surface by removing the portion of the optically isolating material above the exposed surface of the semiconductor wafer.Type: GrantFiled: November 6, 2003Date of Patent: October 23, 2007Assignee: General Electric CompanyInventors: James William Kretchmer, Jeffrey Bernard Fedison, Dal Marius Brown, Peter Micah Sandvik
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Patent number: 7276724Abstract: Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module.Type: GrantFiled: January 20, 2005Date of Patent: October 2, 2007Assignee: Nanosolar, Inc.Inventors: James R. Sheats, Sam Kao, Gregory A. Miller, Martin R. Roscheisen
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Patent number: 7274039Abstract: A method of fabricating a substrate for an organic electroluminescent display device includes forming a first electrode on a substrate in a pixel region and a non-pixel region, the first electrode including a first conductive material, forming an auxiliary electrode on the first electrode in the non-pixel region, the auxiliary electrode including a second conductive material and contacting the first electrode, the first and second conductive materials being different from one another, forming a bank corresponding to the auxiliary electrode, the bank surrounding the pixel region, forming an organic electroluminescent layer on the first electrode, the organic electroluminescent layer in the pixel region surrounded by the bank, and forming a second electrode on the organic electroluminescent layer, the second electrode corresponding to the organic electroluminescent layer.Type: GrantFiled: December 28, 2004Date of Patent: September 25, 2007Assignee: LG.Philips LCD Co., Ltd.Inventor: Jae-Yong Park
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Patent number: 7265389Abstract: A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.Type: GrantFiled: October 14, 2005Date of Patent: September 4, 2007Assignee: National Central UniversityInventors: Cheng-Yi Liu, Yuan-Tai Lai, Shen-Jie Wang
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Patent number: 7264976Abstract: A method of manufacturing a plurality of microlenses on a substrate comprises forming a grid having raised ridges defining a plurality of openings on the substrate and forming a plurality of patterned photoresist features each disposed within one of the plurality of openings. The plurality of patterned photoresist features can then be reflowed inside the grid.Type: GrantFiled: February 23, 2005Date of Patent: September 4, 2007Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jack Deng, Chin Chen Kuo, Fu-Tien Weng, Chih-Kung Chang, Bii-Junq Chang
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Patent number: 7259031Abstract: Photonic interconnect reconfigurably couples integrated circuits such as microprocessor, memory or other logic components. Detector, modulator, broad-band coupler and waveguide elements provide transmit and receive capability on CMOS substrate. Computer-implemented design software and reusable component library automate photonic and circuit design and simulation for manufacturability.Type: GrantFiled: November 8, 2005Date of Patent: August 21, 2007Assignee: Luxtera, Inc.Inventors: Alexander G. Dickinson, Lawrence C. Gunn, III, Philip M. Neches, Andrew Shane Huang
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Patent number: 7250634Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.Type: GrantFiled: March 19, 2004Date of Patent: July 31, 2007Assignee: Sony CorporationInventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
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Patent number: 7238542Abstract: It is the object of the present invention to provide a manufacturing method for a compound semiconductor device capable of removing remaining organic substances without deteriorating a characteristic of the compound semiconductor device, wherein a surface of an i-type AlGaAs schottky layer is cleaned in a state where light is blocked using either one of ozonized (O3) water whose ozone concentration is at most 13 mg/L and hydrogenated (H2) water whose hydrogen ion concentration (pH) is from 6 to 8 inclusive, or using both of the ozonized water and the hydrogenated water after a schottky electrode made of Ti/Al/Ti is evaporated onto the exposed i-type AlGaAs schottky layer and a lift-off operation is performed using a remover.Type: GrantFiled: August 27, 2004Date of Patent: July 3, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Kato, Tuneo Yamaguchi, Akiyoshi Tamura
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Patent number: 7235430Abstract: Substrates having increased thermal conductivity are provided, comprising a body having opposed surfaces and a cavity that opens on at least one surface, the cavity containing at least one material having a greater thermal conductivity than the body. Devices are provided comprising a substrate and a semiconductor over a surface of the substrate. Methods of forming devices according to the invention are also provided.Type: GrantFiled: March 30, 2004Date of Patent: June 26, 2007Assignee: Xerox CorporationInventors: Linda T. Romano, Michael A. Kneissl, John E. Northrup
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Patent number: 7235804Abstract: A multichannel monolithic chip that has a number of photo-couplers provided on a single silicon substrate is mounted on an insulating substrate, a first cut groove is formed by dicing between a light-emitting element and a light-receiving element that constitute a photo-coupler, a transparent insulating resin is filled into the first cut groove and then a second cut groove is formed by dicing between the adjacent photo-couplers, each of the light-emitting element and the light-receiving element is electrically connected to an external terminal using a bonding wire, and the entirety of the insulating substrate is molded with a light-blocking resin.Type: GrantFiled: April 10, 2006Date of Patent: June 26, 2007Assignee: Sharp Kabushiki KaishaInventor: Motonari Aki
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Patent number: 7208738Abstract: A light source is disclosed. The light source has a light-emitting chip that includes an LED that generates light in an active region thereof. The LED emits a light signal in a forward direction, and infrared radiation generated in the active region is emitted in a side direction in the form of a first infrared signal. The first light signal is determined by a first drive signal coupled to the LED. The light source also includes an infrared detector positioned to collect a portion of the infrared signal. The infrared detector generates a heat signal indicative of the amount of infrared radiation detected. A controller generates the drive signal so as to maintain the heat signal at a first target value. In light sources having LEDs that emit in different spectral ranges, the infrared detectors can all detect heat in the same spectral range.Type: GrantFiled: February 28, 2005Date of Patent: April 24, 2007Inventors: Sundar Natarajan Yoganandan, Fakhrul Arifin Mohd. Afif, Klan Shin Lee, Slew It Pang, Kheng Leng Tan, Yew Cheong Kuan, Su Lin Oon, Wen Ya Ou, Norfidathul Aizar Abdul Karim, Thye Linn Mok
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Patent number: 7179672Abstract: A nanometer size roughened structure is formed on a surface of a light-emitting element, and luminous efficiency is improved. The roughened structure on the surface of the light-emitting element of the invention is formed into the following shape such that the refractive index smoothly changes: (1) the mean diameter of projections on the roughened surface is smaller than the light wavelength; (2) a pitch of the roughened surface is irregular; and (3) positions of the top and bottom of the roughened surface are distributed from their mean values within the light wavelength in order to give a smooth gradient of the refractive index.Type: GrantFiled: November 1, 2004Date of Patent: February 20, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Koji Asakawa, Akira Fujimoto, Hitoshi Sugiyama, Kenichi Ohashi, Kenji Suzuki, Junichi Tonotani
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Patent number: 7166865Abstract: There is provided and manufactured, at a low cost and with high yields, a semiconductor light emitting device which allows extraction of light produced in an emitter layer not only from its top surface but also from its side surfaces and which has high luminance. An AlGaInP-based semiconductor light emitting device having a contact layer 8 made of (AlyGa1?y)zIn1?zP (0?y?1, 0<z<1) disposed between an emitter layer 3 and a transparent substrate 2 which is transparent to emission wavelengths from the emitter layer 3.Type: GrantFiled: October 5, 2004Date of Patent: January 23, 2007Assignee: Sharp Kabushiki KaishaInventors: Takahisa Kurahashi, Tetsurou Murakami, Shouichi Ohyama, Hiroshi Nakatsu
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Patent number: 7153713Abstract: A method for manufacturing a high efficiency light-emitting diode (LED) is disclosed. In the method, a substrate is provided, in which an N-type buffer layer, an N-type cladding layer and an active layer are stacked on the substrate in sequence. A first P-type cladding layer is formed on the active layer. Next, a growth-interruption step is performed, and a catalyst is introduced to form a plurality of nuclei sites on a surface of the first P-type cladding layer. A second P-type cladding layer is formed on the first P-type cladding layer according to the nuclei sites, so that the second P-type cladding layer has a surface with a plurality of mesa hillocks. Then, a contact layer is formed on the second P-type cladding layer. Subsequently, a transparent electrode is formed on the contact layer.Type: GrantFiled: January 7, 2005Date of Patent: December 26, 2006Assignee: Epitech Technology CorporationInventors: Wei-Chih Lai, Jinn-Kong Sheu, Chi-Ming Tsai, Cheng-Ta Kuo
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Patent number: 7151006Abstract: A method of coating the joined crystals within a semiconductor conversion layer to reduce the dark current without compromising the sensitivity of the conversion layer is presented. A semiconductor conversion layer comprising a plurality of joined crystals and permeated by a polymer material and having microscopic voids is also presented.Type: GrantFiled: November 4, 2003Date of Patent: December 19, 2006Assignees: Varian Medical Systems Technologies, Inc., Radiation Monitoring Devices, Inc.Inventors: George Zentai, Larry D. Partain, Raisa Pavlyunchkova, Kanai S. Shah, Paul R. Bennett
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Patent number: 7141826Abstract: Disclosed is a multi-wavelength light receiving element. The multi-wavelength light receiving element includes a first type substrate. A first intrinsic layer is positioned on the first type substrate. A heavily-doped second-type buried layer is positioned on the first intrinsic layer. A second intrinsic layer is positioned on the heavily-doped second-type buried layer. A plurality of heavily-doped first-type fingers are shallowly embedded in the second intrinsic layer. A first type has a doped state that is opposite to a second type.Type: GrantFiled: December 22, 2004Date of Patent: November 28, 2006Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Joo Yul Ko, Shin Jae Kang, Kyoung Soo Kwon
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Patent number: 7125732Abstract: In a semiconductor light emitting device such as a semiconductor laser using nitride III-V compound semiconductors and having a structure interposing an active layer between an n-side cladding layer and a p-side cladding layer, the p-side cladding layer is made of an undoped or n-type first layer 9 and a p-type second layer 12 that are deposited sequentially from nearer to remoter from the active layer. The first layer 9 is not thinner than 50 nm. The p-type second layer 12 includes a p-type third layer having a larger band gap inserted therein as an electron blocking layer. Thus the semiconductor light emitting device is reduced in operation voltage while keeping a thickness of the p-side cladding layer necessary for ensuring favorable optical properties.Type: GrantFiled: August 30, 2004Date of Patent: October 24, 2006Assignee: Sony CorporationInventors: Motonobu Takeya, Takeharu Asano, Masao Ikeda
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Patent number: 7122446Abstract: Part of light emitted downward by an active layer is reflected by an electrode functioning as a reflective layer, and travels upward to radiate outside. Since the electrode is made of a metal, it reflects almost all light regardless of its incident angle, and light can be efficiently extracted.Type: GrantFiled: July 20, 2004Date of Patent: October 17, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Nitta, Haruhiko Okazaki, Yukio Watanabe, Chisato Furukawa
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Patent number: 7118942Abstract: A method of mass-producing a solid state device comprises providing an atomically smooth, solid state material layer no more than 40 Angstroms thick. This layer is uniformly and defect-freely bonded onto a substrate to provide an acceptable device yield.Type: GrantFiled: July 29, 2003Date of Patent: October 10, 2006Inventor: Chou H. Li
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Patent number: 7115427Abstract: The present red light-emitting device includes a substrate with a first window layer, a silicon dioxide layer positioned on the first window layer, a plurality of silicon nanocrystals distributed in the silicon dioxide layer, a second window layer, a transparent conductive layer and a first ohmic contact electrode positioned in sequence on the silicon dioxide layer, and a second ohmic contact electrode positioned on the bottom surface of the substrate. The present method forms a sub-stoichiometric silica (SiOx) layer on a substrate, wherein the numerical ratio (x) of oxygen atoms to silicon atoms is smaller than 2. A thermal treating process is then performed in an oxygen atmosphere to transform the SiOx layer into a silicon dioxide layer with a plurality of silicon nanocrystals distributed therein. The thickness of the silicon dioxide layer is between 1 and 10,000 nanometers, and the diameter of the silicon nanocrystal is between 3 and 5 nanometers.Type: GrantFiled: August 25, 2004Date of Patent: October 3, 2006Assignee: Atomic Energy Council - Institute of Nuclear Energy ResearchInventors: Tsun Neng Yang, Shan Ming Lan
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Patent number: 7109048Abstract: A semiconductor light emitting device and a fabrication method thereof includes: providing a substrate; forming an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer on the substrate; forming a first transparent electrode having holes per a certain region on the p-type semiconductor layer; and forming a first pad on the first transparent electrode.Type: GrantFiled: September 28, 2004Date of Patent: September 19, 2006Assignee: LG Electronics Inc.Inventors: Jun-Seok Ha, Jun-Ho Jang, Jae-Wan Choi, Jung-Hoon Seo
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Patent number: 7098069Abstract: A light emitting device having a high definition, a high aperture ratio and a high reliability is provided. The present invention realizes a high definition and a high aperture ratio for a flat panel display of full colors using luminescent colors of red, green and blue without being dependent upon the film formation method and deposition precision of an organic compound layer by forming the laminated sections 21, 22 by means of intentionally and partially overlapping different organic compound layers of adjacent light emitting elements. Moreover, the protective film 32a containing hydrogen is formed and the drawback in the organic compound layer is terminated with hydrogen, thereby realizing the enhancement of the brightness and the reliability.Type: GrantFiled: January 22, 2003Date of Patent: August 29, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
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Patent number: 7091055Abstract: Disclosed are a white light emitting diode and a method for manufacturing the white light emitting diode. The white light emitting diode comprises a conductive substrate with a light transmitting property having a surface divided into first and second areas; a first emitting unit including a first clad layer, a first active area, and a second clad layer at the first area of the conductive substrate; a second emitting unit including a third clad layer, a second active area emitting light with a wavelength to be combined with light emitted from the first active area into white light, and a fourth clad layer at the second area of the conductive substrate; and first, second and third electrodes, the first electrode connected to the second surface of the conductive substrate, the second electrode connected to the second clad layer, and the third electrode connected to the fourth clad layer.Type: GrantFiled: March 24, 2005Date of Patent: August 15, 2006Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Hun Joo Hahm, In Eung Kim, Jeong Seok Na, Seung Jin Yoo, Young Ho Park, Soo Min Lee
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Patent number: 7083993Abstract: Methods of making multi-layer light-emitting devices and related components and systems are disclosed. The light-emitting devices can include a layer of reflective material bonded with a layer of p-doped material. The reflective material can be capable of reflecting at least about 50% of light generated by a light-generating region that impinges on the layer of reflective material.Type: GrantFiled: November 26, 2003Date of Patent: August 1, 2006Assignee: Luminus Devices, Inc.Inventors: Alexei A. Erchak, John W Graff, Michael Gregory Brown, Scott W. Duncan
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Patent number: 7057209Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.Type: GrantFiled: October 12, 2004Date of Patent: June 6, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshiji Hamatani, Toru Takayama
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Patent number: 7054516Abstract: An integrated optical device includes a substrate, at least a face of the substrate providing a first cladding layer, the first cladding layer including a mesa formation; a waveguide core formed on the first cladding layer so that the waveguide core substantially covers the mesa formation; and a second cladding layer formed over the waveguide core and the first cladding layer.Type: GrantFiled: December 15, 2003Date of Patent: May 30, 2006Inventors: Russell Childs, Mark Volanthen, Johannes Bos, Daniel Ortega Gonzalez, Graeme Gordon, Antoine Pujol
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Patent number: 7049630Abstract: An OLED device having pillars with a cross section that is wider on the top. The pillars structure a conductive layer during deposition into distinct portions located between the pillars and on the top of the pillars. In one embodiment, the grooves between the pillars extend outside the electrode region to prevent shorting of adjacent electrodes.Type: GrantFiled: November 24, 2003Date of Patent: May 23, 2006Assignee: Osram Opto Semiconductors (Malaysia) Sdn. BhdInventors: Hooi Bin Lim, Hagen Klausmann, Bernd Fritz
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Patent number: 7042611Abstract: A modulator for and a method of modulating an incident beam of light including means for supporting a plurality of active elements and a plurality of bias elements, each active and bias element including a light reflective planar surface with the light reflective planar surfaces of the plurality of active elements lying in a first parallel plane and the plurality of bias elements lying in a second parallel plane wherein the plurality of active and bias elements are parallel to each other and further wherein the plurality of bias elements are mechanically or electrically deflected with respect to the plurality of active elements. Each of the plurality of bias elements is deflected an odd multiple of the wavelength of an incident light wave divided by four and the plurality of light reflective planar surfaces of the plurality of active elements move between the first parallel plane to the second parallel plane.Type: GrantFiled: March 3, 2003Date of Patent: May 9, 2006Assignee: Silicon Light Machines CorporationInventors: Christopher Gudeman, Omar Leung, James Hunter, David Amm
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Patent number: 7034331Abstract: The tunnel junction structure comprises a p-type tunnel junction layer of a first semiconductor material, an n-type tunnel junction layer of a second semiconductor material and a tunnel junction between the tunnel junction layers. At least one of the semiconductor materials includes gallium (Ga), arsenic (As) and either nitrogen (N) or antimony (Sb). The probability of tunneling is significantly increased, and the voltage drop across the tunnel junction is consequently decreased, by forming the tunnel junction structure of materials having a reduced difference between the valence band energy of the material of the p-type tunnel junction layer and the conduction band energy of the n-type tunnel junction layer.Type: GrantFiled: June 4, 2004Date of Patent: April 25, 2006Assignee: Agilent Technologies, Inc.Inventors: Ying-Lan Chang, Ashish Tandon, Michael H. Leary, Michael R. T. Tan
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Patent number: 7026182Abstract: To provide a semiconductor device, such as semiconductor laser, having no need of complicated process, ensuring a high yield and mass-productivity necessary for cost reduction, and exhibiting excellent initial characteristics and reliability, nitride semiconductor layers containing a plurality of group III elements are formed on a base body surface having recess (opening) such that the nitride semiconductor layer varies in at least one of composition ratio of the group III elements, band gap energy, refractive index, electrical conductivity and specific resistance within the layer in response to the recess of the base body. In addition, by heating the structure in an atmosphere containing hydrogen and using a layer containing Al as an etching stop layer, controllability and production yield can be improved without influences from fluctuation in etching depth, or the like. Further, etching and re-growth can be conducted consecutively to provide an inexpensive process.Type: GrantFiled: April 5, 2004Date of Patent: April 11, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Ishikawa, Shin-Ya Nunoue
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Patent number: 7023022Abstract: A light-emitting package includes a substantially transparent substrate having a first surface and a second surface including a lens. The package also includes a light-emitting diode (LED) adapted to emit light having a predetermined wavelength, the LED being secured over the first surface of the substantially transparent substrate. The second surface of the substrate defines a principal light emitting surface of the package. The lens at the second surface has a grating pattern that matches the predetermined wavelength of the light emitted from the LED for controlling the emission geometry of the light emitted by the package. The grating pattern has a radial configuration including a series of circles that are concentric.Type: GrantFiled: November 14, 2001Date of Patent: April 4, 2006Assignee: Emcore CorporationInventors: Ivan Eliashevich, Robert F. Karlicek, Hari Venugopalan
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Patent number: 7019323Abstract: A semiconductor light emitting device is formed by adhering a semiconductor layered portion having a light emitting layer forming portion to a conductive substrate via a metal layer. The metal layer has at least a first metal layer for ohmic contact with the semiconductor layered portion, a second metal layer made of Ag, and a third metal layer made of a metal which allows adhesion to the conductive substrate at a low temperature. As a result, the rate of reflection of light from the metal layer increases due to the presence of Ag in the metal layer. Further, the metal in the metal layer is prohibited from diffusing into the semiconductor layer, so that the semiconductor layer does not absorb light. And therefore the brightness of the semiconductor light emitting device can further be increased.Type: GrantFiled: October 23, 2003Date of Patent: March 28, 2006Assignee: Rohm Co., Ltd.Inventors: Yukio Shakuda, Yukio Matsumoto, Nobuaki Oguro
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Patent number: 7015073Abstract: Numerous embodiments of a heat spreader, comprised of a plurality of downset legs, which provides a simple and lower cost method of forming a heat spreader as compared to conventional methods are disclosed, as well as novel apparatus and methods for attaching the heat spreader to a substrate and a secondary device to the heat spreader, are disclosed.Type: GrantFiled: March 22, 2004Date of Patent: March 21, 2006Assignee: Intel CorporationInventors: Sabina J. Houle, Nick Labanok
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Patent number: 7012284Abstract: Disclosed herein is a nitride semiconductor light emitting device. The nitride semiconductor light emitting device comprises an n-type nitride semiconductor layer on a substrate, an active layer formed on the n-type nitride semiconductor layer so that a portion of the n-type nitride semiconductor layer is exposed, a p-type nitride semiconductor layer formed on the active layer, a high-concentration dopant area on the p-type nitride semiconductor layer, a counter doping area on the high-concentration dopant areas, an n-side electrode formed on an exposed portion of the n-type nitride semiconductor layer, and a p-side electrode formed on the counter doping area. A satisfactory ohmic contact for the p-side electrode is provided by an ion implantation process and heat treatment.Type: GrantFiled: May 4, 2004Date of Patent: March 14, 2006Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seok Beom Choi, Bang Won Oh, Hee Seok Choi
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Patent number: 7008806Abstract: Disclosed is a method of determining causes of intrinsic oscillations in a double-barrier quantum-well intrinsic oscillator comprising developing an emitter quantum-well (EQW) from a double-barrier quantum-well system (DBQWS); coupling the EQW to a main quantum-well (MQW), wherein the MQW is defined by double-barrier heterostructures of a resonant tunneling diode; using energy subband coupling to induce quantum-based fluctuations in the EQW; creating intrinsic oscillations in electron density and electron current in the DBQWS; forming a distinct subband structure based on the intrinsic oscillations; and identifying a THz-frequency signal source based on the quantum-based fluctuations, wherein the intrinsic oscillations comprise maximum subband coherence, partial subband coherence, and minimum subband coherence, wherein the energy subband is a quantum mechanical energy subband, wherein the intrinsic oscillations occur proximate to a bias voltage point in the range of 0.224 V and 0.Type: GrantFiled: August 24, 2004Date of Patent: March 7, 2006Assignee: The United States of America as represented by the Secretary of the ArmyInventors: Peiji Zhao, Dwight Woolard
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Patent number: 6982183Abstract: Pixel image sensors with lateral photodiode elements and vertical overflow drain systems. According to at least one embodiment of the present invention, an image sensor pixel includes a lateral photodiode element and a vertical overflow drain system for draining excessive charges accumulated in the charge collecting region of the lateral photodiode element and for resetting the charge collecting region of the lateral photodiode element.Type: GrantFiled: May 12, 2003Date of Patent: January 3, 2006Assignee: Galaxcore Inc.Inventor: Lixin Zhao
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Patent number: 6972207Abstract: An annular oblique light illumination apparatus manufactured by using a flexible wiring substrate in which a plurality of arcuate zonal wiring patterns each in the form of a developed frustconical shape as a light emitting device arranging surface when cut along the pattern are serpiginously formed continuously to a base film of a predetermined shape, by setting and soldering light emitting devices to the arcuate zonal wiring patterns, cutting out the arcuate zonal wiring patterns to form light emitting device arrays and fixing the same to the arranging surface, whereby the wiring substrate can be supported reliably without using any special jig conforming the arcuate shape of the wiring patterns for mounting the light emitting devices, thereby improving the soldering operation efficiency, saving the troubles of exchange and handling of jigs and further, avoiding slackening or distortion of the wiring substrate even in a case of applying soldering by a flow soldering apparatus.Type: GrantFiled: March 23, 2004Date of Patent: December 6, 2005Assignee: Moritex CorporationInventors: Makoto Toyota, Shin Toyoda, Hitoshi Yoshida
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Patent number: 6969625Abstract: A method and structure for a microelectronic device comprises a first film over a substrate, a first polish resistant layer over the first film, a second film over the first polish resistant layer, a second polish resistant layer over the second film, wherein the first and second polish resistant layers comprise diamond-like carbon. The first film comprises an electrically resistive material, while the second film comprises low resistance conductive material. The first film is an electrical resistor embodied as a magnetic read sensor. The electrically resistive material is sensitive to magnetic fields. The device further comprises a generally vertical junction between the first and second films and a dielectric film abutted to the electrically resistive material.Type: GrantFiled: September 24, 2004Date of Patent: November 29, 2005Assignee: International Business Machines CorporationInventors: Marie-Claire Cyrille, Frederick H. Dill, Cherngye Hwang, Jui-Lung Li
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Patent number: 6967117Abstract: The present invention discloses a method for producing a high brightness LED (light emitting diode). The method primarily comprises steps of: a) providing a temporary substrate for epitaxy; b) forming LED epitaxial layers on said temporary substrate, wherein said LED epitaxial layers with pn junction; c) providing a permanent substrate; d) forming a layered structure between said permanent substrate and said LED epitaxial layers, wherein said layered structure has properties of reflection, adhesion, diffusion barrier and buffer; and e) forming a first electrode and a second electrode on proper position to supply enough energy for said LED epitaxial layers. The LED manufactured in accordance with the present invention can exhibit high brightness and excellent mechanical strength during manufacturing.Type: GrantFiled: July 14, 2004Date of Patent: November 22, 2005Assignee: National Chung-Hsing UniversityInventors: Ray-Hua Horng, Tung-Hsing Wu, Shao-Hua Huang
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Patent number: 6962828Abstract: A novel light-emitting device includes a saphire substrate with a light-emitting layer comprising InXGa1?XN, where the critical value of the indium mole fraction X is determined by a newly derived relationship between the indium mole fraction X and the wavelength ? of emitted light.Type: GrantFiled: November 15, 2000Date of Patent: November 8, 2005Assignees: Toyoda Gosei Co., Ltd.Inventors: Norikatsu Koide, Masayoshi Koike, Shiro Yamasaki, Isamu Akasaki, Hiroshi Amano
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Patent number: 6958194Abstract: An imaging cell reduces recombination losses and increases sensitivity by forming a low resistance lateral path with a silicon germanium layer of a conductivity type that is sandwiched between silicon layers of the same conductivity type. The silicon germanium layer also provides a quantum well from which photo-generated electrons find it difficult to escape, thereby providing a barrier that reduces cross-talk.Type: GrantFiled: October 21, 2003Date of Patent: October 25, 2005Assignee: Foveon, Inc.Inventors: Peter J. Hopper, Philipp Lindorfer, Michael Mian, Robert Drury