Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
  • Patent number: 8895957
    Abstract: The present invention relates to a light emitting device. The light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, a light emitting device comprises a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: November 25, 2014
    Assignee: Seoul Viosys Co., Ltd
    Inventors: Jong Lam Lee, Jae Ho Lee, Yeo Jin Yoon, Eu Jin Hwang, Dae Won Kim
  • Patent number: 8889436
    Abstract: A method for manufacturing optoelectronic devices comprising the steps of: providing a common growth substrate; forming a light-emitting epitaxy structure on the common growth substrate; forming a stripping layer on the light-emitting epitaxy structure; forming a solar cell epitaxy structure on the stripping layer; forming an adhesive layer on the solar cell epitaxy structure; proving a solar cell permanent substrate on the adhesive layer; and removing the stripping layer to form a light-emitting device and a solar cell device separately.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: November 18, 2014
    Assignee: Epistar Corporation
    Inventors: Wu-Tsung Lo, Yu-Chih Yang, Rong-Ren Lee
  • Patent number: 8883526
    Abstract: An image pickup device, wherein a part of the carriers overflowing from the photoelectric conversion unit for a period of photoelectrically generating and accumulating the carriers may be flowed into the floating diffusion region, and a pixel signal generating unit generating a pixel signal according to the carriers stored in the photoelectric conversion unit and the carriers having overflowed into the floating diffusion region, is provided. The expansion of a dynamic range and the improvement of an image quality can be provided by controlling a ratio of the carriers flowing into the floating diffusion region to the carriers overflowing from such a photoelectric conversion unit at high accuracy.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: November 11, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Toru Koizumi, Isamu Ueno, Katsuhito Sakurai
  • Publication number: 20140307997
    Abstract: Photonic passivation layers, III-V semiconductor die with offcut edges, and NiGe contact metallization for silicon-based photonic integrated circuits (PICs). In embodiments, a non-sacrificial passivation layer is formed on a silicon photonic element, such as a waveguide for protection of the waveguide surfaces. In embodiments, a III-V semiconductor film is transferred from a III-V growth substrate that is singulated along streets that are misaligned from cleave planes to avoid crystallographic etch artifacts in a layer transfer process. In embodiments, a NiGe contact metallization is employed for both p-type and n-type contacts on a device formed in the transferred III-V semiconductor layer to provide low specific contact resistance and compatibility with MOS processes.
    Type: Application
    Filed: December 20, 2011
    Publication date: October 16, 2014
    Inventors: Hanan Bar, John Heck, Avi Feshali, Ran Feldesh
  • Patent number: 8852983
    Abstract: A method for fabrication of capacitive environment sensors is provided in which the sensor elements are integrated in a CMOS structure with electronics through the use of complementary metal oxide semiconductor (CMOS) fabrication methods. Also provided are environment sensors fabricated, for example, by the method, and a measurement system using the environment sensors fabricated by the method. The described method includes etching away one of the metal layers in a CMOS chip to create a cavity. This cavity is then filled with an environment-sensitive dielectric material to form a sensing capacitor between plates formed by the metal adhesion layers or an array of contacts from other metal layers of the CMOS structure. This approach provides improved sensing capabilities in a system that is easily manufactured.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Carnegie Mellon University
    Inventors: Gary Keith Fedder, Nathan Scott Lazarus
  • Patent number: 8847243
    Abstract: A semiconductor package includes a transmissive support plate and includes at least one elongate hole. An integrated circuit semiconductor device is mounted on a rear face of the support plate. The semiconductor device includes first and second optical elements oriented towards the rear face of the support plate, where the first and second optical elements are placed on either side of the elongate hole. An encapsulation material made of an opaque material encapsulates the semiconductor device and fills the elongate hole so as to form an optical insulation partition between the first and second optical elements. A cavity is left, however, between each optical element and a rear face of the support plate.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: September 30, 2014
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Emmanuelle Vigier-Blanc
  • Publication number: 20140287542
    Abstract: An IR sensing transistor according to an exemplary embodiment of the present invention includes: a light blocking layer formed on a substrate; a gate insulating layer formed on the light blocking layer; a semiconductor formed on the gate insulating layer; a pair of ohmic contact members formed on the semiconductor; a source electrode and a drain electrode formed on respective ones of the ohmic contact members; a passivation layer formed on the source electrode and the drain electrode; and a gate electrode formed on the passivation layer, wherein substantially all of the gate insulating layer lies on the light blocking layer.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Inventors: Suk Won JUNG, Byeong Hoon CHO, Sung Hoon YANG, Woong Kwon KIM, Sang Youn HAN, Dae Cheol KIM, Ki-Hun JEONG, Kyung-Sook JEON, Seung Mi SEO, Jung-Suk BANG, Kun-Wook Han
  • Publication number: 20140284498
    Abstract: Scintillators of various constructions and methods of making and using the same are provided. In some embodiments, a scintillator comprises at least one radiation absorption region and at least one spatially discrete radiative exciton recombination region.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Inventor: Richard T. WILLIAMS
  • Patent number: 8841145
    Abstract: System for wafer-level phosphor deposition. A method for phosphor deposition on a semiconductor wafer that has a plurality of LED dies includes the operations of covering the semiconductor wafer with a selected thickness of photo resist material, removing portions of the photo resist material to expose portions of the semiconductor wafer so that electrical contacts associated with the plurality of LED dies remain unexposed, and depositing phosphor on the exposed portions of the semiconductor wafer.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: September 23, 2014
    Assignee: Bridgelux, Inc.
    Inventor: Tao Xu
  • Patent number: 8835196
    Abstract: The purpose of the present invention is to favorably modify a transparent conductive film and provide a transparent conductive film with few grain boundaries. In the manufacturing method for the transparent conductive film of the present invention, a transparent conductive film 3 is formed on a substrate 2 inside a vacuum chamber 10, after which radiant heat is imparted from a surface modifying device 4 arranged near the substrate 2 to modify the transparent conductive film 3, and the substrate 2 having the modified transparent conductive film 3 is removed from the vacuum chamber 10.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: September 16, 2014
    Assignee: SANYO Electric Co., Ltd.
    Inventor: Masaki Shima
  • Patent number: 8835197
    Abstract: The present invention provides an active matrix organic light-emitting diode and a manufacturing method thereof. The active matrix organic light-emitting diode includes an organic light-emitting diode body and a thin-film transistor electrically connected to the organic light-emitting diode body. The thin-film transistor is formed on a substrate and includes semiconductor layer formed on the substrate, a gate insulation layer formed on the semiconductor layer, a gate terminal formed on the gate insulation layer, a protection layer formed on the gate terminal, and a source terminal and a drain terminal formed on the protection layer. The light-emitting diode body includes an anode formed on the protection layer and electrically connected to the thin-film transistor, an organic light emission layer formed on the anode, and a cathode formed on the organic light emission layer. The organic light-emitting diode body is arranged to be positioned above the thin-film transistor in an alternate manner.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: September 16, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Yuanchun Wu
  • Publication number: 20140252379
    Abstract: A photoconductive antenna that generates and detects a terahertz wave has a substrate, a buffer layer, a first semiconductor layer, a second semiconductor layer, and an electrode in this order. The substrate is made of Si, the buffer layer contains Ge, and the first and second semiconductor layers both contain Ga and As. The element ratio Ga/As of the second semiconductor layer is smaller than the element ratio Ga/As of the first semiconductor layer.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 11, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Takahiro Sato
  • Publication number: 20140247403
    Abstract: A touch display apparatus includes a base substrate, a light blocking semiconductor pattern disposed on the base substrate and configured to block a visible light and transmit an infrared light, a sensing element disposed on the light blocking semiconductor pattern and configured to detect a touch position using an incident infrared light, a driving element configured to drive the sensing element, a signal line electrically connected with the sensing element or the driving element and extending in a direction, and a wiring connecting part disposed under the signal line and including a same material as the light blocking semiconductor pattern.
    Type: Application
    Filed: October 29, 2013
    Publication date: September 4, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Sung-Jin MUN, Dae-Cheol KIM, Woong-Kwon KIM, Sung-Ryul KIM, Ki-Hun JEONG, Byeong-Hoon CHO, Jung-Suk Bang, Kun-Wook HAN
  • Publication number: 20140225090
    Abstract: An Organic Light Emitting Diode (OLED) display apparatus with a solar cell is provided. The OLED display apparatus includes an OLED display unit which includes a pixel region formed of an OLED and a pixel boundary region partitioning the pixel region, and provided with a touch panel through which light emitted from the OLED is transmitted and at least one glass; and a solar cell for converting incident light into electricity, which is formed adjacent to the OLED display unit.
    Type: Application
    Filed: February 10, 2014
    Publication date: August 14, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yongman LEE, Dongyoul PARK, Soonkyoung CHOI, Jaemyung BAEK
  • Patent number: 8802457
    Abstract: A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O2). The plasma treatment is performed without vertical bias in a direction perpendicular to the back surface.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 12, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yu Lai, Cheng-Ta Wu, Kai-Chun Hsu, Yeur-Luen Tu, Ching-Chun Wang, Chia-Shiung Tsai
  • Patent number: 8803209
    Abstract: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region; and a plurality of fourth semiconductor regions of the second conductivity type formed on the second semiconductor region, each of the plurality of fourth semiconductor regions being surrounded by the third semiconductor region, including a second conductivity type impurity having a concentration higher than a concentration of the second semiconductor region, and electrically connected to a second external electrode.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: August 12, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Noriyuki Nakamura
  • Patent number: 8803157
    Abstract: A display device is provided, which includes a transparent substrate, an active device array, a solar cell structure and an electrophoretic display film. The transparent substrate has an upper surface and a lower surface opposite to each other. The active device array has a plurality of pixel structures, in which the pixel structures are disposed on the upper surface of the transparent substrate. The solar cell structure is directly disposed on the lower surface of the transparent substrate. The electrophoretic display film is disposed over the transparent substrate and includes a transparent protection film, an electrode layer and a plurality of display media, in which the electrode layer is disposed between the transparent protection film and the display media and the display media are located between the electrode layer and the active device array.
    Type: Grant
    Filed: December 23, 2012
    Date of Patent: August 12, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Cheng-Hang Hsu, Ted-Hong Shinn, Chuang-Chuang Tsai
  • Publication number: 20140217284
    Abstract: Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector.
    Type: Application
    Filed: July 2, 2012
    Publication date: August 7, 2014
    Applicants: NANOHOLDINGS, LLC, University of Florida Research Foundation, Inc.
    Inventors: Franky So, Do Young Kim, Jae Woong Lee, Bhabendra K. Pradhan
  • Publication number: 20140212999
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
    Type: Application
    Filed: March 27, 2014
    Publication date: July 31, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hideki TANAKA, Ichio YUDASAKA, Masahiro FURUSAWA, Tsutomu MIYAMOTO, Tatsuya SHIMODA
  • Patent number: 8790936
    Abstract: A wafer-level optical deflector assembly is formed on a front surface side of a wafer. Then, the front surface side of the wafer is etched by using elements of the wafer-level optical deflector assembly, to form a front-side dicing street. Then, a transparent substrate with an inside cavity is adhered to the front surface side of the wafer. Then, a second etching mask is formed on a back surface side of the wafer. Then, the back surface side of the wafer is etched to create a back-side dicing street. Then, an adhesive sheet with a ring-shaped rim is adhered to the back surface side of the wafer. Then, the transparent substrate is removed. Finally, the ring-shaped rim is expanded to widen the front-side dicing street and the back-side dicing street to pick up optical deflectors one by one from the wafer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: July 29, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Yoshiaki Yasuda
  • Patent number: 8790939
    Abstract: A method for producing a plurality of radiation-emitting components includes A) providing a carrier layer having a plurality of mounting regions separated from one another by separating regions; B) applying an interlayer to the separating regions; C) applying a respective radiation-emitting device to each of the plurality of mounting regions; D) applying a continuous potting layer to the radiation-emitting device and the separating regions; E) severing the potting layer and partially severing the interlayer in the separating regions of the carrier layer in a first separating step; and F) partially severing the interlayer and severing the carrier layer in a second separating step, wherein the interlayer is completely severed by the first and the second separating step.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: July 29, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Stephan Preuss, Harald Jaeger
  • Patent number: 8778778
    Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumasa Tanida, Masahiro Sekiguchi, Masayuki Dohi, Tsuyoshi Matsumura, Hideo Numata, Mari Otsuka, Naoko Yamaguchi, Takashi Shirono, Satoshi Hongo
  • Patent number: 8772919
    Abstract: The invention provides a chip package and a fabrication method thereof. In one embodiment, the chip package includes: a substrate having a semiconductor device and a conductive pad thereon; an insulator ring filling a trench formed in the substrate, wherein the insulator ring surrounds an intermediate layer below the conductive pad; and a conductive layer disposed below a backside of the substrate and electrically connected to the conductive pad.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: July 8, 2014
    Inventors: Wen-Cheng Chien, Wen-Ken Huang, Chien-Hung Liu, Joey Lai
  • Patent number: 8772060
    Abstract: The present invention provides a method for manufacturing a group III nitride semiconductor light emitting element, with which warping can be suppressed upon the formation of respective layers on the substrate, a semiconductor layer including a light emitting layer of excellent crystallinity can be formed, and excellent light emission characteristics can be obtained; such a group III nitride semiconductor light emitting element; and a lamp. Specifically disclosed is a method for manufacturing a group III nitride semiconductor light emitting element, in which an intermediate layer, an underlayer, an n-type contact layer, an n-type cladding layer, a light emitting layer, a p-type cladding layer, and a p-type contact layer are laminated in sequence on a principal plane of a substrate, wherein a substrate having a diameter of 4 inches (100 mm) or larger, with having an amount of warping H within a range from 0.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: July 8, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiromitsu Sakai, Takeshi Harada
  • Publication number: 20140184062
    Abstract: Provided is a light emitting diode (LED) chip. The LED chip includes a substrate and a mesa structure formed from a heterostructure grown on the substrate. The mesa structure includes an LED mesa portion and a photo diode (PD) mesa portion. A channel separates the LED mesa portion from the PD mesa portion.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: GE LIGHTING SOLUTIONS, LLC
    Inventor: Boris KOLODIN
  • Patent number: 8766285
    Abstract: A display includes: a light-emitting element formed by laminating a first electrode layer, an organic layer including a light-emitting layer and a second electrode layer in order on a base; and an auxiliary wiring layer being arranged so as to surround the organic layer and being electrically connected to the second electrode layer, in which the auxiliary wiring layer includes a two-layer configuration including a first conductive layer and a second conductive layer, the first conductive layer has lower contact resistance to the second electrode layer than that of the second conductive layer, the two-layer configuration in the auxiliary wiring layer is formed so that an end surface of the second conductive layer is recessed inward from an end surface of the first conductive layer, thereby a part of a top surface of the first conductive layer is in contact with the second electrode layer.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Hiroshi Sagawa
  • Patent number: 8759122
    Abstract: A method for making a light emitting chip package, comprises: providing a substrate; forming a plurality of recesses on the bottom surface of the substrate; forming an etch stop layer on the bottom surface; forming a step hole on the top surface; forming an insulation layer on the top surface; defining a plurality of first through holes in the insulation layer and a plurality of second through holes in the etch stop layer, the number of the first through holes being different from the number of the second through holes; filling the first through holes and the second through holes with metal to respectively form first electrical conductor portions and second electrical conductor portions; forming a patterned electric conductive layer on the insulation layer; arranging a light emitting chip on the electric conductive layer; and encapsulating the light emitting chip with an encapsulation.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: June 24, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Patent number: 8759120
    Abstract: A silicon solar cell includes a first silicon layer with an emitter layer which has a thickness in a range of 50 nanometers to few hundreds nanometers. The emitter layer has at least one region which is porosified by chemical or electrochemical etching, wherein at least one part of the porosified region is embodied as metal silicide layer. A second silicon layer is disposed underneath the emitter layer, with the metal silicide extending from a top side of the emitter layer in a direction to the second silicon layer. At least one metal layer is applied on the metal silicide layer.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: June 24, 2014
    Assignee: Atotech Deutschland GmbH
    Inventors: Mike Becker, Dietmar Lütke-Notarp
  • Patent number: 8754424
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: June 17, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Publication number: 20140163350
    Abstract: A silicon nano-crystal biosensor includes a flexible substrate transformed depending on a shape of a body organ, a light emitting device disposed on the flexible substrate and emitting light, and a light detector opposite to the light emitting device on the flexible substrate. The light detector absorbs the emitted light. A length of the flexible substrate is substantially equal to or greater than a radius of curvature of the body organ.
    Type: Application
    Filed: July 12, 2013
    Publication date: June 12, 2014
    Inventors: Chul Huh, Sang Hyeob Kim, Byoung-Jun Park, Eun Hye Jang, Myung-Ae Chung
  • Publication number: 20140145189
    Abstract: Technologies generally described herein relate to multilayer circuit boards with optical vias for data transmission between the layers. One or more regions may be created on a multilayer circuit board for optical vias. A transparent conducting oxide (TCO) layer can be deposited on a top and/or bottom layer of the circuit board. P-N junctions can be created over the TCO layer about the one or more regions to form optical vias as photo-emitting and/or photo-detecting components. The photo-emitting and/or photo-detecting components may be coupled to electronic components on the multilayer circuit board.
    Type: Application
    Filed: January 30, 2014
    Publication date: May 29, 2014
    Applicant: Empire Technology Development, LLC
    Inventor: Michael Ray Sievers
  • Patent number: 8735187
    Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line and a data line on the substrate and crossing each other to define a pixel region, a thin film transistor connected to the gate line and the data line, a first passivation layer on the thin film transistor and having a first unevenness structure at its top surface, an auxiliary unevenness layer on the first passivation layer and having a first roughness structure at its top surface, and a reflector on the auxiliary unevenness layer, the reflector having a second unevenness structure due to the first unevenness structure of the first passivation layer and a second roughness structure due to the first roughness structure of the auxiliary unevenness layer, the second roughness structure having smaller patterns than the second unevenness structure.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: May 27, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Jae-Kyun Lee, Jae-Young Oh
  • Publication number: 20140141546
    Abstract: A method of fabricating an optoelectronic integrated circuit substrate includes defining a photonic device region on a first substrate, the photonic device region having a photonic device formed thereon, forming a trench in the photonic device region on a top surface of the first substrate, the trench having a first depth, filling the trench with a dielectric, bonding a second substrate on the first substrate to cover the trench, and thinning the second substrate to a first thickness.
    Type: Application
    Filed: April 23, 2013
    Publication date: May 22, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Seong-ho CHO
  • Patent number: 8710513
    Abstract: A light-emitting device package and a method of manufacturing the light-emitting device package. The light-emitting device package includes a wiring substrate; a Zener diode mounted on a first region of the wiring substrate; a light-emitting device chip mounted on the first region and a second region of the wiring substrate; and a molding member for fixing at least a portion of the wiring substrate, wherein the Zener diode is embedded in the molding member.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: April 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol-jun Yoo, Young-hee Song
  • Patent number: 8709844
    Abstract: A light emitting diode (LED) package and a method of manufacturing a LED package is provided. The LED package includes a case having first and second lead frames disposed through the case; an LED chip disposed on the case, the LED chip having first and second electrodes directly connected to the first and second lead frames through a eutectic bond, respectively; and a lens disposed over the case covering the LED chip.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: April 29, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Sin-Ho Kang, Tae-Hun Kim, Seung-Ho Jang, Kyoung-Bo Han, Jae-yong Choi
  • Patent number: 8704246
    Abstract: The present invention relates to a light emitting device. The light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of 20 to 80° from a horizontal plane. Further, a light emitting device comprises a substrate formed with a plurality of light emitting cells each including an N-type semiconductor layer and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein the N-type semiconductor layer of one light emitting cell and the P-type semiconductor layer of another adjacent light emitting cell are connected to each other, and a side surface including at least the P-type semiconductor layer of the light emitting cell has a slope of 20 to 80° from a horizontal plane.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: April 22, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Jong Lam Lee, Jae Ho Lee, Yeo Jin Yoon, Eu Jin Hwang, Dae Won Kim
  • Patent number: 8698167
    Abstract: In a display apparatus, a light sensor of a display includes a light sensing layer, a source electrode, a drain electrode, an insulating layer, and a gate electrode to sense light from an external source. The light sensing layer is disposed on the substrate to sense light, and the source and drain electrodes are disposed on the light sensing layer and are covered by the insulating layer. The gate electrode is disposed on the insulating layer. An edge of the gate electrode is disposed on the light sensing layer at least in an area where the light sensing layer is overlapped with the source and drain electrodes.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: April 15, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Woongkwon Kim, Daecheol Kim, Ki-Hun Jeong, SungHoon Yang, Yunjong Yeo, Sang Youn Han, Sungryul Kim, Suk Won Jung, Byeonghoon Cho, HeeJoon Kim, Hong-Kee Chin, Kyung-Sook Jeon, Seungmi Seo, Kyung-ho Park, Jung suk Bang, Kun-Wook Han, Mi-Seon Seo
  • Patent number: 8692276
    Abstract: A silicon-on-insulator wafer is provided. The silicon-on-insulator wafer includes a silicon substrate having optical vias formed therein. In addition, an optically transparent oxide layer is disposed on the silicon substrate and the optically transparent oxide layer is in contact with the optical vias. Then, a complementary metal-oxide-semiconductor layer is formed over the optically transparent oxide layer.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: April 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Fuad E. Doany, Christopher V. Jahnes, Clint L. Schow, Mehmet Soyuer, Alexander V. Rylyakov
  • Publication number: 20140091286
    Abstract: The invention provides an OLED, a touch display device and method for fabricating the same. The OLED comprises: a substrate; a pixel electrode functioning as a first conducting electrode on the substrate; a first signal electrode and a second signal electrode disposed on the same layer as the pixel electrode; an insulating layer overlaying the first signal electrode and the second signal electrode; an EL layer in the same layer as the insulating layer and overlaying the pixel electrode; a second conducting electrode overlaying at least the EL layer; and an encapsulating layer overlaying at least the second conducting electrode.
    Type: Application
    Filed: August 27, 2013
    Publication date: April 3, 2014
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Zhanjie MA
  • Publication number: 20140087495
    Abstract: An organic light emitting element includes an organic light emitting diode formed on a substrate, coupled to a transistor including a gate, a source and a drain and including a first electrode, an organic thin film layer and a second electrode; a photo diode formed on the substrate and having a semiconductor layer including a high-concentration P doping region, a low-concentration P doping region, an intrinsic region and a high-concentration N doping region; and a controller that controls luminance of light emitted from the organic light emitting diode, to a constant level by controlling a voltage applied to the first electrode and the second electrode according to the voltage outputted from the photo diode.
    Type: Application
    Filed: November 25, 2013
    Publication date: March 27, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Yun-gyu LEE, Byoung-deog Choi, Hye-hyang Park, Ki-ju Im
  • Patent number: 8679867
    Abstract: The invention relates to a method for contacting a device with a conductor 6, the device 1 comprising a substrate 2 with at least one cell 3, a contact region 4 and an encapsulation 5, wherein the encapsulation 5 encapsulates at least the contact region 4, the method comprising the steps of arranging the conductor 6 on the encapsulation 5, and interconnecting the conductor 6 with the contact region 4 without removing the encapsulation 5 between the conductor 6 and the contact region 4 beforehand. This invention is advantageous as the encapsulation 5 between the conductor 6 and the contact region 4 does not need to be removed beforehand anymore.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: March 25, 2014
    Assignee: Koninklijke Philips N.V.
    Inventors: Jeroen Henri Antoine Maria Van Buul, Holger Schwab
  • Patent number: 8680542
    Abstract: An organic light-emitting element includes a reflective anode, a first functional layer, an organic light-emitting layer that emits blue light, a second functional layer, a transparent cathode, and a coating layer. An optical thickness of the first functional layer is greater than 0 nm but not greater than 316 nm. A difference in refractive index between the transparent cathode and either a layer adjacent to the transparent cathode within the second functional layer or a layer adjacent to the transparent cathode within the coating layer is from 0.1 to 0.7 inclusive. The transparent cathode has a physical thickness greater than 0 nm but not greater than 70 nm, a refractive index from 2.0 to 2.4 inclusive, and an optical thickness greater than 0 nm but not greater than 168 nm.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Keiko Kurata, Noriyuki Matsusue, Kazuhiro Yoneda
  • Patent number: 8676002
    Abstract: Method of producing a photonic device including at least one light source and at least one photodetector on a structure including a waveguide layer, this method comprising the following steps: a) growing successively on a substrate (10), a photodetection structure (11) and a light source structure (12), the photodetection structure and the light source structure being made of a stack of layers, the light source layers being stacked on top of the photodetector layers and both structures sharing one of these layers.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: March 18, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Laurent Grenouillet, Jean-Marc Fedeli, Liu Liu, Regis Orobtchouk, Philippe Regreny, Gunther Roelkens, Pedro Rojo-Romeo, Dries Van Thourhout
  • Publication number: 20140061677
    Abstract: Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 6, 2014
    Applicant: Infineon Technologies AG
    Inventors: Bernhard Jakoby, Ventsislav Lachiev, Thomas Grille, Peter Irsigler, Sokratis Sgouridis, Ursula Hedenig, Thomas Krotscheck Ostermann
  • Patent number: 8659033
    Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: February 25, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chen-Hua Yu, Wen-Chih Chiou, Ding-Yuan Chen, Chia-Lin Yu, Hung-Ta Lin
  • Publication number: 20140044391
    Abstract: An optical interconnection device includes a light-emitting element, a light-receiving element, and an optical waveguide. Both the light-emitting element and the light-receiving element have a layered structure and are formed on a silicon substrate. At least a portion of the light-emitting element is embedded in an insulator. At least a portion of the light-receiving element is embedded in the insulator. The optical waveguide is formed over the insulator, and is optically coupled to the light-emitting element and the light-receiving element by distributed coupling.
    Type: Application
    Filed: August 6, 2013
    Publication date: February 13, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Norio IIZUKA, Kazuya Ohira, Haruhiko Yoshida, Mizunori Ezaki, Hideto Furuyama, Kentaro Kobayashi, Hiroshi Uemura
  • Publication number: 20140038321
    Abstract: A photoconductive switch is formed of a substrate that has a central portion of SiC or other photoconductive material and an outer portion of cvd-diamond or other suitable material surrounding the central portion. Conducting electrodes are formed on opposed sides of the substrate, with the electrodes extending beyond the central portion and the edges of the electrodes lying over the outer portion. Thus any high electric fields produced at the edges of the electrodes lie outside of and do not affect the central portion, which is the active switching element. Light is transmitted through the outer portion to the central portion to actuate the switch.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 6, 2014
    Inventor: George J. Caporaso
  • Patent number: 8643128
    Abstract: The present invention discloses an MEMS sensor and a method for making the MEMS sensor. The MEMS sensor according to the present invention includes: a substrate including an opening; a suspended structure located above the opening; and an upper structure, a portion of which is at least partially separated from a portion of the suspended structure; wherein the suspended structure and the upper structure are separated from each other by a step including metal etch.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: February 4, 2014
    Assignee: Pixart Imaging Incorporation
    Inventor: Chuan Wei Wang
  • Publication number: 20140029890
    Abstract: An optical system and a method of fabrication are provided. The optical system includes a substrate and at least one hole extending from a second side of the substrate towards a first side of the substrate and configured to receive at least one optical fiber. The substrate includes at least one photodetector at the first side or between the at least one hole and the first side and configured to be in an optical path of an optical signal emitted from the at least one optical fiber or transmitted through the first side to the at least one optical fiber.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 30, 2014
    Applicant: LaXense, Inc.
    Inventors: Xiaochen Sun, Dawei Zheng, Ningning Feng
  • Patent number: RE45217
    Abstract: A semiconductor light emitting device and a fabrication method thereof includes: providing a substrate; forming an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer on the substrate; forming a first transparent electrode having holes per a certain region on the p-type semiconductor layer; and forming a first pad on the first transparent electrode. A method of fabricating a semiconductor light emitting device, and which includes forming a light emitting layer on the first type semiconductor layer; forming a second type semiconductor layer on the light emitting layer; forming a first transparent electrode on the second type semiconductor layer, the first transparent electrode having holes per a certain region to thereby expose the second type semiconductor layer; forming a second transparent electrode on the first transparent electrode; forming a first pad on the second transparent electrode; and forming a second pad over the first type semiconductor layer.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: October 28, 2014
    Assignee: LG Electronics Inc.
    Inventors: Jun-Seok Ha, Jun-Ho Jang, Jae-Wan Choi, Jung-Hoon Seo