Plural Emissive Devices Patents (Class 438/28)
  • Patent number: 8273588
    Abstract: A method for producing a luminous device is specified. A number of light emitting diodes each have a radiation-transmissive carrier and at least two semiconductor bodies spatially separated from one another. Each semiconductor body is provided for generating electromagnetic radiation. The semiconductor bodies can be driven separately from one another and the semiconductor bodies are arranged at the top side of the radiation-transmissive carrier on the radiation-transmissive carrier. A chip assemblage is composed of CMOS chips each of which has at least two connection locations at its top side. At least one of the light emitting diodes is connected to one of the CMOS chips. The light emitting diode is arranged, at the top side of the radiation-transmissive carrier, at the top side of the CMOS chip and each semiconductor body of the light emitting diode is connected to a connection location of the CMOS chip.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: September 25, 2012
    Assignee: OSRAM Opto Semiconductros GmbH
    Inventors: Berthold Hahn, Markus Maute, Siegfried Herrmann
  • Publication number: 20120235146
    Abstract: An organic light-emitting display device comprises: a lower substrate; an upper substrate facing the lower substrate; and a spacer formed in a sealed space between the lower substrate and the upper substrate and dividing the space into two or more sections; wherein air holes are formed in the spacer and allow air to flow between the sections of the space.
    Type: Application
    Filed: August 12, 2011
    Publication date: September 20, 2012
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventors: Kwang-Hae Kim, Sun Park, Chun-Gi You
  • Publication number: 20120235176
    Abstract: An optoelectronic module is provided which comprises a first semiconductor body (2) with a radiation exit side (2a) on which an electrical connection region (21, 22) is arranged. The first semiconductor body (2) is arranged with its side opposite the radiation exit side (2a) on a carrier (1). An insulation material (3) is arranged on the carrier (1) laterally next to the first semiconductor body (2), which material forms a fillet and adjoins the semiconductor body (2) form-fittingly. An insulation layer (4) is arranged at least in places on the first semiconductor body (2) and the insulation material (3), on which layer a planar conductive structure is arranged for planar contacting of the first semiconductor body (2), which conductive structure is electrically conductively connected with the electrical connection region (21, 22). A method of producing such an optoelectronic module is furthermore provided.
    Type: Application
    Filed: August 6, 2010
    Publication date: September 20, 2012
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Weidner, Ralph Wirth, Axel Kaltenbacher, Walter Wegleiter, Bernd Barchmann, Oliver Wutz, Jan Marfeld
  • Publication number: 20120235259
    Abstract: A semiconductor package and a method of fabricating the same. The semiconductor package includes: a substrate having a plurality of semiconductor components disposed thereon; an encapsulant covering the substrate and the semiconductor components; and a metal layer formed on the exposed surfaces of the encapsulant, wherein the encapsulant is formed with a trench for dividing into a plurality of package units on the substrate to allow each of the package units to have at least one of the semiconductor components, and the metal layer is formed in the trench to encompass the encapsulant on the periphery of the semiconductor components, thereby preventing interference of electromagnetic waves between the semiconductor components.
    Type: Application
    Filed: September 23, 2011
    Publication date: September 20, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai
  • Publication number: 20120235167
    Abstract: A wafer-level process for manufacturing solid state lighting (“SSL”) devices using large-diameter preformed metal substrates is disclosed. A light emitting structure is formed on a growth substrate, and a preformed metal substrate is bonded to the light emitting structure opposite the growth substrate. The preformed metal substrate can be bonded to the light emitting structure via a metal-metal bond, such as a copper-copper bond, or with an inter-metallic compound bond.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 20, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Vladimir Odnoblyudov
  • Publication number: 20120235182
    Abstract: A new manufacturing method is described by the present invention for a new LED module 1. The method comprises mounting of at least one LED 3 onto a surface of a substrate 2, and depositing a base layer 5 to cover said substrate 2 surface and the LED 3, wherein the base layer 5 is transparent for visible light and preferably does not comprise phosphor particles. Optionally, a first heat treatment to modify the surface properties of the base layer 5 is comprised. The method further comprises dispensing a matrix material, so that it forms an essentially half-spherical cover covering the LED and optionally nearby portions of the base layer, and optionally, a second heat treatment to harden the half-spherical cover layer. Additionally the present invention discloses an LED module 1, which is manufactured by the claimed method.
    Type: Application
    Filed: June 16, 2010
    Publication date: September 20, 2012
    Applicant: Tridonic Jennersdorf GmbH
    Inventors: Juergen Knaus, Hannes Tauterer, Martin Werkovits
  • Publication number: 20120238045
    Abstract: A flexible layered structure is disclosed having a flexible top conductive layer, a flexible bottom heat sink layer and a flexible dielectric middle layer. The combination has a longitudinal axis and a plurality of defined positions spaced along the longitudinal axis. The defined positions can be used for aligning a circuit and/or for the placement of LED lights. The flexible layered structure can be easily bent to form a LED substrate for shining light in more than one direction while efficiently removing heat arising from the LEDs.
    Type: Application
    Filed: December 15, 2011
    Publication date: September 20, 2012
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY
    Inventor: KURT DOUGLAS ROBERTS
  • Patent number: 8269231
    Abstract: A light emitting diode module providing stable color temperature includes a plurality of light emitting diodes, at least one color sensor and a controller. The plurality of light emitting diodes can emit light with different wavelengths. The light emitting diode module providing stable color temperature includes a reflection region at the path of the light emitting from half peak angle of each light emitting diode. The color sensor detects the light having different wavelengths reflected from the reflection region. The controller adjusts driving currents of the light emitting diodes according to the luminous intensities of the light of the light emitting diodes reflected by the reflection region and detected by the color sensor.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: September 18, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Publication number: 20120228645
    Abstract: A process of manufacturing an LED lamp strip includes the steps of forming a plurality of through holes on an adhesive tape, mounting the adhesive tape to a top side of a scrollable lead frame, bonding a plurality of LED chips to the top side of the scrollable lead frame according to the positions of the through holes, packaging the LED chips respectively, and finally cutting the scrollable lead frame. In light of this, the LED lamp strip can be produced under the circumstances of low production cost and less production time.
    Type: Application
    Filed: May 17, 2011
    Publication date: September 13, 2012
    Inventors: Ming-Te TU, Mu Tsan Liao
  • Patent number: 8263971
    Abstract: The OLED display device includes a first stack and a second stack that are separated from each other between an anode electrode and a cathode electrode, with a charge generation layer sandwiched between the first stack and the second stack, each of the first stack and the second stack having an emission layer. The first stack includes a blue emission layer formed between the anode electrode and the CGL. The second stack includes a fluorescent green emission layer and a phosphorescent red emission layer formed between the cathode electrode and the CGL. The blue emission layer includes one of a fluorescent blue emission layer and a phosphorescent blue emission layer.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: September 11, 2012
    Assignee: LG Display Co., Ltd.
    Inventor: Sung Hoon Pieh
  • Publication number: 20120225510
    Abstract: The present invention relates to a method for encapsulating a substrate, which comprises: (a1) providing a substrate with a plurality of chips mounted on a top side of the substrate; (b1) compressing a dry film photoresist on the top side of the substrate to form a photoresist layer; (c1) exposing the photoresist layer to a light source through a mask to form unexposed photoresist regions and exposed photoresist regions; (d1) developing the photoresist layer to uncover underlying portions of the unexposed photoresist regions; (e1) molding the top side of the substrate with a molding material; (f1) curing the molding material; and (g1) removing the unexposed photoresist regions from the substrate with a photoresist-removing agent.
    Type: Application
    Filed: May 6, 2011
    Publication date: September 6, 2012
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY
    Inventor: Bin-Hong Tsai
  • Publication number: 20120225509
    Abstract: A light-emitting device (LED) package component includes an LED chip having a first active bond pad and a second active bond pad. A carrier chip is bonded onto the LED chip through flip-chip bonding. The carrier chip includes a first active through-substrate via (TSV) and a second active TSV connected to the first and the second active bond pads, respectively. The carrier chip further includes a dummy TSV therein, which is electrically coupled to the first active bond pad, and is configured not to conduct any current when a current flows through the LED chip.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 6, 2012
    Applicant: TSMC Solid State Lighting Ltd.
    Inventor: Chung Yu Wang
  • Publication number: 20120223875
    Abstract: A high-resolution, Active Matrix (AM) programmed monolithic Light Emitting Diode (LED) micro-array is fabricated using flip-chip technology. The fabrication process includes fabrications of an LED micro-array and an AM panel, and combining the resulting LED micro-array and AM panel using the flip-chip technology. The LED micro-array is grown and fabricated on a sapphire substrate and the AM panel can be fabricated using PMOS process, NMOS process, or CMOS process. LED pixels in a same row share a common N-bus line that is connected to the ground of AM panel while p-electrodes of the LED pixels are electrically separated such that each p-electrode is independently connected to an output of drive circuits mounted on the AM panel. The LED micro-array is flip-chip bonded to the AM panel so that the AM panel controls the LED pixels individually and the LED pixels exhibit excellent emission uniformity.
    Type: Application
    Filed: May 8, 2012
    Publication date: September 6, 2012
    Applicant: NANO AND ADVANCED MATERIALS INSTITUTE LIMITED
    Inventors: Kei May LAU, Zhaojun LIU
  • Publication number: 20120225254
    Abstract: To provide a wafer, a method of manufacturing a package, and a piezoelectric oscillator in which warping of a wafer body is reduced to improve the yields. A wafer for lid substrate has a product region in which a number of recess portions for cavities are formed and a non-forming region of the recess portions set in the product region in the form of a straight line extending along a diameter direction of the product region.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 6, 2012
    Inventor: Toshiyuki Wagai
  • Patent number: 8258623
    Abstract: A circuit layout of a circuit substrate having a plurality of device bonding areas is provided. The circuit layout includes first pads, second pads, bridging lines, first outer leads and second outer leads. Each device bounding area is configured with one first pad and one second pad. The bridging lines are respectively disposed between any two adjacent device bounding areas and extended from a side of the first pad inside one device bounding area to a side of the second pad inside another one device bounding area adjacent to the first pad. Each first outer lead and each second outer lead are respectively corresponding to one first pad and one second pad, are respectively correspondingly extended into the device bounding area which the first pad and the second pad are located at, and are beside the first pad and the second pad correspondingly.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: September 4, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Hsiang-Chao Lee, Yi-Nan Chu, Hun-Hsiang Chen
  • Patent number: 8258536
    Abstract: A light emitting module includes a dielectric substrate, a solar cell unit, a metal pattern layer, light emitting units, and a power storage component. The dielectric substrate has a first surface and a second surface opposite to the first surface. The solar cell unit is positioned on the first surface. The metal pattern layer is positioned on the second surface. The light emitting units is positioned on the metal pattern layer. The power storage component includes a power charge port electrically coupled to the solar cell unit, and a power supply port electrically coupled to the metal pattern layer.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: September 4, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Ga-Lane Chen
  • Publication number: 20120218318
    Abstract: Disclosed herein is a light emitting apparatus including: one or a plurality of light emitting devices each having a plurality of electrodes and each emitting light from the upper surface of the light emitting device; a plurality of terminal electrodes provided on the lower side of the light emitting devices in a positional relation with the light emitting devices and electrically connected to the electrodes of the light emitting devices; a first metal line brought into contact with the upper surfaces of the light emitting devices and one of the terminal electrodes, provided at a location separated away from side surfaces of the light emitting devices and created in a film creation process; and an insulator in which the light emitting devices and the first metal line are embedded.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 30, 2012
    Applicant: SONY CORPORATION
    Inventors: Naoki Hirao, Katsuhiro Tomoda
  • Publication number: 20120214265
    Abstract: The method includes the steps of preparing an epitaxial wafer by forming a multilayer semiconductor structure on a main surface of a substrate; forming stripe electrodes and bonding pads on the multilayer semiconductor structure with the bonding pads being respectively electrically connected to the stripe electrodes; forming a projection portion on the multilayer semiconductor structure; forming laser diode (LD) bars by cutting the epitaxial wafer; arranging the LD bars on a support surface such that a side surface thereof is oriented normal to the support surface, and disposing spacers between the LD bars; and forming a coating film on the side surface. The projection portion has a height, measured from the main surface of the substrate, greater than a height of the stripe electrodes. Furthermore, the laser diode bar has at least one projection portion.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 23, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Yutaka ONISHI
  • Publication number: 20120214266
    Abstract: A manufacturing method of nitride semiconductor light emitting elements, which can reliably form a mechanically stable wiring electrode leading from a light emitting element surface. A structure protective sacrifice layer is formed around a first electrode layer on a device structure layer beforehand, and after separation of the device structure layer into respective portions for the light emitting elements, the resultant is stuck to a support substrate. Subsequently, forward tapered grooves reaching the structure protective sacrifice layer are formed, and the inverse tapered portion formed outward of the forward tapered groove is lifted off in a lift-off step. Thus, an insulating layer is formed on the forward tapered side walls of the light emitting element, and a wiring electrode layer electrically connected to the second electrode layer on the principal surface of the light emitting element is formed on the insulating layer.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 23, 2012
    Applicant: STANLEY ELECTRIC CO., LTD.
    Inventor: Mamoru MIYACHI
  • Publication number: 20120213239
    Abstract: A laminate leadless carrier package having a semiconductor chip mounted at the edge of a recess region in a substrate supporting the chip, the substrate having a plurality of conductive and dielectric layers, a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate. An encapsulation covers the laser chip, the wire bond, and at least a portion of the top surface of the substrate including the recess region. The encapsulation is an optically transparent molding compound. The package is arranged to be mounted as a side-looker and/or a top-looker.
    Type: Application
    Filed: March 2, 2012
    Publication date: August 23, 2012
    Inventors: Jin Han Ju, Robert Burman, Jerry Deleon
  • Publication number: 20120208307
    Abstract: A manufacturing method of a high-efficiency light-emitting diode (LED) is provided. A soft mold is used to transfer a microstructure or a nano-scale pattern thereon onto an imprinting material. The imprinting material is distributed all over an LED wafer; and the imprinting process may be performed through forward imprinting or reverse imprinting.
    Type: Application
    Filed: February 6, 2012
    Publication date: August 16, 2012
    Applicant: CHUNG-YUAN CHRISTIAN UNIVERSITY
    Inventors: Yeeu-Chang Lee, Ching-Huai Ni.
  • Patent number: 8242510
    Abstract: A structure and method for a semiconductor device includes a silicon device layer and a gallium nitride (GaN) device layer. In an embodiment, the silicon device layer and the GaN device layer have upper surfaces which are coplanar with each other. In another embodiment, the GaN device layer does not directly underlie the silicon device layer, and the silicon device layer does not directly underlie the GaN device layer. The semiconductor device can further include a silicon-based semiconductor device formed on and/or within the silicon device layer, and a nitride-based semiconductor device formed on and/or within the GaN device layer. The GaN device layer can include a plurality of layers which can be formed as conformal blanket layers and then planarized, or which can be selectively formed then planarized.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: August 14, 2012
    Assignee: Intersil Americas Inc.
    Inventor: Francois Hebert
  • Patent number: 8242518
    Abstract: A solid state light sheet and method of fabricating the sheet are disclosed. In one embodiment, bare LED chips have top and bottom electrodes, where the bottom electrode is a large reflective electrode. The bottom electrodes of an array of LEDs (e.g., 500 LEDs) are bonded to an array of electrodes formed on a flexible bottom substrate. Conductive traces are formed on the bottom substrate connected to the electrodes. A transparent top substrate is then formed over the bottom substrate. Various ways to connect the LEDs in series are described along with many embodiments. In one method, the top substrate contains a conductor pattern that connects to LED electrodes and conductors on the bottom substrate.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: August 14, 2012
    Assignee: Quarkstar LLC
    Inventors: Louis Lerman, Allan Brent York, Michael David Henry, Robert Steele, Brian D. Ogonowsky
  • Patent number: 8241937
    Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: August 14, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiko Happoya, Kazuhito Higuchi, Tomohiro Iguchi, Kazuo Shimokawa, Takashi Koyanagawa, Michinobu Inoue, Izuru Komatsu, Hisashi Ito
  • Patent number: 8241932
    Abstract: An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: August 14, 2012
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern, Hsing-Kuo Hsia, Hung-Yi Kuo
  • Patent number: 8243769
    Abstract: A semiconductor light emitting device downsized by devising arrangement of connection pads is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has a stripe-shaped semiconductor layer formed on a second substrate on the side facing to a first substrate, a stripe-shaped p-side electrode supplying a current to the semiconductor layer, stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, and a connection pad electrically connected to the p-side electrode. The connection pads are arranged in parallel with the opposed electrodes.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: August 14, 2012
    Assignee: Sony Corporation
    Inventors: Yuji Furushima, Abe Hiroaki, Kudou Hisashi, Fujimoto Tsuyoshi, Kentaro Aoshima
  • Patent number: 8237165
    Abstract: An organic light emitting diode (OLED) display and a method of manufacturing the same, the OLED display including a flexible substrate, a driving circuit unit on the flexible substrate, the driving circuit unit including a thin film transistor (TFT), an organic light emission element on the flexible substrate, the organic light emission element being connected to the driving circuit unit, an encapsulating thin film on the flexible substrate, the encapsulating thin film covering the organic light emission element and the driving circuit unit, a first protection film facing the encapsulating thin film, a second protection film facing the flexible substrate, a first sealant disposed between the encapsulating thin film and the first protection film, and a second sealant disposed between the flexible substrate and the second protection film.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: August 7, 2012
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Tae-Woong Kim, Dong-un Jin, Dong-Bum Lee, Denis Stryakhilev
  • Publication number: 20120193649
    Abstract: An electronic device may include a packaging substrate having a packaging substrate face with a plurality of electrically conductive pads on the packaging substrate face. A first light emitting diode die may bridge first and second ones of the electrically conductive pads. More particularly, the first light emitting diode die may include first anode and cathode contacts respectively coupled to the first and second electrically conductive pads using metallic bonds. Moreover, widths of the metallic bonds between the first anode contact and the first pad and between the first cathode contact and the second pad may be at least 60 percent of a width of the first light emitting diode die. A second light emitting diode die may bridge third and fourth ones of the electrically conductive pads. The second light emitting diode die may include second anode and cathode contacts respectively coupled to the third and fourth electrically conductive pads using metallic bonds.
    Type: Application
    Filed: February 14, 2011
    Publication date: August 2, 2012
    Inventors: Matthew Donofrio, John Adam Edmond, Hua-Shuang Kong, Peter S. Andrews, David Todd Emerson
  • Publication number: 20120193651
    Abstract: Light emitting devices, systems, and methods are disclosed. In one embodiment a light emitting device can include an emission area having one or more light emitting diodes (LEDs) mounted over an irregularly shaped mounting area. The light emitting device can further include a retention material disposed about the emission area. The retention material can also be irregularly shaped, and can be dispensed. Light emitting device can include more than one emission area per device.
    Type: Application
    Filed: September 2, 2011
    Publication date: August 2, 2012
    Inventors: John A. Edmond, Hua-Shuang Kong, Matthew Donofrio
  • Patent number: 8232564
    Abstract: Methods for wafer level fabricating of light emitting diode (LED) chips are disclosed with one embodiment of a method according to the present invention comprising providing a plurality of LEDs and then coating of the LEDs with a layer of first conversion material so that at least some light from the LEDs passes through the first conversion material. The light is converted to different wavelengths of light having a first conversion material emission spectrum. The LEDs are then coated with a layer of second conversion material arranged on the first layer of conversion. The second conversion material has a wavelength excitation spectrum, and at least some light from the LEDs passes through the second conversion material and is converted. The first conversion material emission spectrum does not substantially overlap with the second conversion material excitation spectrum.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: July 31, 2012
    Assignee: Cree, Inc.
    Inventor: Arpan Chakraborty
  • Publication number: 20120187436
    Abstract: A light emitting diode (LED) device includes a substrate, a supporting member, an electrode layer, an LED chip and an encapsulant. The substrate has a first surface and a second surface. The substrate defines a hole extending through the first surface and the second surface. The supporting member is attached to the second surface of the substrate and covers the hole. The supporting member and the substrate cooperatively define a cavity. The electrode layer is arranged on the first surface of the substrate and an inner surface of the cavity. The encapsulant is arranged on the electrode layer and covers the LED chip.
    Type: Application
    Filed: November 29, 2011
    Publication date: July 26, 2012
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: PIN-CHUAN CHEN, HSIN-CHIANG LIN, WEN-LIANG TSENG
  • Patent number: 8227282
    Abstract: A method of manufacturing a vertical light emitting diode includes: providing a first substrate; forming a lapping stop layer on the first substrate, the lapping stop layer being harder than the first substrate; depositing an epitaxial layer on the lapping stop layer; bonding a second substrate on the epitaxial layer; and removing the first substrate from the lapping stop layer.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: July 24, 2012
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Tzu-Chien Hung, Chia-Hui Shen
  • Patent number: 8227796
    Abstract: A display device includes light emitting elements corresponding to respective colors disposed on a substrate. Each of the light emitting elements corresponding to the respective colors has a cavity structure in which a light emission functioning layer including a light emitting layer is held between a reflecting electrode and a semitransmitting electrode. A cavity order of at least the light emitting element adapted to resonate a light, having the shortest wavelength, of the light emitting elements corresponding to the respective colors is 1, and a cavity order of each of other light emitting elements is 0. The light emission functioning layer except for the light emitting layer is common to the light emitting elements corresponding to the respective colors.
    Type: Grant
    Filed: November 11, 2008
    Date of Patent: July 24, 2012
    Assignee: Sony Corporation
    Inventors: Reo Asaki, Jiro Yamada
  • Patent number: 8227272
    Abstract: Disclosed is a light emitting device having a plurality of light emitting cells and a package having the same mounted thereon. The light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type semiconductor layer located on a portion of the N-type semiconductor layer. The plurality of light emitting cells are bonded to a submount substrate. Accordingly, heat generated from the light emitting cells can be easily dissipated, so that a thermal load on the light emitting device can be reduced. Meanwhile, since the plurality of light emitting cells are electrically connected using connection electrodes or electrode layers formed on the submount substrate, it is possible to provide light emitting cell arrays connected to each other in series.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: July 24, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chung Hoon Lee, Lacroix Yves, Hyung Soo Yoon, Young Ju Lee
  • Patent number: 8227273
    Abstract: For the production of a white LED having a predetermined color temperature, a blue LED (2a-2d) or a UV LED is coated with a conversion layer (5) which absorbs the blue light or UV light and emits light of greater wavelength. In accordance with the invention, the exact wavelength of the LED (2a-2d) is determined and the color conversion agent (5) is applied over this LED (2a-2d) in a quantity dependent upon the determined wavelength. Through this, the tolerance of the color temperature can be significantly reduced. The color conversion agent may be applied by means of dispenser or stamp, and the quantity and/or concentration selected in dependence upon the determined wavelength. Inkjet printing, deposition from the gas phase or selective removal by means of a laser is, however, also possible. The invention also relates to light sources produced in accordance with this method.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: July 24, 2012
    Assignee: Tridonic Optoelectronics GmbH
    Inventor: Günther Leising
  • Publication number: 20120181571
    Abstract: Provided is an adhesive film for an LED chip, including: a double-sided adhesive layer having the LED chip adhered to an upper surface thereof and a lead frame adhered to a lower surface thereof; an ultraviolet (UV) cured layer adhered to one surface of the double-sided adhesive layer; and upper and lower cover layers respectively adhered to faces exposed to the exterior of the double-sided adhesive layer and the UV cured layer.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 19, 2012
    Inventors: Na Na Park, II Woo Park, Kyu Jin Lee
  • Publication number: 20120181568
    Abstract: The present disclosure provides a method of fabricating a light emitting diode (LED) package. The method includes bonding a plurality of separated light emitting diode (LED) dies to a substrate, wherein each of the plurality of separated LED dies includes an n-doped layer, a quantum well active layer, and a p-doped layer; depositing an isolation layer over the plurality of separated LED dies and the substrate; etching the isolation layer to form a plurality of via openings to expose portions of each LED die and portions of the substrate; forming electrical interconnects over the isolation layer and inside the plurality of via openings to electrically connect between one of the doped layers of each LED die and the substrate; and dicing the plurality of separated LED dies and the substrate into a plurality of LED packages.
    Type: Application
    Filed: January 13, 2011
    Publication date: July 19, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu
  • Publication number: 20120181558
    Abstract: A wafer level light-emitting device package may include a polymer layer that bonds a light-emitting structure to a package substrate, and the polymer layer and the package substrate may include a plurality of via holes. Also, a method of manufacturing the wafer level light-emitting device package may include forming the polymer layer on the light-emitting structure, bonding the package substrate onto the polymer layer by applying heat and pressure, and forming a plurality of via holes in the polymer layer and the package substrate.
    Type: Application
    Filed: September 22, 2011
    Publication date: July 19, 2012
    Inventor: Seong-deok HWANG
  • Patent number: 8222059
    Abstract: In a method of manufacturing an optical device, a whole substrate is first prepared which has a plurality of regions corresponding to substrates constituting a plurality of optical devices, respectively. A plurality of chips are then mounted to the plurality of regions, respectively. A whole sealing member having a plurality of sealing members is integrally attached to the whole substrate to form an intermediate body. The intermediate body is divided into the above-described regions. Thus, the optical device having a substrate, a chip as an optical element mounted to the substrate and a sealing member with transparency provided at the substrate for the purpose of sealing the chip is manufactured. This manufacturing method improves the efficiency of manufacturing an optical device.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: July 17, 2012
    Assignee: Towa Corporation
    Inventor: Takeshi Ashida
  • Patent number: 8222811
    Abstract: The invention relates to an electroluminescent display, illumination or indicating device and to its fabrication process. This device (1) comprises a substrate (2) coated with an electroluminescent unit (3) having two electrodes, namely an internal electrode (5) and an external electrode (6), between which a light-emitting structure (4) is placed, at least one of said electrodes being transparent to the emitted light, a protective plate (7) being assembled on the unit by means of an adhesive (7a).
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: July 17, 2012
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: David Vaufrey, Tony Maindron
  • Publication number: 20120175651
    Abstract: A light emitting module includes a light emitting package and a lead frame. The light emitting package includes a light emitting chip emitting light, a first lead electrically connected to the light emitting chip, and a second lead spaced apart from the first lead and electrically connected to the light emitting chip. The light emitting package is mounted on the lead frame. The lead frame includes a third lead electrically connected to the first lead, a fourth lead electrically connected to the second lead and a molding part including the third lead and the fourth lead therein.
    Type: Application
    Filed: June 24, 2011
    Publication date: July 12, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-Min KIM, Seok-Hyun NAM, Ju-Young YOON
  • Publication number: 20120177079
    Abstract: A parallel transceiver includes a constructed array of dice. The constructed array comprises an integer number of dies that each have an integer number of optoelectronic devices arranged on the die. Each die forming the constructed array is attached to a respective tab of a shim that is fixed to a first lead frame. Each tab includes a bridge region and a mounting region. Each die is attached to a respective mounting region of a corresponding tab. When necessary, a laser hammering technique is performed whereby laser generated energy is applied along an axis in the bridge region of the shim to adjust the position of the optoelectronic devices on the die attached to the tab in one or more directions relative to the axis.
    Type: Application
    Filed: January 6, 2011
    Publication date: July 12, 2012
    Applicant: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
    Inventor: Laurence R. McColloch
  • Patent number: 8216017
    Abstract: In a method of fabricating a planar light source, a first substrate is formed at first. First electrodes approximately parallel to each other are formed on the first substrate. Sets of first dielectric patterns are formed on the first substrate. Each set of the first dielectric patterns includes at least two first striped dielectric patterns, and each of the first striped dielectric patterns covers one of the first electrodes correspondingly. The edges of the top of each first striped dielectric pattern are raised in a peak shape. A phosphor layer is formed between the first striped dielectric patterns of each set of the first dielectric patterns. A second substrate is formed. The first and second substrates are bound; meanwhile, a discharge gas is injected into the discharge space.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: July 10, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Yu-Heng Hsieh, Chu-Chi Ting, Shinn-Haw Huang, Chang-Jung Yang, Chia-Hua Ai
  • Patent number: 8218919
    Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: July 10, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Karen Tyger
  • Publication number: 20120168786
    Abstract: An optoelectronic semiconductor component comprising: a main body (100) having a recess; (102), a first optoelectronic element (104) and a second optoelectronic element; (106) a surface structured element; (110) and a filling compound (112) embedding the first optoelectronic element (104) and the second optoelectronic element (106) in the recess, wherein the surface structured element configures a surface of the filling compound (112) such that at least two domed regions (114, 116, 118) of the surface are formed.
    Type: Application
    Filed: August 25, 2010
    Publication date: July 5, 2012
    Applicant: OSRAM AG
    Inventors: Andreas Barth, Peter Brick, Michael Wittmann
  • Publication number: 20120171788
    Abstract: It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm.
    Type: Application
    Filed: March 8, 2012
    Publication date: July 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yuugo GOTO, Yumiko OHNO, Mai AKIBA
  • Publication number: 20120168780
    Abstract: A resin for an encapsulation material includes a first polysiloxane including hydrogen bound to silicon (Si—H) at its terminal end, and a second polysiloxane including an alkenyl group bound to silicon (Si-Vi) at its terminal end, wherein a ratio (Si—H/Si-Vi) of hydrogen bound to silicon (Si—H) in the first polysiloxane to the alkenyl group bound to silicon (Si-Vi) in the second polysiloxane is about 1 to about 1.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 5, 2012
    Inventors: Sung-Hwan CHA, Sang-Ran KOH, Yong Kook KIM, Woo-Han KIM, Ha Neul KIM, Chi Won AN
  • Publication number: 20120171789
    Abstract: A method of making a solid element device that includes a solid element, an element mount part on which the solid element is mounted and which has a thermal conductivity of not less than 100 W/mK, an external terminal provided separately from the element mount part and electrically connected to the solid element, and a glass sealing part directly contacting and covering the solid element for sealing the solid element, includes pressing a glass material at a temperature higher than a yield point of the glass material for forming the glass sealing part.
    Type: Application
    Filed: March 13, 2012
    Publication date: July 5, 2012
    Applicants: SUMITA OPTICAL GLASS INC., TOYODA GOSEI CO., LTD.
    Inventors: Yoshinobu Suehiro, Mitsuhiro Inoue, Hideaki Kato, Kunihiro Hadame, Ryoichi Tohmon, Satoshi Wada, Koichi Ota, Kazuya Aida, Hiroki Watanabe, Yoshinori Yamamoto, Masaaki Ohtsuka, Naruhito Sawanobori
  • Patent number: 8212264
    Abstract: A module and method of its production in which areal electronic components are formed. The module includes (a) a cover electrode covering the electronic components; (b) a flexibly deformable substrate; (c) a base electrode formed on the substrate; and (d) an optically active layer formed on the base electrode. The electronic components are formed on the flexibly deformable substrate by the optically active layer, the cover electrode; and the base electrode. The cover electrode projects over the optically active layer at a first side and the base electrode extends beyond the optically active layer at a second side which is oppositely disposed with regards to the first side.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: July 3, 2012
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E.V.
    Inventor: Olaf Ruediger Hild
  • Publication number: 20120161161
    Abstract: Various embodiments of solid state lighting (“SSL”) assemblies with high voltage SSL dies and methods of manufacturing are described herein. In one embodiment, an array assembly of SSL dies includes a first terminal and a second terminal configured to receive an input voltage (Vo). The array assembly also includes a plurality of SSL dies coupled between the first terminal and the second terminal, at least some of which are high voltage SSL dies coupled in parallel.
    Type: Application
    Filed: December 27, 2010
    Publication date: June 28, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Martin F. Schubert