Abstract: There is proposed a process for performing (quasi-) anisotropic etching on a silicon-based material without using plasma. The process consists of irradiating a polycrystalline or single-crystalline silicon film or substrate with a beam of accelerated hydrogen ions, silicon ions, or rare gas ions, so that the crystalline silicon is made amorphous. Then, the amorphous silicon is placed in an atmosphere of fluorinated halogen. Since the etching rate of fluorinated halogen for amorphous silicon is greater than that for polycrystalline or single-crystalline silicon, etching takes place selectively at the area which has been irradiated with a beam of accelerated hydrogen ions, silicon ions, or rare gas ions. The selective etching permits (quasi-) anisotropic etching instead of sideward isotropic etching.

Abstract: A transistor circuit is formed on a substrate having source and drain electrodes and multiple current-controlling gates. The two current-controlling gates are separated by spacer oxide material. The first gate is an metal oxide semiconductor (MOS) gate that is insulated from the substrate by a layer of gate oxide. The second gate is a junction field effect transistor (JFET) gate contiguous to the MOS gate that is insulated from the MOS gate by a layer of spacer oxide.

Abstract: A method of producing a semiconductor device having a LDD structure using a semiconductor substrate laminated with an insulating film, a polysilicon layer, and a first conductive layer where the first conductive layer is formed of a high melting point metal and the first conductive layer and polysilicon layer are removed in the region other than a gate pattern formation region but without exposing the insulating layer. After implanting the semiconductor substrate with a first impurity, the residual polysilicon layer in the region other than the gate pattern formation region along with a polysilicon layer sidewall in the gate pattern formation region are converted into a silicon oxide layer by subjecting to oxidation treatment, and the semiconductor substrate is laminated with a second conductive layer.