Abstract: Included is a semiconductor multilayer film in which a non-doped InAlN layer and a GaN layer formed on said InAlN layer and containing a dopant are stacked a plurality of times.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer; a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer; a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.

Abstract: In various embodiments, controlled heating and/or cooling conditions are utilized during the fabrication of aluminum nitride single crystals and aluminum nitride bulk polycrystalline ceramics. Thermal treatments may also be utilized to control properties of aluminum nitride crystals after fabrication.

Abstract: A light-emitting element includes, on a substrate, a shift thyristor and a light-emitting thyristor. The shift thyristor and the light-emitting thyristor each include a semiconductor multilayer structure consisting of first to fourth semiconductor layers stacked with alternating conductivity types. The shift thyristor includes a current diffusion layer in contact with the semiconductor multilayer structure, and a first metal electrode in this order, or the first metal electrode which is in contact with the semiconductor multilayer structure on the semiconductor multilayer structure; and wherein in the shift thyristor, a region in which a region in which the current diffusion layer or the first metal electrode and the semiconductor multilayer structure come into contact with each other is projected in a stacked direction of the semiconductor multilayer structure is included in a region in which the first metal electrode is projected in the stacked direction.

Abstract: A display device includes a substrate, at least one bonding electrode, at least one LED device electrically connected to the bonding electrode, and a transparent conductive layer. The bonding electrode is between the LED device and the substrate. The LED device includes a n type semiconductor layer, a p type semiconductor layer between the n type semiconductor layer and the bonding electrode, and an intermediate layer. The p type semiconductor layer includes a high resistance portion and a low resistance portion enclosed by the high resistance portion. A resistivity of the p type semiconductor layer increases from the low resistance portion toward the high resistance portion. The intermediate layer is between the p type semiconductor layer and the bonding electrode. The transparent conductive layer is electrically connected to the n type semiconductor layer. The LED device is between the transparent conductive layer and the bonding electrode.

Abstract: A semiconductor manufacturing method includes alternately stacking first films and second films to form a stack film. The method includes forming a plurality of recessed portions in a stack direction of the stack film at an interval in a first direction substantially perpendicular to the stack direction. The semiconductor manufacturing method includes forming third films in the recessed portions. The method includes forming a mask material on the stack film and the third films and diminishing the mask material to expose the stack film in a first range between an end of a stepped portion to be formed on the stack film and one of the third films and to position an end of the mask material on the third film. The method includes removing a predetermined number of layers of films from the stack film in the first range using the diminished mask material as a mask.

Abstract: The invention relates to layered graphene-ferroelectric structures for use as transparent electrodes in touch panels and display screen applications.

Abstract: A method of stably manufacturing a p type nitride semiconductor layer using a carbon dopant is provided. A crystal plane substrate is prepared having a main surface which has an offset angle in a range of +/?0.1% with respect to a C-plane or a crystal plane equivalent to the C-plane; and during a time period in which a III-source gas and a V-source gas are supplied to grow a III-V group nitride semiconductor layer, carbon tetrabromide (CBr4), which is a carbon source gas, is supplied so as to introduce carbon into a V-group atom layer.

Abstract: A semiconductor memory device can include a first conductive line crossing over a field isolation region and crossing over an active region of the device, where the first conductive line can include a first conductive pattern being doped, a second conductive pattern, and a metal-silicon-nitride pattern between the first and second conductive patterns and can be configured to provide a contact at a lower boundary of the metal-silicon-nitride pattern with the first conductive pattern and configured to provide a diffusion barrier at an upper boundary of the metal-silicon-nitride pattern with the second conductive pattern.

Abstract: A first metallic hard mask layer over an interconnect-level dielectric layer is patterned with a line pattern. At least one dielectric material layer, a second metallic hard mask layer, a first organic planarization layer (OPL), and a first photoresist are applied above the first metallic hard mask layer. A first via pattern is transferred from the first photoresist layer into the second metallic hard mask layer. A second OPL and a second photoresist are applied and patterned with a second via pattern, which is transferred into the second metallic hard mask layer. A first composite pattern of the first and second via patterns is transferred into the at least one dielectric material layer. A second composite pattern that limits the first composite pattern with the areas of the openings in the first metallic hard mask layer is transferred into the interconnect-level dielectric layer.

Abstract: A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.

Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.

Abstract: Embodiments of the present invention provide a method of forming contact structure for transistor. The method includes providing a semiconductor substrate having a first and a second gate structure of a first and a second transistor formed on top thereof, the first and second gate structures being embedded in a first inter-layer-dielectric (ILD) layer; epitaxially forming a first semiconductor region between the first and second gate structures inside the first ILD layer; epitaxially forming a second semiconductor region on top of the first semiconductor region, the second semiconductor region being inside a second ILD layer on top of the first ILD layer and having a width wider than a width of the first semiconductor region; and forming a silicide in a top portion of the second semiconductor region.

Abstract: Radiation detectors and methods of fabricating radiation detectors are provided. One method includes mechanically polishing at least a first surface of a semiconductor wafer using a polishing sequence including a plurality of polishing steps, wherein a last polishing step of the polishing sequence includes polishing with a slurry having a grain size smaller than about 0.1 ?m to create a polished first surface. The method also includes applying (i) an encapsulation layer on a top of the polished first surface to seal the polished first surface and (ii) a photoresist layer on top of the encapsulation layer on the polished first surface. The method further includes creating undercuts of the encapsulation layer under the photoresist layer. The method additionally includes partially etching the polished first surface of the semiconductor via the openings in the photoresist layer and in the encapsulation layer to partially etch the semiconductor creating etched regions.

Abstract: A method of manufacturing a semiconductor light emitting device is performed on a light emitting structure including a sequential stack of a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. The second conductivity-type semiconductor layer and the active layer are mesa-etched to expose a portion of the first conductivity-type semiconductor layer therethrough. A conductive layer is formed on the second conductivity-type semiconductor layer and the portion of the first conductivity-type semiconductor layer exposed by mesa-etching. In turn, the conductive layer is dry etched such that an upper surface of the first conductivity-type semiconductor layer is partially etched to have uneven portions formed thereon. The resulting semiconductor light emitting device has improved external light extraction efficiency while being easily manufactured.

Abstract: A process for manufacturing buried hetero-structure laser diodes includes the steps of forming a stacked semiconductor layer on a substrate; forming a mask layer on the stacked semiconductor layer; forming a semiconductor mesa by etching the stacked semiconductor layer through the mask layer; forming an overhang of the mask layer by selectively etching the stacked semiconductor layer of the semiconductor mesa; selectively growing a buried layer on a side surface of the semiconductor mesa while leaving the mask layer on the semiconductor mesa; forming a lateral portion of the buried layer, the lateral portion having a side surface adjacent to the side surface of the semiconductor mesa; after forming the lateral portion of the buried layer, removing the mask layer on the semiconductor mesa; and forming an electrode on a top surface of the semiconductor mesa and on the side surface of the lateral portion of the buried layer.

Abstract: A method of manufacturing a light emitting diode, includes a process of forming an n-type nitride semiconductor layer, a light emitting layer, and a p-type nitride semiconductor layer on a temporary substrate, a process of forming a p-type electrode on the p-type nitride semiconductor layer, a process of forming a conductive substrate on the p-type electrode, a process of removing the temporary substrate to expose the n-type nitride semiconductor layer, a process of forming a nanoimprint resist layer on the n-type nitride semiconductor layer, a process of pressing the nanoimprint mold on the nanoimprint resist layer to transfer the nano-pattern onto the nanoimprint resist layer, and a process of separating the nanoimprint mold from the nanoimprint resist layer having the nano-pattern and etching a portion of the nanoimprint resist layer having the nano-pattern to form an n-type electrode.

Abstract: In an organic light-emitting display device and a method of manufacturing the organic light-emitting display device, the method includes forming thin film transistors (TFTs) on a substrate; and forming organic light emitting diodes (OLEDs), each of the OLEDs including a first electrode having a portion exposed by a pixel defining layer (PDL) on the TFTs, an organic layer on the exposed portion of the first electrode and including an emission layer (EML) configured to emit light having a respective one of a plurality of colors, and a second electrode on the organic layer. The EML is formed in each of a sub-pixel region with one color and other sub-pixel regions with other colors that are formed by forming openings in the PDL. A solution supply unit for sub-pixel region that communicates with the sub-pixel region with one color is formed in the sub-pixel region with one color.

Abstract: A method of manufacturing a p type nitride semiconductor layer doped with carbon in a highly reproducible manner with an increased productivity is provided. The method includes supplying an III-group material gas for a predetermined time period T1, supplying a V-group material gas containing a carbon source for a predetermined time period T2 when a predetermined time period t1 (t1+T2>T1) elapses after the supply of the III-group material gas begins, repeating the step of supplying the III-group material gas and the step of supplying the V-group material gas when a predetermined time period t2 (t1+T2?t2>T1) elapses after the supply of the V-group material gas begins, and thus forming an AlxGa1-xN semiconductor layer (0<x?1) at a growth temperature of 1190° C.˜1370° C. or a growth temperature at which a substrate temperature is 1070° C.˜1250° C. using a chemical vapor deposition method or a vacuum evaporation method. Nitrogen sites within the semiconductor layer are doped with carbon.

Abstract: To improve light emission efficiency and reliability. A transparent conductive film 10 is formed on an entire top surface of a second semiconductor layer 108, and a photo-resist is applied thereon. When removing the photo-resist on the upper surface corresponding to an electrode forming part 16 of a first semiconductor layer 104, the photo-resist is removed to be gradually thinned at a boundary of a portion to be removed. The transparent conductive film is wet etched using the remaining photo-resist as a mask to expose a part of the second semiconductor layer. Dry etching is performed using the remaining photo-resist and the transparent conductive film as a mask to expose the electrode forming part of the first semiconductor layer. A portion of the transparent conductive film exposed in the dry etching using the remaining photo-resist as a mask is wet etched. The remaining photo-resist is eliminated.

Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.

Abstract: An LED includes a substrate, a first n-type GaN layer, a connecting layer, a second n-type GaN layer, a light emitting layer, and a p-type GaN layer. The first n-type GaN layer, the connecting layer, and the second n-type GaN layer are formed on the substrate in sequence. The connecting layer is etchable by alkaline solution, and a bottom surface of the second n-type GaN layer facing towards the connecting layer has a roughed exposed portion. The GaN on the bottom surface of the second n-type GaN layer is N-face GaN. A top surface of the second n-type GaN layer facing away from the connecting layer includes a first area and a second area. The light emitting layer and the p-type GaN layer are formed on the first area of the top surface of the second n-type GaN layer in sequence.

Abstract: In one embodiment, a method of growing a heteroepitaxial layer comprises providing a patterned substrate containing patterned features having sidewalls. The method also includes directing ions toward the sidewalls in an exposure, wherein altered sidewall regions are formed, and depositing the heteroepitaxial layer under a set of deposition conditions effective to preferentially promote epitaxial growth on the sidewalls in comparison to other surfaces of the patterned features.

Abstract: A method for producing an optical semiconductor device includes the steps of forming a semiconductor structure; forming a mask on the semiconductor structure; etching the semiconductor structure with the mask to form first and second stripe-shaped grooves and a mesa portion; forming a protective film on a top surface and side surfaces of the mesa portion; forming a resin portion on the protective film; etching the resin portion and the protective film formed on the top surface; forming an upper electrode on the top surface; and forming an electrical interconnection on the resin portion. The resin portion has an inclined surface region that rises from a first point above the mesa portion toward a second point above the first stripe-shaped groove. The step of etching the resin portion and the protective film includes the substeps of etching the resin portion and simultaneously etching the resin portion and the protective film.

Abstract: A light-emitting device comprises a first semiconductor layer; a second semiconductor layer; an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electron blocking layer formed between the first semiconductor layer and the active layer; and a second electron blocking layer formed between the second semiconductor layer and the active layer, wherein the thickness of the second electron blocking layer is not equal to that of the first electron blocking layer, and/or the band gap energy of the second electron blocking layer is not equal to that of the first electron blocking layer.

Abstract: A semiconductor light emitting device having high reliability and excellent light distribution characteristics can be provided with an n-electrode arranged on a light extraction surface on the side opposite to the surface whereupon a semiconductor stack is mounted on a substrate. A plurality of convexes are arranged on a first convex region and a second convex region on the light extraction surface. The second convex region adjoins the interface between the n-electrode and the semiconductor stack, between the first convex region and the n-electrode. The base end of the first convex arranged in the first convex region is positioned closer to a light emitting layer than the interface between the n-electrode and the semiconductor stack, and the base end of the second convex arranged in the second convex region is positioned closer to the interface between the n-electrode and the semiconductor stack than the base end of the first convex.

Abstract: The present invention discloses an OLED display panel which includes a first TFT array substrate, a first cover and a structural stiffening glue. A first frit and a second frit of the first cover have the structural stiffening glue provided at an outer side thereof, and the structural stiffening glue is in contact with the first TFT array substrate and the first cover. The present invention further discloses a method for manufacturing the OLED display panel. The present invention enables more solid and stable for a structure of the OLED display panel.

Abstract: Embodiments of the present invention provide a contact structure for transistor. The contact structure includes a first epitaxial-grown region between a first and a second gate of, respectively, a first and a second transistor; a second epitaxial-grown region directly on top of the first epitaxial-grown region with the second epitaxial-grown region having a width that is wider than that of the first epitaxial-grown region; and a silicide region formed on a top portion of the second epitaxial-grown region with the silicide region having an interface, with rest of the second epitaxial-grown region, that is wider than that of the first epitaxial-grown region. In one embodiment, the second epitaxial-grown region is at a level above a top surface of the first and second gates of the first and second transistors.

Abstract: A light-emitting diode (LED) element is provided. The LED element includes a substrate, a diode structure layer and several light-guide structures. The light-guide structures are formed on at least one of the substrate and the diode structure layer. Each light-guide structure has an inner sidewall, and several spiral slits formed on the inner side wall.

Abstract: A method of manufacturing a waveguide eliminates a prior art reflow step and introduces certain new steps that permit fabricating of an ultra-low loss waveguide element on a silicon chip. The ultra-low loss waveguide element may be adapted to fabricate a number of devices, including a wedge resonator and a ultra-low loss optical delay line having an extended waveguide length.

Abstract: A radiation-emitting device for emitting electromagnetic radiation which is a mixture of at least three different partial radiations of a first, a second and a third wavelength range.

Abstract: According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor device. The method can include removing a growth substrate from a structure body by using a first treatment material. The structure body has the growth substrate, a buffer layer formed on the growth substrate, and the nitride semiconductor layer formed on the buffer layer. A support substrate is bonded to the nitride semiconductor layer. The method can include reducing thicknesses of the buffer layer and the nitride semiconductor layer by using a second treatment material different from the first treatment material after removing the growth substrate.

Abstract: Embodiments of the invention pertain to a method and apparatus for sensing infrared (IR) radiation. In a specific embodiment, a night vision device can be fabricated by depositing a few layers of organic thin films. Embodiments of the subject device can operate at voltages in the range of 10-15 Volts and have lower manufacturing costs compared to conventional night vision devices. Embodiments of the device can incorporate an organic phototransistor in series with an organic light emitting device. In a specific embodiment, all electrodes are transparent to infrared light. An IR sensing layer can be incorporated with an OLED to provide IR-to-visible color up-conversion. Improved dark current characteristics can be achieved by incorporating a poor hole transport layer material as part of the IR sensing layer.

Abstract: A semiconducting polymer formed from an insulator polymer and an ionic liquid is disclosed. In at least one embodiment, the semiconducting polymer may be formed from a homogenous blend of two or more insulator polymers and two or more ionic liquids. The homogenous mixture of non-conducting polymers and ionic liquid may be formed as a film of semiconducting polymer with a controllable thickness. The semiconducting polymer may be used in a multitude of different applications, including, but not limited to, storage devices.

Abstract: A light emitting device is disclosed. The light emitting device includes a first electrode and a second electrode, which have different areas, thereby achieving enhanced bonding reliability.

Abstract: A pixel structure is provided. A first insulating pattern is on the first polysilicon pattern. A second insulating pattern is on the second polysilicon pattern and separated from the first insulating pattern. An insulating layer covers the first and the second insulating patterns. A first gate and a second gate are on the insulating layer. A first covering layer covers the first and the second gates. A first source metal layer and a first drain metal layer are on the first covering layer and electrically connected to a first source region and a first drain region. A second source metal layer and a second drain metal layer are on the first covering layer and electrically connected to a second source region and a second drain region. A pixel electrode is electrically connected to the first drain metal layer.

Abstract: A light emitting diode chip includes a substrate, an epitaxial layer, two inclined plane units, and two electrode units. The substrate has top and bottom surfaces. The epitaxial layer is disposed on the top surface of the substrate. Each of the inclined plane units is inclined downwardly and outwardly from the epitaxial layer toward the bottom surface of the substrate, and includes an inclined sidewall formed on the epitaxial layer, and a substrate inclined wall formed on the substrate. Each of the electrode units includes an electrode disposed on the epitaxial layer, and a conductive portion extending from the electrode to the substrate inclined wall along corresponding one of the inclined plane units.

Abstract: According to one embodiment, in a method of a nitride semiconductor light emitting device, a nitride semiconductor laminated body is formed on a first substrate having a first size. A first adhesion layer with a second size smaller than the first size is formed on the nitride semiconductor laminated body. A second adhesion layer is formed on a second substrate. The first and the second substrates are bonded while the first and second adhesion layers being overlapped each other. The first substrate is removed so as to generate a recess having a third size equal to or larger than the second size. The first substrate is etched until exposing the nitride semiconductor laminated body while injecting a chemical solution into the recess. The exposed nitride semiconductor laminated body is etched using the chemical solution so as to form a concave-convex portion in the exposed nitride semiconductor laminated body.

Abstract: A p-type cladding layer (3) of p-type semiconductor is formed over a substrate. An active layer (5) including a p-type semiconductor region is disposed over the p-type cladding layer. A buffer layer (10) of non-doped semiconductor is disposed over the active layer. A ridge-shaped n-type cladding layer (11) of n-type semiconductor is disposed over a partial surface of the buffer layer. The buffer layer on both sides of the ridge-shaped n-type cladding layer is thinner than the buffer layer just under the ridge-shaped n-type cladding layer.

Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.

Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Abstract: A light emitting element having a recess-protrusion structure on a substrate is provided. A semiconductor light emitting element 100 has a light emitting structure of a semiconductor 20 on a first main surface of a substrate 10. The first main surface of the substrate 10 has substrate protrusion portion 11, the bottom surface 14 of each protrusion is wider than the top surface 13 thereof in a cross-section, or the top surface 13 is included in the bottom surface 14 in a top view of the substrate. The bottom surface 14 has an approximately polygonal shape, and the top surface 13 has an approximately circular or polygonal shape with more sides than that of the bottom surface 14.

Abstract: A growth method for reducing defect density of GaN includes steps of: sequentially forming a buffer growth layer, a stress release layer and a first nanometer cover layer on a substrate, wherein the first nanometer cover layer has multiple openings interconnected with the stress release layer; growing a first island in each of the openings; growing a first buffer layer and a second nanometer cover layer on the first island; and growing a second island to form a dislocated island structure. Thus, through the first nanometer cover layer and the second nanometer cover layer, multiple dislocated island structures can be directly formed to reduce manufacturing complexity as well as increase yield rate by decreasing manufacturing environment variation. Further, the epitaxial lateral over growth (ELOG) approach also effectively enhances characteristics of GaN optoelectronic semiconductor elements.

Abstract: There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point.

Abstract: An LED with undercut includes a first semiconductor layer, an illumination layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer includes a first area and a second area. A first acute angle is included between a first slanted wall and a first top surface of the first area. The illuminating layer is formed on the second area. The second semiconductor is formed on the illuminating layer. The first and second electrodes are respectively formed on the first top surface and the second semiconductor layer. The first semiconductor layer on the second area, the illuminating layer and the second semiconductor layer on the first semiconductor layer form a MESA structure. The MESA structure includes a second slanted wall adjacent to the first area. A second acute angle is included between the second slanted wall and the first top surface.

Abstract: A method for manufacturing a quantum cascade laser includes the steps of forming a semiconductor stacked structure including a first semiconductor region and a second semiconductor region; forming an etching mask having a striped pattern on the second semiconductor region; forming a semiconductor mesa structure having a mesa shape in cross section by etching the first and second semiconductor regions using the etching mask; forming an insulating layer over a top portion and side surfaces of the semiconductor mesa structure and the first semiconductor region; forming an opening in a portion of the insulating layer that is disposed on the top portion of the semiconductor mesa structure; and forming an electrode over the inside of the opening of the insulating layer, the top portion and side surfaces of the semiconductor mesa structure, and the first semiconductor region.

Abstract: A method of fabricating a semiconductor laser device by forming a semiconductor structure at least part of which is in the form of a mesa structure having a flat top. The steps include depositing a passivation layer over the mesa structure, forming a contact opening in the passivation layer on the flat top of the mesa structure; and depositing a metal contact portion, with the deposited metal contact portion contacting the semiconductor structure via the contact opening. The contact opening formed through the passivation layer has a smaller area than the flat top of the mesa structure to allow for wider tolerances in alignment accuracy. The metal contact portion comprises a platinum layer between one or more gold layers to provide an effective barrier against Au diffusion into the semiconductor material.

Abstract: A transistor is manufactured by a method including: forming a first wiring layer; forming a first insulating film to cover the first wiring layer; forming a semiconductor layer over the first insulating film; forming a conductive film over the semiconductor layer; and performing at least two steps of etching on the conductive film to form second wiring layers which are apart from each other, wherein the two steps of etching include at least a first etching process performed under the condition that the etching rate for the conductive film is higher than the etching rate for the semiconductor layer, and a second etching process performed under the condition that the etching rates for the conductive film and the semiconductor layer are higher than those of the first etching process.

Abstract: A method for manufacturing an LED chip is disclosed wherein a substrate is provided. A first semi-conductor layer is formed on the substrate. A photoresist layer with an inverted truncated cone shape and a blocking layer with an inclined inner surface facing and surrounding the photoresist layer are formed on the first semi-conductor layer. The photoresist layer is removed and an epitaxial region surrounded by the blocking layer is defined. A lighting structure is formed inside the epitaxial region. The blocking layer is then removed and the first semi-conductor layer is exposed. Electrodes are formed and respectively electrically connected to the first semi-conductor layer and the lighting structure.

Abstract: A manufacturing method of a tip type probe includes the steps of: forming on a substrate an etching mask of a shape similar to a shape of a top surface of a truncated pyramid; forming the truncated pyramid by subjecting the substrate to isotropic etching using the etching mask as a mask member; stopping the isotropic etching when an area of the top surface reaches an area capable of generating near-field light; and forming a metal film on at least some of the side surfaces of the truncated pyramid by allowing film forming particles to enter into a space between the etching mask and the side surfaces and adhere onto the truncated pyramid. The directivity of the film forming particles is controlled so that the metal film has a thickness that is reduced gradually from a bottom of the truncated pyramid toward the top surface.