Abstract: A method for fabricating a semiconductor light-emitting element according to the present invention includes the steps of (A) providing a striped masking layer on a first Group III-V compound semiconductor, (B) selectively growing a second Group III-V compound semiconductor over the entire surface of the first Group III-V compound semiconductor except a portion covered with the masking layer, thereby forming a current confining layer that has a striped opening defined by the masking layer, (C) selectively removing the masking layer, and (D) growing a third Group III-V compound semiconductor to cover the surface of the first Group III-V compound semiconductor, which is exposed through the striped opening, and the surface of the current confining layer.

Abstract: Methods of fabricating comb drive devices utilizing one or more sacrificial etch-buffers are disclosed. An illustrative fabrication method may include the steps of etching a pattern onto a wafer substrate defining one or more comb drive elements and sacrificial etch-buffers, liberating and removing one or more sacrificial etch-buffers prior to wafer bonding, bonding the etched wafer substrate to an underlying support substrate, and etching away the wafer substrate. In some embodiments, the sacrificial etch-buffers are removed after bonding the wafer to the support substrate. The sacrificial etch-buffers can be provided at one or more selective regions to provide greater uniformity in etch rate during etching. A comb drive device in accordance with an illustrative embodiment can include a number of interdigitated comb fingers each having a more uniform profile along their length and/or at their ends, producing less harmonic distortion during operation.

Abstract: A method for manufacturing a semiconductor laser device is provided in which deformation of a cap layer and a third cladding layer is inhibited and a protruding portion of an intermediate layer is removed. By coating outer peripheral portions facing an intermediate layer of a third cladding layer and an etching stop layer with a resist, inevitably removing at least the third cladding layer, and etching the intermediate layer and a cap layer in a second etching step, a protruding portion of the intermediate layer is removed, and the cap layer is prevented from being etched undesirably, whereby a ridge portion without irregularities with respect to a direction substantially perpendicular to a lamination direction is produced, and increase of an operation voltage and decrease of external differential quantum efficiency are prevented.

Abstract: An inkjet printhead chip includes electrostatic discharge (ESD) circuits to protect the chip during ESD events, including one preventing a thin dielectric layer on a substrate from breakdown. In one embodiment, the chip includes an ESD circuit essentially dedicated per each actuator. In another, ESD circuits alternate connection between power and ground. In still another, actuators are approximately equidistantly spaced regarding respective ESD circuits. Exemplary ESD circuits include a ballast resistor in series with a diode. In turn, diodes are either forward biased toward power or away from ground. In a thermal inkjet embodiment, a cavitation layer above a resistor and dielectric layer have pluralities of fingers connecting the cavitation layer to a metal buss. The metal buss attaches to the ballast resistors. Protection typically embodies the safe distribution of ESD current to ground during both chip manufacture and user printhead installation. Inkjet printheads and printers are also disclosed.

Abstract: The method for manufacturing a semiconductor laser element according to the present invention has the steps of: forming a semiconductor laminated structure having an active layer composed of a semiconductor material containing Al; etching the semiconductor laminated structure to form a mesa; forming a first burying layer at a first growing temperature so as to coat the side of the mesa; and forming a second burying layer at a second growing temperature higher than the first growing temperature on the first burying layer to bury the circumference of the mesa.

Abstract: Methods are disclosed generally directed to design and synthesis of quantum dot nanoparticles having improved uniformity and size. In a preferred embodiment, a release layer is deposited on a semiconductor wafer. A heterostructure is grown on the release layer using epitaxial deposition techniques. The heterostructure has at least one layer of quantum dot material, and optionally, one or more layers of reflective Bragg reflectors. A mask is deposited over a top layer and reactive ion-beam etching applied to define a plurality of heterostructures. The release layer can be dissolved releasing the heterostructures from the wafer. Some exemplary applications of these methods include formation of fluorophore materials and high efficiency photon emitters, such as quantum dot VCSEL devices. Other applications include fabrication of other optoelectronic devices, such as photodetectors.

Abstract: Memory elements including a first electrode and a second electrode. A chalcogenide material layer is between the first and second electrodes and a tin-chalcogenide layer is between the chalcogenide material layer and the second electrode. A selenide layer is between the tin-chalcogenide layer and the chalcogenide material layer. Optionally, a metal layer, for example a silver layer, is between the tin-chalcogenide layer and the second electrode. Methods for forming the memory elements are also provided.

Abstract: A process of manufacturing a semiconductor device includes the steps of forming a stacked structure of a first III-V compound semiconductor layer containing In and having a composition different from InP and a second III-V compound semiconductor layer containing In. The second III-V compound semiconductor layer is formed over the first III-V compound semiconductor layer and growing an InP layer at regions adjacent the stacked structure to form a stepped structure of InP. The process further includes the step of wet-etching the stepped structure and the second III-V compound semiconductor layer using an etchant containing hydrochloric acid and acetic acid to remove at least the second III-V compound semiconductor layer.

Abstract: A photonic integrated device using a reverse-mesa structure and a method for fabricating the same are disclosed. The photonic integrated device includes a first conductive substrate on which a semiconductor laser, an optical modulator, a semiconductor optical amplifier, and a photo detector are integrated, a first conductive clad layer and an active layer sequentially formed on the first conductive substrate in the form of a mesa structure, a second conductive clad layer formed on the active layer in the form of a reverse-mesa structure, an ohmic contact layer formed on the second clad layer in such a manner that the ohmic contact layer has a width narrower than the width of an upper surface of the second conductive clad layer, a current shielding layer filled in a sidewall having a mesa and reverse-mesa structure, and at least one window area formed between the above elements.

Abstract: An improved n-channel integrated lateral DMOS (10) in which a buried body region (30), beneath and self-aligned to the source (18) and normal body diffusions, provides a low impedance path for holes emitted at the drain region (16). This greatly reduces secondary electron generation, and accordingly reduces the gain of the parasitic PNP bipolar device. The reduced regeneration in turn raises the critical field value, and hence the safe operating area.

Abstract: Processes for effecting thermal transfer of electroactive organic material are disclosed wherein unwanted portions of a layer of electroactive organic material supported by a donor element are removed or transferred from the layer by thermal transfer, particularly laser-induced thermal transfer, leaving a desired pattern of the electroactive organic material on the donor element. The electroactive organic material may be an organic material exhibiting electroluminescence, charge transport, charge injection, electrical conductivity, semiconductivity and/or exciton blocking. The layer of electroactive organic material may comprise more than one layer of different types of electroactive organic material. The exposure pattern is a negative image of the desired pattern. The electroactive organic material of the desired pattern is not, therefore, exposed to the heat which can cause decomposition.

Abstract: A method of forming a semiconductor structure includes forming an isolation region in a semiconductor substrate. A first oxide layer is on the substrate, a first sacrificial layer is on the first oxide layer, and a first nitride layer is on the first sacrificial layer. The first oxide layer may be a screen oxide layer, and the method provides consistency in the thickness of the screen oxide layer.

Abstract: Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.

Abstract: The present invention is a nitride compound semiconductor laser, in which a cleaved end face is flat, and a breakdown of a laser end face induced during an operation can be suppressed, which consequently enables a life to be prolonged. In the nitride compound semiconductor laser, a stress concentration suppression layer is formed between an active layer and a cap layer.

Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

Abstract: A semiconductor chip, particularly a radiation-emitting semiconductor chip, comprises an active thin-film layer in which a photon-emitting zone is formed, and a carrier substrate for the thin-film layer is arranged at a side of the thin-film layer faces away from the emission direction and is connected to it. At least one cavity via which a plurality of mesas is fashioned at the boundary between carrier substrate and thin-film layer is fashioned in the active thin-film layer proceeding from the carrier substrate.

Abstract: An active semiconductor device, such as, buried heterostructure semiconductor lasers, LEDs, modulators, photodiodes, heterojunction bipolar transistors, field effect transistors or other active devices, comprise a plurality of semiconductor layers formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III–V compound, i.e., an Al-III–V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III–V layer. An example of a material system for this invention useful at optical telecommunication wavelengths is InGaAsP/InP where the Al-III–V layer comprises InAlAs:O or InAlAs:O:Fe.

Abstract: The invention relates to composite articles comprising a substrate and additional layers on the substrate. According to one example, the layers are selected so that the difference in the coefficient of thermal expansion (CTE) between the substrate and a first layer on one side of the substrate is substantially equal to the CTE difference between the substrate and a second layer on the other side of the substrate. The stress caused by the CTE difference and/or shrinkage on one side of the substrate during heating or cooling is balanced by the stress caused by the CTE difference on the other side of the substrate during heating or cooling. Such stress balancing can reduce or minimize curling of the substrate.

Abstract: To improve crystallographic property of a nitride III-V compound semiconductor layer grown on a sapphire substrate, a plurality of recesses are made on a major surface of the sapphire substrate, and the nitride III-V compound semiconductor layer is grown thereon. At least a part of the inner surface of each recess makes an angle not less than 10 degrees with respect to the major surface of the sapphire substrate. The recesses are buried with nitride III-V compound semiconductor crystal having a higher Al composition ratio than the nitride III-V compound semiconductor layer, such as AlxGa1-xN crystal whose Al composition ratio x is 0.2 or more, for example. Each recess has a depth not less than 25 nm and a width not less than 30 nm. The recesses may be made either upon thermal cleaning of the sapphire substrate or by using lithography and etching, thermal etching, or the like.

Abstract: A depression is formed from a first surface of a semiconductor substrate. An insulating layer is provided on the bottom surface and an inner wall surface of the depression. A conductive portion is provided inside the insulating layer. A second surface of the semiconductor substrate is etched by a first etchant having characteristics such that the etching amount with respect to the semiconductor substrate is greater than the etching amount with respect to the insulating layer, and the conductive portion is caused to project while covered by the insulating layer. At least a portion of the insulating layer formed on the bottom surface of the depression is etched with a second etchant having characteristics such that at least the insulating layer is etched without forming a residue on the conductive portion, to expose the conductive portion.

Abstract: A semiconductor laser element capable of reducing the contact resistance and the thermal resistance and realizing a high reliability is provided. The semiconductor laser element includes: a semiconductor substrate, an active layer formed on the semiconductor substrate, a ridge having a clad layer formed on the active layer and a contact layer formed on the clad layer, an insulation film covering the side surfaces of the clad layer, and an electrode connected to the contact layer, wherein the insulation layer has an end portion in the ridge thickness direction located between the upper surface and the lower surface of the contact layer.

Abstract: The method for manufacturing a CMOS image sensor is employed to pattern uniformly an overlying layer on a gate structure regardless of a gate width. The method includes steps of: preparing a semiconductor substrate by a predetermined process where a pixel area, a peripheral area and an input/output (I/O) area are defined by FOX therebetween; forming a first, a second and a third gate structures in the pixel, the peripheral and the I/O areas, respectively; forming a salicide barrier layer and a BARC layer over the resultant structure in sequence; forming a first photoresist mask on the BARC layer in the I/O area; carrying out a first etchback process by using the first photoresist mask as an etch mask; forming a second photoresist mask on the BARC layer in the pixel area; carrying out a second etchback process by using the second photoresist mask as the etch mask; and carrying out a third etchback process so as to expose top faces of the first and the second gate structures.

Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

Abstract: Methods of forming a tapered evanescent coupling region for use with a relatively thin silicon optical waveguide formed with, for example, an SOI structure. A tapered evanescent coupling region is formed in a silicon substrate that is used as a coupling substrate, the coupling substrate thereafter joined to the SOI structure. A gray-scale photolithography process is used to define a tapered region in photoresist, the tapered pattern thereafter transferred into the silicon substrate. A material exhibiting a lower refractive index than the silicon optical waveguide layer (e.g., silicon dioxide) is then used to fill the tapered opening in the substrate. Advantageously, conventional silicon processing steps may be used to form coupling facets in the silicon substrate (i.e., angled surfaces, V-grooves) in an appropriate relation to the tapered evanescent coupling region.

Abstract: A nitride-based laser diode structure utilizing a metal-oxide (e.g., Indium-Tin-Oxide (ITO) or Zinc-Oxide (ZnO)) in place of p-doped AlGaN to form the upper cladding layer. An InGaN laser diode structure utilizes ITO upper cladding structure, with an SiO2 isolation structure formed on opposite sides of the ITO upper cladding structure to provide a lateral index step that is large enough to enable lateral single-mode operation. The lateral index step is further increased by slightly etching the GaN:Mg waveguide layer below the SiO2 isolation structure. An optional p-type current barrier layer (e.g., AlGaN:Mg having a thickness of approximately 20 nm) is formed between the InGaN-MQW region and a p-GaN upper waveguide layer to impede electron leakage from the InGaN-MQW region.

Abstract: A surface optical apparatus that includes a surface optical device with p-side and n-side electrodes, such as a surface emitting laser, a first substrate for supporting the surface optical device directly or through an elastic supporter formed of one or plural layers, and a first electrode wiring of at least a wire formed on the first substrate and electrically connected to one of the electrodes. A current is injected into or a voltage is applied across the surface optical device through the first electrode wiring and the p-side and n-side electrodes. A photodetector for detecting light from the surface optical device may also be arranged in the vicinity of the optical device.

Abstract: A light emitting diode device has a body having a recess. The body comprises a pair of half bodies made of metal, an insulation layer provided between the half bodies. An LED is mounted on a bottom of the recess and connected with the half bodies by bumps. The recess is closed by a transparent sealing plate.

Abstract: A manufacturing method for an optical integrated circuit including a spatial reflection type structure having a perpendicular end surface and an inclined surface formed in an optical waveguide layer. The manufacturing method includes the steps of applying a first photoresist to the upper surface of the optical waveguide layer, removing the first photoresist except a portion corresponding to the inclined surface, and heating the first preferred embodiment to a given temperature to melt the first photoresist at least partially and deform the first photoresist by surface tension, thereby forming a first mask having an inclined shape.

Abstract: A titanium layer and a titanium nitride layer are successively laminated on a substrate and a group III nitride compound semiconductor layer is further formed thereon. When the titanium layer is removed in the condition that a sufficient film thickness is given to the titanium nitride layer, a device having the titanium nitride layer as a substrate is obtained.

Abstract: A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.

Abstract: In the manufacture of a semiconductor laser device, sequentially grown on a sapphire substrate in the following order are a buffer layer, a first undoped GaN layer, a first super lattice defect reducing layer, a second undoped GaN layer, a second super lattice defect reducing layer, a third undoped GaN layer, a third super lattice defect reducing layer and a fourth undoped GaN layer. A device structure is then formed thereon. The first to third super lattice defect reducing layers each include five pairs of InGaN and AlGaN films alternately placed on one another in this order.

Abstract: A method is disclosed of forming tapered drain-to-anode connectors in a back plane of an active matrix OLED device. The method is also used in forming laterally spaced anode layers in contact with respectively corresponding drain-to-anode connectors.

Abstract: A monolithic semiconductor optical device with excellent temperature and modulation characteristics and associated method of manufacturing whereby the device has a semiconductor substrate, a semi-insulating buried heterostructure GaInAsP-based DFB laser; and either a buried ridge type AlGaInAs-based EA or a self aligned structure (SAS) AlGaInAs-based EA modulator.

Abstract: A semiconductor laser includes an active layer stripe including a first semiconductor layer, an active layer, and a second semiconductor layer that are laminated in that order on a substrate and formed into a stripe-shape; a burying layer in which the active layer stripe is buried; and a contact layer formed on the burying layer. The semiconductor laser further includes a monitor stripe that is formed in parallel to the active layer stripe and is composed of the first semiconductor layer only at an output end of the laser, the monitor stripe is buried in the burying layer on which the contact layer is formed, and the active layer stripe and the monitor stripe are isolated electrically by an isolation groove. The width of the active layer stripe can be controlled easily based on the width of the active layer in the monitor stripe as a criterion.

Abstract: The invention intends to provide a TFT having a gate insulating film which has a high dielectric withstand voltage and can ensure a desired carrier mobility in an adjacent semiconductor active film. A gate electrode and a semiconductor active film are formed on a transparent substrate with a gate insulating film, which is formed of two layered insulating films, held between them. The gate insulating film is made up of a first gate insulating film which improves a withstand voltage between the gate electrode and the semiconductor active film, and a second gate insulating film which improves an interface characteristic between the gate insulating film and the semiconductor active film. The first and second gate insulating films are each formed of a SiNx film. The optical band gap of the first gate insulating film has a value in the range of 3.0 to 4.5 eV, and the optical band gap of the second gate insulating film has a value in the range of 5.0 to 5.3 eV.

Abstract: A method of forming a vertical cavity surface emitting laser (100, 600, 900) includes process steps for self-aligning the p-type ohmic contact (118, 518, 932), an oxide current aperture (122, 926a), and a central puck of re-phase material (560a, 936) around the optical axis of the laser.

Abstract: A ring-type laser including a traveling wave cavity which incorporates at least first and second straight cavity sections and at least one curved cavity section. Corresponding first ends of the straight cavity sections are interconnected at a first light-emitting facet, and second ends of the straight sections are interconnected by the curved waveguide. Additional curved and straight sections can be linked to provide various ring configurations.

Abstract: A wafer bumping method comprising the following steps of. A wafer having fields is provided. The wafer having at least one wafer identification character formed thereon within one or more of the fields. A dry film resist is formed over the wafer. Portions of the dry film resist are selectively exposed field by field using a mask whereby the mask is shifted over the one or more fields containing the at least one wafer identification character so that the one or more fields containing the at least one wafer identification character is double exposed after the mask shift so that all of the one or more fields containing the at least one wafer identification character is completely exposed. The selectively exposed dry film resist is developed to remove the non-exposed portions of the dry film resist.

Abstract: In a method for manufacturing an optical waveguide, a core layer is formed on a clad layer, and a stepped portion in formed in the core layer. Then, a planar layer is formed on the core layer so that the planar layer completely covers the stepped portion of the core layer. Finally, the planar layer and the core layer are etched, so that the planar layer is completely removed and the core layer is converted into a tapered core layer.

Abstract: According to the present invention, of the resist film applied to the entire surface of the silicon substrate, the part on the electrode pattern is removed and an opening shaped like a dish in which the diameter of the upper part is larger than that of the lower part is formed, wherein the diameter of the lower part is smaller than the outer diameter of the electrode pattern. The electrode pattern exposed at the bottom of the opening is removed by the etching process. Next, the silicon substrate is tilted and a laser beam is irradiated toward the silicon substrate exposed at the bottom of the opening with water running over the surface of the resist film in air, and a hole is formed.

Abstract: A method of forming a semiconductor device may include forming a semiconductor layer on a substrate, and forming a contact layer on the semiconductor layer opposite the substrate. After forming the semiconductor layer and the contact layer, the contact layer and the semiconductor layer may be patterned such that the semiconductor layer includes a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate and so that the patterned contact layer is on the mesa surface. Related structures and devices are also discussed.

Abstract: This invention provides a top-emitting OLED display device that includes a substrate; an array of OLED elements disposed on one side of the substrate; and a desiccant material provided in a patterned arrangement over the array of OLED elements on the same side of the substrate such that the desiccant material does not interfere with the light emitted by the OLED elements.

Abstract: Disclosed is a method for manufacturing a tapered optical waveguide through which waveguides of different sizes are connected with each other optically. In the method, a photo-resist pattern having an inclined profile is formed on the core layer by means of a gray-scale mask, then the profile of the tapered waveguide can be precisely controlled by controlling the profile of the photo-resist pattern and the etching-selection ratio between the photo-resist and the core layer.

Abstract: An embodiment of the invention is semiconductor material, 2, having interconnect insulating material, 9, that contains fullerenes, 11. Another embodiment of the invention is a method of templating the voids in a semiconductor interconnect insulator, 9, by adding fullerenes, 11, to dielectric material, 10.

Abstract: In a static induction transistor, in addition to a first gate layer (4), a plurality of second gate layers (41) having a shallower depth and a narrower gap therebetween than those of the first gate layer (4) are provided in an area surrounded by the first gate layer (4), thereby an SiC static induction transistor with an excellent off characteristic is realized, while ensuring a required processing accuracy during production thereof.

Abstract: A light emitting display comprising a first electrode layer on a substrate. The electrode layer is patterned to form a plurality of laterally spaced apart strips in a first direction. A plurality of spacedly disposed light emitting organic elements with a second electrode layer atop are disposed on the first electrode layer in a second direction. An undercut structure made of an undercut pattern transfer layer and an overlaying pattern transfer layer. The undercut structure is disposed between the plurality of spacedly disposed light emitting organic elements. A light emitting display having a color isolation well. The color isolation well is characterized by a first well layer and a second well layer in which the first well layer matches a property of an emissive polymer or small molecule dye held by the well whereas the second well layer does not match the property.

Abstract: A method of manufacturing a semiconductor optical device comprising the steps of: providing a substrate having an active layer thereon; providing an aluminium-bearing layer, the aluminium bearing layer being adjacent the active layer; and oxidising the aluminium-bearing layer substantially entirely.

Abstract: An active-matrix type organic EL display which uses transistors with less variation of characteristics (transistors in which active layer is a single crystal semiconductor) is made on a large area of a transparent base board at low cost. Plural unit of fine construction are formed on a silicon wafer in rows. This unit includes a driving element (switching transistor 34, driving transistor 37, capacity 36) of organic EL element (pixel) 35. Unit block 39 is produced by dividing this silicon wafer. This unit block 39 is disposed at a predetermined position of glass base board 52 (display base board). The driving element of each pixel 35 is connected by signal line 31, power supply line 32, scanning line 33, and capacity line 38.

Abstract: This invention provides novel methods of fabricating novel gated field emission structures that include aligned nanowire electron emitters (individually or in small groups) localized in central regions within gate apertures. It also provides novel devices using nanoscale emitters for microwave amplifiers, electron-beam lithography, field emission displays and x-ray sources.

Abstract: A method for processing one-dimensional nano-materials includes the following steps: providing a substrate (11); forming one-dimensional nano-materials (12) on the substrate, the one-dimensional nano-materials being substantially parallel to each other and each being substantially perpendicular to the substrate, the one-dimensional nano-materials cooperatively defining a top surface distal from the substrate; and applying physical energy (14) by means of a high-energy pulse laser beam to the top surface of the one-dimensional nano-materials. The resulting one-dimensional nano-materials have sharp, tapered tips (15, 15′). Distances between adjacent tips are approximately uniform, and are relatively large. This reduces shielding between adjacent one-dimensional nano-materials. The tips also contribute to a decreased threshold voltage required for field emission by the one-dimensional nano-materials.