Abstract: A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.

Abstract: A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.

Abstract: A light emitting device having improved light extraction is provided. The light emitting device can be formed by epitaxially growing a light emitting structure on a surface of a substrate. The substrate can be scribed to form a set of angled side surfaces on the substrate. For each angled side surface in the set of angled side surfaces, a surface tangent vector to at least a portion of each angled side surface in the set of angled side surfaces forms an angle between approximately ten and approximately eighty degrees with a negative of a normal vector of the surface of the substrate. The substrate can be cleaned to clean debris from the angled side surfaces.

Abstract: According to one embodiment, a nitride semiconductor stacked structure having a first surface includes a substrate, a first buffer layer, a first crystal layer, a second buffer layer and a second crystal layer. A step portion is provided in the substrate and includes an upper surface, a lower surface, and a side surface between the upper surface and the lower surface. The first buffer layer includes InsAltGa1-s-tN (0?s?0.05, 0?t?1) and covers the lower surface and the side surface. The first crystal layer is provided on the first buffer layer, includes InsAltGa1-s-tN (0?s?0.05, 0?t?0.05), and has an upper surface provided above the upper surface of the substrate. The second buffer layer includes InsAltGa1-s-tN (0?s?0.05, 0?t?1) and continuously covers the upper surface of the first crystal layer and the upper surface of the substrate. The second crystal layer covers the second buffer layer, includes InsAltGa1-s-tN (0?s?0.05, 0?t?0.05), and has the first surface.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer having a C-plane as a growth surface, and unevenness in an upper surface; and a second nitride semiconductor layer formed on the first nitride semiconductor layer to be in contact with the unevenness, and having p-type conductivity. The second nitride semiconductor layer located directly on a sidewall of the unevenness has a p-type carrier concentration of 1×1018/cm3 or more.

Abstract: A photodiode array for near infrared rays that includes photodiodes having a uniform size and a uniform shape, has high selectivity for the wavelength of received light between the photodiodes, and has high sensitivity with the aid of a high-quality semiconducting crystal containing a large amount of nitrogen, a method for manufacturing the photodiode array, and an optical measurement system are provided. The steps of forming a mask layer 2 having a plurality of openings on a first-conductive-type or semi-insulating semiconductor substrate 1, the openings being arranged in one dimension or two dimensions, and selectively growing a plurality of semiconductor layers 3a, 3b, and 3c including an absorption layer 3b in the openings are included.

Abstract: A method for fabricating a semiconductor lighting chip includes steps of: providing a substrate; forming a first etching layer on the substrate; forming a connecting layer on the first etching layer; forming a second etching layer on the connecting layer; forming a lighting structure on the second etching layer; and etching the first etching layer, the connecting layer, the second etching layer and the lighting structure, wherein an etching rate of the first etching layer and the second etching layer is lager than that of the connecting layer and the lighting structure, thereby to form the connecting layer and the lighting structure each with an inverted frustum-shaped structure.

Abstract: An optoelectronic component with three-dimension quantum well structure and a method for producing the same are provided, wherein the optoelectronic component comprises a substrate, a first semiconductor layer, a transition layer, and a quantum well structure. The first semiconductor layer is disposed on the substrate. The transition layer is grown on the first semiconductor layer, contains a first nitride compound semiconductor material, and has at least a texture, wherein the texture has at least a first protrusion with at least an inclined facet, at least a first trench with at least an inclined facet and at least a shoulder facet connected between the inclined facets. The quantum well structure is grown on the texture and shaped by the protrusion, the trench and the shoulder facet.

Abstract: An LED includes a substrate, a first n-type GaN layer, a connecting layer, a second n-type GaN layer, a light emitting layer, and a p-type GaN layer. The first n-type GaN layer, the connecting layer, and the second n-type GaN layer are formed on the substrate in sequence. The connecting layer is etchable by alkaline solution, and a bottom surface of the second n-type GaN layer facing towards the connecting layer has a roughed exposed portion. The GaN on the bottom surface of the second n-type GaN layer is N-face GaN. A top surface of the second n-type GaN layer facing away from the connecting layer includes a first area and a second area. The light emitting layer and the p-type GaN layer are formed on the first area of the top surface of the second n-type GaN layer in sequence.

Abstract: The present invention provides a method of fabricating a light emitting diode chip having an active layer between an N type semiconductor layer and a P type semiconductor layer. The method comprises the steps of preparing a substrate; laminating the semiconductor layers on the substrate, the semiconductor layers having the active layer between the N type semiconductor layer and the P type semiconductor layer; and forming grooves on the semiconductor layers laminated on the substrate until the substrate is exposed, whereby inclined sidewalls are formed by the grooves in the semiconductor layers divided into a plurality of chips. According to embodiments of the present invention, a sidewall of a semiconductor layer formed on a substrate of a light emitting diode chip is inclined with respect to the substrate, whereby its directional angle is widened as compared with a light emitting diode chip without such inclination.

Abstract: A method of fabricating semiconductor light emitting device forms a laminated film by laminating an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer in order on a uneven main surface of a first substrate, forms a plurality of first electrodes, on an upper surface of the p-type nitride semiconductor layer, forms a first metal layer to cover surfaces of the plurality of first electrodes and the p-type nitride semiconductor layer, forms a second metal layer on an upper surface of the second substrate, joins the first and second metal layers by facing the first and second substrates, cuts the first substrate or forming a groove on the first substrate along a border of the light emitting element from a surface side opposite to the first metal layer on the first substrate, and irradiates a laser toward areas of the light emitting devices from a surface side opposite to the first metal layer on the first substrate to peel off the first substrate.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: An embodiment of the present invention improves the fabrication and operational characteristics of a type-II superlattice material. Layers of indium arsenide and gallium antimonide comprise the bulk of the superlattice structure. One or more layers of indium antimonide are added to unit cells of the superlattice to provide a further degree of freedom in the design for adjusting the effective bandgap energy of the superlattice. One or more layers of gallium arsenide are added to unit cells of the superlattice to counterbalance the crystal lattice strain forces introduced by the aforementioned indium antimonide layers.

Abstract: A method for producing a Group III-V semiconductor device, includes forming, on a base, a plurality of semiconductor devices isolated from one another, forming, through ion implantation, a high-resistance region in a surface layer of a side surface of each semiconductor device, after formation of the high-resistance region, forming a p-electrode and a low-melting-point metal diffusion prevention layer on the top surface of the semiconductor device, bonding the semiconductor device to a conductive support substrate via a low-melting-point metal layer, and removing the base through the laser lift-off process.

Abstract: A method of fabricating a light emitting device comprising: providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface, forming a plurality of light emitting stack layers on the first major surface, forming an etching protection layer on the plurality of light emitting stack layers, forming a plurality of discontinuous holes or continuous lines on the substrate by a laser beam with the depth of 10˜150 ?m, cleaving the substrate through the plurality of discontinuous holes or continuous lines, providing a adhesion layer on the second major surface of the substrate, and expanding the adhesion layer to form a plurality of separated light emitting device.

Abstract: The present invention provides a nitride semiconductor light-emitting device capable of preventing shortening of the device lifetime due to increase in the driving voltage of the device and internal heat generation, and also providing uniform laser characteristics, even if the device has a ridge stripe structure. On a GaN substrate 1, an n-type GaN layer 2, an n-type AlGaN layer 3, an active layer 4, a p-type AlGan layer 5 and a p-type GaN layer 6 are laminated sequentially. On the p-type GaN layer 6, an insulating film 7 and a transparent electrode 8 are formed. A portion of the transparent electrode 8 is formed in contact with the p-type GaN layer 6. A ridge stripe portion D to form a waveguide is configured of a transparent film 9. A region, where the transparent electrode 8 and the p-type GaN layer 6 are in contact with each other, serves as a stripe-shaped current injection region.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: In a semiconductor device fabricated by growing a compound semiconductor layer on a sapphire substrate, a sapphire substrate enabling the semiconductor device to have a high light-extraction efficiency is provided. A plurality of projections 2, 2, . . . are provided at random on a surface of a sapphire substrate 1, and a GaN layer 10 is grown on this surface. Then, a multi-quantum well layer 12, a p-AlGaN layer 14, a p-GaN layer 16, and an ITO layer 18 are formed on the GaN layer 10, and two electrodes 21 and 22 are also formed. In this manner, a semiconductor light-emitting device is fabricated.

Abstract: The present invention provides a method (80) for manufacturing a semiconductor tip. The method comprises obtaining (81) a substrate provided with a layer of tip material, providing (82) a doping profile in the layer of tip material, the doping profile comprising a tapered-shaped region of a first dopant concentration, undoped or lightly doped, e.g. having a dopant concentration of 1017 cm?3 or lower, surrounded by a region of a second dopant concentration, highly doped, e.g. having a dopant concentration above 1017 cm?3, the first dopant concentration being lower than the second dopant concentration, and isotropically etching (83) the layer of tip material by using an etch chemistry for which the etch rate of tip material with the second dopant concentration is substantially higher than the etch rate of the tip material with the first dopant concentration.

Abstract: A process for manufacturing buried hetero-structure laser diodes includes the steps of forming a stacked semiconductor layer on a substrate; forming a mask layer on the stacked semiconductor layer; forming a semiconductor mesa by etching the stacked semiconductor layer through the mask layer; forming an overhang of the mask layer by selectively etching the stacked semiconductor layer of the semiconductor mesa; selectively growing a buried layer on a side surface of the semiconductor mesa while leaving the mask layer on the semiconductor mesa; forming a lateral portion of the buried layer, the lateral portion having a side surface adjacent to the side surface of the semiconductor mesa; after forming the lateral portion of the buried layer, removing the mask layer on the semiconductor mesa; and forming an electrode on a top surface of the semiconductor mesa and on the side surface of the lateral portion of the buried layer.

Abstract: The present disclosure provides a method of fabricating that includes providing a semiconductor substrate; forming a gate structure on the substrate; performing an implantation process to form a doped region in the substrate; forming spacers on sidewalls of the gate structure; performing an first etching to form a recess in the substrate, where the first etching removes a portion of the doped region; performing a second etching to expand the recess in the substrate, where the second etching includes an etchant and a catalyst that enhances an etching rate at a remaining portion of the doped region; and filling the recess with a semiconductor material.

Abstract: A method of fabricating a frontside-illuminated inverted quantum well infrared photodetector may include providing a quantum well wafer having a bulk substrate layer and a quantum material layer, wherein the quantum material layer includes a plurality of alternating quantum well layers and barrier layers epitaxially grown on the bulk substrate layer. The method further includes applying at least one frontside common electrical contact to a frontside of the quantum well wafer, bonding a transparent substrate to the frontside of the quantum well wafer, thinning the bulk substrate layer of the quantum well wafer, and etching the quantum material layer to form quantum well facets that define at least one pyramidal quantum well stack. A backside electrical contact may be applied to the pyramidal quantum well stack. In one embodiment, a plurality of quantum well stacks is bonded to a read-out integrated circuit of a focal plane array.

Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.

Abstract: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED), wherein light passes through electrically conductive ZnO. Flat and clean surfaces are prepared for both the (Al, Ga, In)N and ZnO wafers. A wafer bonding process is then performed between the (Al, Ga, In)N and ZnO wafers, wherein the (Al, Ga, In)N and ZnO wafers are joined together and then wafer bonded in a nitrogen ambient under uniaxial pressure at a set temperature for a set duration. After the wafer bonding process, ZnO is shaped for increasing light extraction from inside of LED.

Abstract: A manufacturing method of nitride semiconductor light emitting elements, which can reliably form a mechanically stable wiring electrode leading from a light emitting element surface. A structure protective sacrifice layer is formed around a first electrode layer on a device structure layer beforehand, and after separation of the device structure layer into respective portions for the light emitting elements, the resultant is stuck to a support substrate. Subsequently, forward tapered grooves reaching the structure protective sacrifice layer are formed, and the inverse tapered portion formed outward of the forward tapered groove is lifted off in a lift-off step. Thus, an insulating layer is formed on the forward tapered side walls of the light emitting element, and a wiring electrode layer electrically connected to the second electrode layer on the principal surface of the light emitting element is formed on the insulating layer.

Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.

Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: An optoelectronic semiconductor chip is specified, which has an active zone (20) containing a multi quantum well structure provided for generating electromagnetic radiation, which comprises a plurality of successive quantum well layers (210, 220, 230). The multi quantum well structure comprises at least one first quantum well layer (210), which is n-conductively doped and which is arranged between two n-conductively doped barrier layers (250) adjoining the first quantum well layer. It comprises a second quantum well layer (220), which is undoped and is arranged between two barrier layers (250, 260) adjoining the second quantum well layer, of which one is n-conductively doped and the other is undoped. In addition, the multi quantum well structure comprises at least one third quantum well layer (230), which is undoped and which is arranged between two undoped barrier layers (260) adjoining the third quantum well layer.

Abstract: A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive layer is formed over the first insulating layer. A first interconnect structure is formed over the first insulating layer and first conductive layer. A temporary carrier is mounted to the first interconnect structure. A second active device is formed on a second side of the semiconductor wafer. A second insulating layer is formed over the second side of the wafer. A second conductive layer is formed over the second insulating layer. A second interconnect structure is formed over the second insulating layer and second conductive layer. The temporary carrier is removed, leaving a double-sided semiconductor device. The double-sided semiconductor device is enclosed in a package with the first and second interconnect structures electrically connected.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.

Abstract: The present invention provides a method for the controlled synthesis of nanostructures on the edges of electrodes and an apparatus capable of optical and electrochemical sensing. In accordance with the present invention, a method of fabricating nanowires is provided. In one embodiment, the method includes providing a substrate, creating a dielectric thereon, depositing a metal catalyst on the dielectric, patterning the metal catalyst, selectively etching dielectric, creating an electric field originating in metal catalyst, and applying a heat treatment. In another embodiment, the method includes providing a substrate, depositing a dielectric thereon, printing a metal catalyst on the dielectric and plastic substrate, printing silicide along the edges of metal catalyst, creating an electric field originating in metal catalyst; and applying chemical vapor deposition.

Abstract: A method for manufacturing a nitride semiconductor laser element having a nitride semiconductor layer including at least an active layer provided on a substrate, a pair of cavity planes formed on the nitride semiconductor layer, and a protruding part where part of the substrate protrudes from said cavity plane, said method comprises: a step of forming the nitride semiconductor layer on the substrate; a first etching step of forming a first groove by etching at least the nitride semiconductor layer; and a second etching step of forming the cavity plane, in the second etching step, the inner wall of the first groove and part of the nitride semiconductor layer surface adjacent to the first groove are etched to form a second groove, and form the upper face of the protruding part.

Abstract: Disclosed is a quantum-dot LED and fabrication method thereof. The quantum-dot LED includes: a substrate; a n-type semiconductor layer formed on the substrate; an insulator layer formed on the n-type semiconductor layer and provided with a plurality of holes; quantum dots formed by filling the holes; and a p-type semiconductor layer formed on the insulator layer in which the quantum dots are formed. According to the inventive LED, the size and density of the quantum dots are controllable to thereby make the property control of the LED easy. Also, since it can be anticipated that the LED has a high internal quantum efficiency compared with the conventional LED using quantum well, high light emitting efficiency can be obtained.

Abstract: The present invention relates to a surface-emitting semiconductor laser having a vertical resonator, comprising a substrate base section (1) and a mesa (M) arranged on and/or at the substrate base section, the mesa substantially comprising, viewed perpendicular to the substrate base section: at least one part of a first doting region (2) facing the substrate base section, at least one part of a second doping region (4) facing away from the substrate base section, and an active region (3) arranged between the first and the second doping regions, said active region having at least one active layer (A) with a laser-emitting zone, emitting substantially perpendicular to the active layer, characterized in that the mesa (M) comprises in at least one partial section of the side flank thereof at least one constriction (E).

Abstract: A semiconductor light-emitting device with a new layer structure is disclosed, where the current leaking path is not caused to enhance the current injection efficiency within the active layer. The device provides a mesa structure containing active layer and a p-type lower cladding layer on a p-type substrate and a burying layer doped with iron (Fe) to bury the mesa structure, where the burying layer shows a semi-insulating characteristic. The device also provides an n-type blocking layer arranged so as to cover at least a portion of the p-type buffer lower within the mesa structure. The n-type blocking layer prevents the current leaking from the burying layer to the p-type buffer layer, and the semi-insulating burying layer that covers the rest portion of the mesa structure not covered by the n-type blocking layer prevents the current leaking from the n-type blocking layer to the n-type cladding layer within the mesa structure.

Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.

Abstract: An organic light emitting device includes a transistor having gate, source, and drain electrodes, and first electrode connected to one of the source or drain electrodes. The device also includes an emitting layer positioned on the first electrode and a second electrode positioned on the emitting layer. Each of the source and drain electrodes includes first, second, and third layers having different tapered angles. The first electrode may include a metallic layer and a conductive layer, with a tapered angle of the metallic layer being different from a tapered angle of the conductive layer.

Abstract: The present invention provides a method of fabricating a light emitting diode chip having an active layer between an N type semiconductor layer and a P type semiconductor layer. The method comprises the steps of preparing a substrate; laminating the semiconductor layers on the substrate, the semiconductor layers having the active layer between the N type semiconductor layer and the P type semiconductor layer; and forming grooves on the semiconductor layers laminated on the substrate until the substrate is exposed, whereby inclined sidewalls are formed by the grooves in the semiconductor layers divided into a plurality of chips. According to embodiments of the present invention, a sidewall of a semiconductor layer formed on a substrate of a light emitting diode chip is inclined with respect to the substrate, whereby its directional angle is widened as compared with a light emitting diode chip without such inclination.

Abstract: A semiconductor laser device includes a chip obtained from a substrate and a semiconductor multi-layer formed on the substrate. The semiconductor multi-layer is formed from a plurality of semiconductor layers of a semiconductor material having a hexagonal structure, and includes a stripe-shaped wave guide portion. The chip includes two chip end facets that extend in a direction crossing an extending direction of the wave guide portion. Each of regions on both sides of the wave guide portion in at least one of the chip end facets has a notch portion formed by notching a part of the chip, and the notch portion exposes a first wall surface connecting to the chip end facet and a second wall surface connecting to the chip side facet. An angle between an extending direction of the first wall surface in at least one of the two notch portions and an extending direction of the cleavage facet is in a range of about 10 degrees to about 40 degrees.

Abstract: The present invention provides a method for manufacturing a free-standing substrate, comprising: growing a first layer having a sacrificial layer on a growth substrate; patterning the first layer into a patterned first layer having a structure of a plurality of protrusions; growing a second layer on the patterned first layer having a structure of a plurality of protrusions by epitaxial lateral overgrowth; and separating the second layer from the growth substrate by etching away the sacrificial layer, wherein the separated second layer functions as a free-standing substrate for epitaxy.

Abstract: In the method of making a semiconductor laser, a semiconductor region is grown on an active layer, and a part of the semiconductor region is etched to form a ridge structure. An insulating film is formed over the ridge structure, and a resin layer of photosensitive material is formed to bury the ridge structure. A cured resin portion and an uncured resin portion are formed in the resin layer by performing lithographic exposure of the resin layer, and the uncured resin portion is on the top of the ridge structure. The uncured resin portion is removed to form a dent which is provided on the top of the ridge structure. An overall surface of the cured resin portion and dent is etched to form an etched resin layer. An opening is formed in the etched resin layer by thinning the cured resin portion, and a part of the insulating film is exposed in the opening of the etched resin layer. The part of the insulating film is etched using the etched resin layer as a mask to form an opening in the insulating film.

Abstract: A method for manufacturing a semiconductor laser includes the steps of forming a mask layer having a stripe-shaped mask portion corresponding to a ridge stripe to be formed on a nitride-based group III-V compound semiconductor layer, etching the nitride-based group III-V compound semiconductor layer to a predetermined depth using the mask layer to form the ridge stripe, forming a resist to cover the mask layer and the nitride-based group III-V compound semiconductor layer, etching-back the resist until the stripe-shaped mask portion of the mask layer is exposed, removing the exposed mask portion of the mask layer by etching to expose the upper surface of the ridge stripe, forming a metal film on the resist and the exposed ridge stripe to form an electrode on the ridge stripe, removing the resist together with the metal film formed thereon, and removing the mask layer by etching.

Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.

Abstract: A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. Some embodiments include a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, wherein portions of the epitaxial region are patterned into a mesa and wherein the sidewalls of the mesa comprise a resistive Group III nitride region for electrically isolating portions of the p-n junction.

Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.

Abstract: A new structure of a semiconductor optical device and a method to produce the device are disclosed. One embodiment of the optical device of the invention provides a blocking region including, from the side close to the mesa, a p-type first layer and a p-type second layer. The first layer is co-doped with an n-type impurity and a p-type impurity. The doping concentration of the p-type impurity in the first layer is smaller than that in the second layer, so, the first layer performs a function of a buffer layer for the Zn diffusion from the second layer to the active layer in the mesa structure.

Abstract: According to the present invention, a recess portion is formed in a package substrate which is formed of a multilayer organic substrate having a multilayer wiring, and an LSI chip is accommodated within the recess portion. Wiring traces are formed on the upper surface of a resin which seals the LSI chip connected to the multilayer wiring. The wiring traces are connected to terminal wiring traces connected to the multilayer wiring on the front face of the package substrate and to front-face bump electrodes for external connection on the upper surface of the resin. On the back face side of the package substrate, back-face bump electrodes for external connection are formed and connected to the multilayer wiring.