Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.

Abstract: A semiconductor laser using a nitride type Group III-V compound semiconductor includes: an n-side clad layer; an n-side optical waveguide layer over the n-side clad layer; an active layer over the n-side optical waveguide layer; a p-side optical waveguide layer over the active layer; an electron barrier layer over the p-side optical waveguide layer; and a p-side clad layer over the electron barrier layer. A ridge stripe is formed at an upper part of the p-side optical waveguide layer, the electron barrier layer and the p-side clad layer, and the distance between the electron barrier layer and a bottom surface in areas on both sides of the ridge stripe is not less than 10 nm.

Abstract: A method for fabricating the semiconductor structure include a semiconductor substrate having a cross-section hourglass shaped channel region. A stress imparting layer is located adjacent the channel region. The hourglass shape may provide for enhanced vertical tensile stress within the channel region when it is longitudinally compressive stressed by the stress imparting layer.

Abstract: A method for mounting a semiconductor device onto a composite substrate, including a submount and a heat sink, is described. According to one aspect of the invention, the materials for the submount and the heat sink are chosen so that the value of coefficient of thermal expansion of the semiconductor device is in between the values of coefficients of thermal expansion of the materials of the submount and the heat sink, the thickness of the submount being chosen so as to equalize thermal expansion of the semiconductor device to that of the surface of the submount the device is mounted on. According to another aspect of the invention, the semiconductor device, the submount, and the heat sink are soldered into a stack at a single step of heating, which facilitates reduction of residual post-soldering stresses.

Abstract: A light-emitting device with a protection layer for Zn inter-diffusion and a process to form the device are described. The device of the invention provides an active layer containing aluminum (Al) as a group III element, typically AlGaInAs, and protection layers containing silicon (Si) to prevent the inter-diffusion of zing (Zn) atoms contained in p-type layers surrounding the active layer. One of protection layers is put between the active layer and the p-type cladding layer, while, the other of protection layers is disposed between the active layer and the p-type burying layer.

Abstract: A semiconductor device comprises a first contact plug, a first structure and a second insulating layer, or comprises a first contact plug, a first structure, a protruding region and a second insulating layer. The first contact plug extends in a predetermined direction and including a step converting a cross section area of the first contact plug perpendicular to the predetermined direction discontinuously via the step in one end side. The second insulating layer is formed on side surface of a part of the first contact plug closer to the first structure than the step, or on side surfaces of the protruding region and a part of the first contact plug closer to the first structure than the step.

Abstract: The aperture ratio of a pixel of a reflecting type display device is improved without increasing the number of masks and without using a black mask. Locations for light shielding between pixels are arranged such that a pixel electrode overlaps with a portion of a gate wiring and a source wiring. In locations for shielding TFTs, a high pixel aperture ratio is realized by forming a color filter (red, or lamination of red and blue), formed on an opposing substrate.

Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.

Abstract: A nitride semiconductor laser element includes a substrate and a nitride semiconductor layer in which a first semiconductor layer, an active layer, and a second semiconductor layer are laminated in this order on the substrate. At least one of the first semiconductor layer and the second semiconductor layer includes a first section forming recessed and raised portions and a second section embedding the recessed and raised portions of the first section. A region with a higher aluminum mixed crystal ratio than the second section that embeds the recessed and raised portions is disposed on top faces of the raised portions. The nitride semiconductor layer defines resonant planes, and the recessed and raised portions are formed in a shape of stripes that extend substantially parallel to the resonant planes.

Abstract: At least one recess and/or protruding portion is created on the surface portion of a substrate for scattering or diffracting light generated in a light emitting region. The recess and/or protruding portion has a shape that prevents crystal defects from occurring in semiconductor layers.

Abstract: An optical semiconductor device includes: a first conductivity type first semiconductor region; a first conductivity type second semiconductor region formed on the first semiconductor region; a second conductivity type third semiconductor region formed on the second semiconductor region; a photodetector section formed of the second semiconductor region and the third semiconductor region; a micro mirror formed of a trench formed selectively in a region of the first semiconductor region and the second semiconductor region except the photodetector section; and a semiconductor laser element held on the bottom face of the trench. A first conductivity type buried layer of which impurity concentration is higher than those of the first semiconductor region and the second semiconductor region is selectively formed between the first semiconductor region and the second semiconductor region in the photodetector section.

Abstract: A package for housing a light-emitting element wherein a via hole for wiring provided so as to pass through an insulating substrate is arranged in such a manner that it is positioned under a reflector frame; a method for manufacturing the above package for housing a light-emitting element which comprises the steps of separately providing a green sheet for the substrate and a green sheet for the frame, causing a paste containing a ceramic powder to be present between the two green sheets to bind them, and subjecting them to degreasing and sintering, to thereby integrate them.

Abstract: The present invention discloses a light emitting diode structure and a method for fabricating the same. In the present invention, a substrate is placed in a solution to form a chemical reaction layer on carved regions; the carved region is selectively etched to form a plurality of concave zones and form a plurality of convex zones; a semiconductor layer structure is epitaxially grown on the element regions and carved regions of the substrate; the semiconductor layer structure on the element regions is fabricated into a LED element with a photolithographic process.

Abstract: A gallium nitride (GaN) based light emitting diode (LED), wherein light is extracted through a nitrogen face (N-face) (42) of the LED and a surface of the N-face (42) is roughened into one or more hexagonal shaped cones. The roughened surface reduces light reflections occurring repeatedly inside the LED, and thus extracts more light out of the LED. The surface of the N-face (42) is roughened by an anisotropic etching, which may comprise a dry etching or a photo-enhanced chemical (PEC) etching.

Abstract: Method for manufacturing a semiconductor optical device includes forming an epitaxial structure containing at least an active layer which can emit light, of a III-V group semiconductor material; forming an insulating layer over the epitaxial structure, which prevents the V group element from escaping from the epitaxial structure during heat treatment; heat treating the epitaxial structure at at least 800 degrees C.; and removing the insulating layer, thereby enhancing the reliability of the device.

Abstract: A method of manufacturing a vertical GaN-based LED comprises preparing an n-type GaN substrate; sequentially forming an active layer and a p-type nitride semiconductor layer on the n-type GaN substrate through an epitaxial growth method; forming a p-electrode on the p-type nitride semiconductor layer; wet-etching the lower surface of the n-type GaN substrate so as to reduce the thickness of the n-type GaN substrate; forming a flat n-type bonding pad on the wet-etched lower surface of the n-type GaN substrate, the n-type bonding pad defining an n-electrode formation region; and forming an n-electrode on the n-type bonding pad.

Abstract: Novel etch techniques are provided for shaping silicon features below the photolithographic resolution limits. FinFET devices are defined by recessing oxide and exposing a silicon protrusion to an isotropic etch, at least in the channel region. In one implementation, the protrusion is contoured by a dry isotropic etch having excellent selectivity, using a downstream microwave plasma etch.

Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).

Abstract: A manufacturing process of a leadframe-based BGA package is disclosed. A leadless leadframe with an upper layer and a lower layer is provided for the package. The upper layer includes a plurality of ball pads, and the lower layer includes a plurality of sacrificial pads aligning and connecting with the ball pads. A plurality of leads are formed in either the upper layer or the lower layer to interconnect the ball pads or the sacrificial pads. An encapsulant is formed to embed the ball pads after chip attachment and electrical connections. During manufacturing process, a half-etching process is performed after encapsulation to remove the sacrificial pads to make the ball pads electrically isolated and exposed from the encapsulant for solder ball placement where the soldering areas of the ball pads are defined without the need of solder mask(s) to solve the problem of solder bleeding of the solder balls on the leads or the undesired spots during reflow. Moreover, mold flash can easily be detected and removed.

Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

Abstract: Disclosed are methods for providing wafer photonic flow control to a semiconductor wafer (1700) having a substrate (1720), at least one active layer (1765) and at least one surface layer (1710). Photonic flow control can be achieved through the formation of trenches (1725) and/or insulating implants (1730) formed in said wafer (1700), whereby active regions (1760) are defined by trenches (1725) that operate as nonconductive areas (1750). Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Photonic flow control at the wafer level is important when using WLBI methods and systems.

Abstract: A method of wet etching produces high-precision microneedle arrays for use in medical applications. The method achieves precise process control over microneedle fabrication, at single wafer or batch-level, using wet etching of silicon with potassium hydroxide (KOH) solution by accurately identifying the etch time endpoint. Hence, microneedles of an exactly required height, shape, sharpness and surface quality are achieved. The outcome is a reliable, reproducible, robust and relatively inexpensive microneedle fabrication process. Microneedles formed by KOH wet etching have extremely smooth surfaces and exhibit superior mechanical and structural robustness to their dry etched counterparts. These properties afford extra reliability to such silicon microneedles, making them ideal for medical applications. The needles can also be hollowed. Wet etched silicon microneedles can then be employed as masters to replicate the improved surface and structural properties in other materials (such as polymers) by moulding.

Abstract: An array substrate includes an almost rectangular effective portion which is formed on the major surface of the substrate and includes a plurality of pixels for displaying images. An organic EL display device includes a sealer which is placed to cover at least the effective portion on the major surface of the array substrate. The sealer has a structure in which at least two almost rectangular buffer layers which have substantially the same pattern and barrier layers each of which is a pattern larger than each buffer layer and covers each buffer layer to shield it from the open air are stacked on each other. The shortest distance from one side of an end of the effective portion to one side of an end of the first buffer layer is different from the shortest distance to one side of an end of the second buffer layer.

Abstract: A method of forming a metal contact and passivation of a semiconductor feature, and devices made using the method. The method comprises the steps of forming a dielectric mask on a semiconductor substrate utilising photolithography processes; etching the semiconductor substrate such that one or more features are formed underneath respective portions of the dielectric mask; depositing a passivation layer on the substrate with the dielectric mask in place above the features; subjecting the substrate to an etchant such that the dielectric mask is etched at a higher rate than the passivation layer, whereby portions of the passivation layer deposited on the dielectric mask are lifted off from the substrate; and depositing a metal layer on the substrate including over the remaining passivation layer and exposed portions of the features.

Abstract: A semiconductor light emitting device can have stable electric characteristics and can emit light with high intensity from a substrate surface. The device can include a transparent substrate and a semiconductor layer on the substrate. The semiconductor layer can include a first conductive type semiconductor layer, a luminescent layer, a second conductive type semiconductor layer, and first and second electrodes disposed to make contact with the first and second conductive type semiconductor layers, respectively. The first conductive type semiconductor layer, the luminescent layer, and the second conductive type semiconductor layer can be laminated in order from the side adjacent the substrate. An end face of the semiconductor layer can include a first terrace provided in an end face of the first conductive type semiconductor layer in parallel with the substrate surface, and an inclined end face region provided nearer to the substrate than the first terrace.

Abstract: An organic light emitting device includes a transistor having gate, source, and drain electrodes, and first electrode connected to one of the source or drain electrodes. The device also includes an emitting layer positioned on the first electrode and a second electrode positioned on the emitting layer. Each of the source and drain electrodes includes first, second, and third layers having different tapered angles. The first electrode may include a metallic layer and a conductive layer, with a tapered angle of the metallic layer being different from a tapered angle of the conductive layer.

Abstract: Si atoms obtained by thermal decomposition of SiH4 are adsorbed in advance on one surface of a semiconductor substrate and side surfaces of a semiconductor mesa part. Thereby, prior to the growth of a buried layer, a diffusion protection layer composed of Si-doped InP with high impurity concentration is formed. As a result, when the buried layer is grown, Zn diffusing from an upper cladding layer is trapped by the diffusion protection layer, and interdiffusion between Zn and Fe is inhibited. Since the diffusion protection layer is formed uniformly at a small thickness of several monolayers, the diffusion protection layer is also inhibited from becoming a current leakage path. Consequently, the reliability of the semiconductor optical device can be improved.

Abstract: A method of manufacturing an optical semiconductor element comprises: forming a striped protruding body by selectively dry etching an InGaAlP layer along its thickness, the InGaAlP layer being formed on a substrate; forming a protection film on an upper face and on both side faces of the protruding body; and forming a ridge including the protruding body by etching the InGaAlP layer around the protruding body using a solution containing hydrofluoric acid.

Abstract: A film structure of a ferroelectric single crystal which can be beneficially used in the fabrication of high-performance electric or electronic parts or devices is prepared by adhering a ferroelectric single crystal plate to a substrate by a conductive adhesive or metal layer, the ferroelectric single crystal plate being polished before or after the adhesion with the substrate.

Abstract: A surface-emitting type device includes a substrate including a first face and a second face that is tilted with respect to the first face and has a plane index different from a plane index of the first face, an emission section formed above the first face, and a rectification section formed above the second face, wherein the emission section includes a first semiconductor layer of a first conductivity type, an active layer formed above the first semiconductor layer, and a second semiconductor layer of a second conductivity type formed above the active layer, the rectification section includes a first semiconductor layer of the second conductivity type, and a second semiconductor layer of the first conductivity type formed above the first semiconductor layer, the first semiconductor layer of the emission section and the first semiconductor layer of the rectification section are formed by a common process and include the same impurity, the emission section and the rectification section are electrically connect

Abstract: A method of manufacturing a field emission device (FED), which reduces the number of photomask patterning processes and improves the manufacturing yield of the FED, is provided.

Abstract: A method of manufacturing an organic light emitting display device and the organic light emitting display device which reduces generation of dark spots by particles are disclosed.

Abstract: A nitride semiconductor light-emitting device includes a layered portion emitting light on a substrate. The layered portion includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The periphery of the layered portion is inclined, and the surface of the n-type semiconductor layer is exposed at the periphery. An n electrode is disposed on the exposed surface of the n-type semiconductor layer. This device structure can enhance the emission efficiency and the light extraction efficiency.

Abstract: Disclosed is an active matrix liquid crystal display device designed mainly for alternating electric current drive, in which orientation processing (monostabilization) is performed by a direct current power supply or a direct current voltage applied to a ferroelectric liquid crystal. The liquid crystal is made to respond, and is made monostable while a voltage level is maintained by a storage capacitor. In addition, the liquid crystal may also be made monostable while maintaining a gate clock pulse at a constant level. After forming a transparent conductive film on an element substrate, elements such as TFTs are formed. An electric field is applied by a direct current voltage source between an electrode formed on an opposing substrate and the transparent conductive film. An electric field is applied by a direct current voltage source between the electrode formed on the opposing substrate and the transparent conductive film formed on the back side of the element substrate.

Abstract: A high electron mobility transistor is disclosed which has a double-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. The main semiconductor region, buffer region, and part of the substrate taper as they extend away from the rest of the substrate, providing slanting side surfaces. An electroconductive antileakage overlay covers these side surfaces via an electrically insulating overlay. Electrically coupled to the silicon substrate via a contact electrode, the antileakage overlay serves for reduction of current leakage along the side surfaces.

Abstract: A light emitting diode (LED) and a method are provided for fabricating the a LED with an improved structure for better light emitting efficiency and better light output performance.

Abstract: An exemplary nitride-based semiconductor light emitting device includes a substrate, a nitride-based multi-layered structure epitaxially formed on the substrate, a first-type electrode and a second-type electrode. The multi-layered structure includes a first-type layer, an active layer, and a second-type layer. The multi-layered structure has a developed mesa structure which at least includes the second-type layer and the active layer and whereby the first-type layer is partially exposed to form an exposed portion. The mesa structure has a roughened top surface and a plurality of roughened side surfaces adjoining the top surface. A crystal growth orientation of the multi-layered structure intersects with <0001 > crystal orientation thereof. The first-type electrode and the second-type electrode respectively come into ohmic contact with the first-type layer and the second-type layer.

Abstract: A method of manufacturing a semiconductor laser element having an enhanced yield ratio is provided. The semiconductor laser element having a cladding layer, an intermediate layer, and a capping layer is manufactured as follows. At the laminating step, a plurality of lamination layers are laminated in a laminating direction. Subsequently, at protruding step, a cladding layer, a capping layer and a precursor of an intermediate layer are formed so that widthwise lengths of the cladding layer and the capping layer become shorter or uniform in the laminating direction, and so that the precursor of an intermediate layer protrudes widthwise from the cladding layer and the capping layer. At removing step, an protrusion of the precursor of the intermediate layer is removed.

Abstract: There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity, and having a heating element on the micro-structure capable of heating itself and its immediate surroundings. A layer of protective material is then deposited on said micro-structure such that at least a top surface of the micro-structure and an opening of the micro-cavity is covered, wherein the protective material is in a solid state at room temperature and can protect the micro-structure during silicon wafer dicing procedures and subsequent packaging. The integrated circuit is packaged and an electric current is passed through the heating element such that a portion of the protective material is removed and an unobstructed volume is provided above and below the micro-structure.

Abstract: A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

Abstract: The disclosed embodiments reduce across-chip performance variation through non-contact electrical metrology. According to a feature is a process control system that includes a component that measures transistor electrical performance in a product wafer. Also included in the system is a mapping component that converts the transistor performance into exposure dose values and a process tool that communicates the exposure dose value to a scanner. The exposure dose value is fed back for optimization of future chip exposures. The disclosed embodiments directly optimize transistor performance, thus controlling an important parameter in many integrated circuits.

Abstract: A multibeam semiconductor laser diode having: an n-type semiconductor substrate; an n-type clad layer, an active layer, a p-type clad layer and a contact layer; a plurality of partitioning grooves extending from one end to the other end of the substrate and formed from the contact layer to a predetermined depth of the p-type clad layer; a stripe-shaped ridge sandwiched between two separation grooves; an insulating layer covering an area from each side wall of the contact layer of each ridge to an end of the partitioning region via the separation groove; a first electrode formed on a second plane of the substrate; and a second electrode formed in each partitioning region covering an area above the ridge, separation grooves and multilayer semiconductor layers outside the separation grooves, the second electrode being constituted of a lower second electrode layer and an upper second plated layer.

Abstract: The present invention is to provide a method for manufacturing a semiconductor optical device, in which the unevenness of the burying of the mesa structure may be reduced. The process is configured to form a mask extending along [011] direction on the cap layer, to form a mesa structure by etching the upper cladding layer made of InP, the active region, and the lower cladding layer, to form a surfaces with the (01-1) and the (0-11) planes on both sides of the mesa structure, respectively, by causing the mass transportation, and finally to form the blocking layer by using the mask formed in advance. A semiconductor region with the second conduction type, which is the same with that of the upper cladding layer and is different from that of the lower cladding layer, is grown on the upper cladding layer after removing the mask and the cap layer.

Abstract: A trench-gated field effect transistor (FET) is formed as follows. Using one mask, a plurality of active gate trenches and at least one gate runner trench are defined and simultaneously formed in a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench.

Abstract: A light emitting diode is disclosed that includes a transparent (and potentially low conductivity) silicon carbide substrate, an active structure formed from the Group III nitride material system on the silicon carbide substrate, and respective ohmic contacts on the top side of the diode. The silicon carbide substrate is beveled with respect to the interface between the silicon carbide and the Group III nitride.

Abstract: A method of manufacturing a semiconductor laser having an end face window structure, by growing over a substrate a nitride type Group III-V compound semiconductor layer including an active layer including a nitride type Group III-V compound semiconductor containing at least In and Ga, the method includes the steps of: forming a mask including an insulating film over the substrate, at least in the vicinity of the position of forming the end face window structure; and growing the nitride type Group III-V compound semiconductor layer including the active layer over a part, not covered with the mask, of the substrate.

Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.

Abstract: A method of fabricating a vertically tapered structure. The method includes placing a spacer layer at a predetermined area on a wafer, placing a mask layer at a predetermined area on the spacer layer, and over-etching the spacer layer, by etching a certain area below the mask layer, fabricating a cantilever type shadow mask having the spacer layer and the mask layer. Thus, it is possible to fabricate the vertically tapered structure of several tens of microns. The vertically tapered structure can be used as the optical waveguide in the optical device to minimize junction loss that may occur between the optical waveguide and the optical fiber.

Abstract: A phase-change memory may have a tapered lower electrode coated with an insulator. The coated, tapered electrode acts as a mask for a self-aligned trench etch to electrically separate adjacent wordlines. In some embodiments, the tapered lower electrode may be formed over a plurality of doped regions, and isotropic etching may be used to taper the electrode as well as part of the underlying doped regions.

Abstract: Ball grid array packages for semiconductor die include a thermally conductive container and a substrate that substantially enclose a semiconductor die. The die is positioned with respect to the container by thermally conductive supports formed in the container or attached to the container. The die contacts the supports so that the die and the container form a cavity that is at least partially filled with a thermally conductive material such as a conductive epoxy to promote thermal conduction between the die and the container. The die electrically connects to the substrate with bond wires that extend through an aperture in the substrate and attach to bond pads provided on the substrate. The aperture is typically filled with a protective layer of resin, epoxy, or other material that also encapsulates the bond wires.